1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * TI/National Semiconductor LP3943 PWM driver |
4 | * |
5 | * Copyright 2013 Texas Instruments |
6 | * |
7 | * Author: Milo Kim <milo.kim@ti.com> |
8 | */ |
9 | |
10 | #include <linux/err.h> |
11 | #include <linux/mfd/lp3943.h> |
12 | #include <linux/module.h> |
13 | #include <linux/of.h> |
14 | #include <linux/platform_device.h> |
15 | #include <linux/pwm.h> |
16 | #include <linux/slab.h> |
17 | |
18 | #define LP3943_MAX_DUTY 255 |
19 | #define LP3943_MIN_PERIOD 6250 |
20 | #define LP3943_MAX_PERIOD 1600000 |
21 | |
22 | struct lp3943_pwm { |
23 | struct lp3943 *lp3943; |
24 | struct lp3943_platform_data *pdata; |
25 | struct lp3943_pwm_map pwm_map[LP3943_NUM_PWMS]; |
26 | }; |
27 | |
28 | static inline struct lp3943_pwm *to_lp3943_pwm(struct pwm_chip *chip) |
29 | { |
30 | return pwmchip_get_drvdata(chip); |
31 | } |
32 | |
33 | static struct lp3943_pwm_map * |
34 | lp3943_pwm_request_map(struct lp3943_pwm *lp3943_pwm, int hwpwm) |
35 | { |
36 | struct lp3943_platform_data *pdata = lp3943_pwm->pdata; |
37 | struct lp3943 *lp3943 = lp3943_pwm->lp3943; |
38 | struct lp3943_pwm_map *pwm_map = &lp3943_pwm->pwm_map[hwpwm]; |
39 | int i, offset; |
40 | |
41 | pwm_map->output = pdata->pwms[hwpwm]->output; |
42 | pwm_map->num_outputs = pdata->pwms[hwpwm]->num_outputs; |
43 | |
44 | for (i = 0; i < pwm_map->num_outputs; i++) { |
45 | offset = pwm_map->output[i]; |
46 | |
47 | /* Return an error if the pin is already assigned */ |
48 | if (test_and_set_bit(nr: offset, addr: &lp3943->pin_used)) |
49 | return ERR_PTR(error: -EBUSY); |
50 | } |
51 | |
52 | return pwm_map; |
53 | } |
54 | |
55 | static int lp3943_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) |
56 | { |
57 | struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip); |
58 | struct lp3943_pwm_map *pwm_map; |
59 | |
60 | pwm_map = lp3943_pwm_request_map(lp3943_pwm, hwpwm: pwm->hwpwm); |
61 | if (IS_ERR(ptr: pwm_map)) |
62 | return PTR_ERR(ptr: pwm_map); |
63 | |
64 | return 0; |
65 | } |
66 | |
67 | static void lp3943_pwm_free_map(struct lp3943_pwm *lp3943_pwm, |
68 | struct lp3943_pwm_map *pwm_map) |
69 | { |
70 | struct lp3943 *lp3943 = lp3943_pwm->lp3943; |
71 | int i, offset; |
72 | |
73 | for (i = 0; i < pwm_map->num_outputs; i++) { |
74 | offset = pwm_map->output[i]; |
75 | clear_bit(nr: offset, addr: &lp3943->pin_used); |
76 | } |
77 | } |
78 | |
79 | static void lp3943_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) |
80 | { |
81 | struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip); |
82 | struct lp3943_pwm_map *pwm_map = &lp3943_pwm->pwm_map[pwm->hwpwm]; |
83 | |
84 | lp3943_pwm_free_map(lp3943_pwm, pwm_map); |
85 | } |
86 | |
87 | static int lp3943_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, |
88 | u64 duty_ns, u64 period_ns) |
89 | { |
90 | struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip); |
91 | struct lp3943 *lp3943 = lp3943_pwm->lp3943; |
92 | u8 val, reg_duty, reg_prescale; |
93 | int err; |
94 | |
95 | /* |
96 | * How to configure the LP3943 PWMs |
97 | * |
98 | * 1) Period = 6250 ~ 1600000 |
99 | * 2) Prescale = period / 6250 -1 |
100 | * 3) Duty = input duty |
101 | * |
102 | * Prescale and duty are register values |
103 | */ |
104 | |
105 | if (pwm->hwpwm == 0) { |
106 | reg_prescale = LP3943_REG_PRESCALE0; |
107 | reg_duty = LP3943_REG_PWM0; |
108 | } else { |
109 | reg_prescale = LP3943_REG_PRESCALE1; |
110 | reg_duty = LP3943_REG_PWM1; |
111 | } |
112 | |
113 | /* |
114 | * Note that after this clamping, period_ns fits into an int. This is |
115 | * helpful because we can resort to integer division below instead of |
116 | * the (more expensive) 64 bit division. |
117 | */ |
118 | period_ns = clamp(period_ns, (u64)LP3943_MIN_PERIOD, (u64)LP3943_MAX_PERIOD); |
119 | val = (u8)((int)period_ns / LP3943_MIN_PERIOD - 1); |
120 | |
121 | err = lp3943_write_byte(lp3943, reg: reg_prescale, data: val); |
122 | if (err) |
123 | return err; |
124 | |
125 | duty_ns = min(duty_ns, period_ns); |
126 | val = (u8)((int)duty_ns * LP3943_MAX_DUTY / (int)period_ns); |
127 | |
128 | return lp3943_write_byte(lp3943, reg: reg_duty, data: val); |
129 | } |
130 | |
131 | static int lp3943_pwm_set_mode(struct lp3943_pwm *lp3943_pwm, |
132 | struct lp3943_pwm_map *pwm_map, |
133 | u8 val) |
134 | { |
135 | struct lp3943 *lp3943 = lp3943_pwm->lp3943; |
136 | const struct lp3943_reg_cfg *mux = lp3943->mux_cfg; |
137 | int i, index, err; |
138 | |
139 | for (i = 0; i < pwm_map->num_outputs; i++) { |
140 | index = pwm_map->output[i]; |
141 | err = lp3943_update_bits(lp3943, reg: mux[index].reg, |
142 | mask: mux[index].mask, |
143 | data: val << mux[index].shift); |
144 | if (err) |
145 | return err; |
146 | } |
147 | |
148 | return 0; |
149 | } |
150 | |
151 | static int lp3943_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) |
152 | { |
153 | struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip); |
154 | struct lp3943_pwm_map *pwm_map = &lp3943_pwm->pwm_map[pwm->hwpwm]; |
155 | u8 val; |
156 | |
157 | if (pwm->hwpwm == 0) |
158 | val = LP3943_DIM_PWM0; |
159 | else |
160 | val = LP3943_DIM_PWM1; |
161 | |
162 | /* |
163 | * Each PWM generator is set to control any of outputs of LP3943. |
164 | * To enable/disable the PWM, these output pins should be configured. |
165 | */ |
166 | |
167 | return lp3943_pwm_set_mode(lp3943_pwm, pwm_map, val); |
168 | } |
169 | |
170 | static void lp3943_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) |
171 | { |
172 | struct lp3943_pwm *lp3943_pwm = to_lp3943_pwm(chip); |
173 | struct lp3943_pwm_map *pwm_map = &lp3943_pwm->pwm_map[pwm->hwpwm]; |
174 | |
175 | /* |
176 | * LP3943 outputs are open-drain, so the pin should be configured |
177 | * when the PWM is disabled. |
178 | */ |
179 | |
180 | lp3943_pwm_set_mode(lp3943_pwm, pwm_map, LP3943_GPIO_OUT_HIGH); |
181 | } |
182 | |
183 | static int lp3943_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, |
184 | const struct pwm_state *state) |
185 | { |
186 | int err; |
187 | |
188 | if (state->polarity != PWM_POLARITY_NORMAL) |
189 | return -EINVAL; |
190 | |
191 | if (!state->enabled) { |
192 | if (pwm->state.enabled) |
193 | lp3943_pwm_disable(chip, pwm); |
194 | return 0; |
195 | } |
196 | |
197 | err = lp3943_pwm_config(chip, pwm, duty_ns: state->duty_cycle, period_ns: state->period); |
198 | if (err) |
199 | return err; |
200 | |
201 | if (!pwm->state.enabled) |
202 | err = lp3943_pwm_enable(chip, pwm); |
203 | |
204 | return err; |
205 | } |
206 | |
207 | static const struct pwm_ops lp3943_pwm_ops = { |
208 | .request = lp3943_pwm_request, |
209 | .free = lp3943_pwm_free, |
210 | .apply = lp3943_pwm_apply, |
211 | }; |
212 | |
213 | static int lp3943_pwm_parse_dt(struct device *dev, |
214 | struct lp3943_pwm *lp3943_pwm) |
215 | { |
216 | static const char * const name[] = { "ti,pwm0" , "ti,pwm1" , }; |
217 | struct device_node *node = dev->of_node; |
218 | struct lp3943_platform_data *pdata; |
219 | struct lp3943_pwm_map *pwm_map; |
220 | enum lp3943_pwm_output *output; |
221 | int i, err, proplen, count = 0; |
222 | u32 num_outputs; |
223 | |
224 | if (!node) |
225 | return -EINVAL; |
226 | |
227 | pdata = devm_kzalloc(dev, size: sizeof(*pdata), GFP_KERNEL); |
228 | if (!pdata) |
229 | return -ENOMEM; |
230 | |
231 | /* |
232 | * Read the output map configuration from the device tree. |
233 | * Each of the two PWM generators can drive zero or more outputs. |
234 | */ |
235 | |
236 | for (i = 0; i < LP3943_NUM_PWMS; i++) { |
237 | if (!of_get_property(node, name: name[i], lenp: &proplen)) |
238 | continue; |
239 | |
240 | num_outputs = proplen / sizeof(u32); |
241 | if (num_outputs == 0) |
242 | continue; |
243 | |
244 | output = devm_kcalloc(dev, n: num_outputs, size: sizeof(*output), |
245 | GFP_KERNEL); |
246 | if (!output) |
247 | return -ENOMEM; |
248 | |
249 | err = of_property_read_u32_array(np: node, propname: name[i], out_values: output, |
250 | sz: num_outputs); |
251 | if (err) |
252 | return err; |
253 | |
254 | pwm_map = devm_kzalloc(dev, size: sizeof(*pwm_map), GFP_KERNEL); |
255 | if (!pwm_map) |
256 | return -ENOMEM; |
257 | |
258 | pwm_map->output = output; |
259 | pwm_map->num_outputs = num_outputs; |
260 | pdata->pwms[i] = pwm_map; |
261 | |
262 | count++; |
263 | } |
264 | |
265 | if (count == 0) |
266 | return -ENODATA; |
267 | |
268 | lp3943_pwm->pdata = pdata; |
269 | return 0; |
270 | } |
271 | |
272 | static int lp3943_pwm_probe(struct platform_device *pdev) |
273 | { |
274 | struct lp3943 *lp3943 = dev_get_drvdata(dev: pdev->dev.parent); |
275 | struct pwm_chip *chip; |
276 | struct lp3943_pwm *lp3943_pwm; |
277 | int ret; |
278 | |
279 | chip = devm_pwmchip_alloc(parent: &pdev->dev, LP3943_NUM_PWMS, sizeof_priv: sizeof(*lp3943_pwm)); |
280 | if (IS_ERR(ptr: chip)) |
281 | return PTR_ERR(ptr: chip); |
282 | lp3943_pwm = to_lp3943_pwm(chip); |
283 | |
284 | lp3943_pwm->pdata = lp3943->pdata; |
285 | if (!lp3943_pwm->pdata) { |
286 | if (IS_ENABLED(CONFIG_OF)) |
287 | ret = lp3943_pwm_parse_dt(dev: &pdev->dev, lp3943_pwm); |
288 | else |
289 | ret = -ENODEV; |
290 | |
291 | if (ret) |
292 | return ret; |
293 | } |
294 | |
295 | lp3943_pwm->lp3943 = lp3943; |
296 | chip->ops = &lp3943_pwm_ops; |
297 | |
298 | return devm_pwmchip_add(&pdev->dev, chip); |
299 | } |
300 | |
301 | #ifdef CONFIG_OF |
302 | static const struct of_device_id lp3943_pwm_of_match[] = { |
303 | { .compatible = "ti,lp3943-pwm" , }, |
304 | { } |
305 | }; |
306 | MODULE_DEVICE_TABLE(of, lp3943_pwm_of_match); |
307 | #endif |
308 | |
309 | static struct platform_driver lp3943_pwm_driver = { |
310 | .probe = lp3943_pwm_probe, |
311 | .driver = { |
312 | .name = "lp3943-pwm" , |
313 | .of_match_table = of_match_ptr(lp3943_pwm_of_match), |
314 | }, |
315 | }; |
316 | module_platform_driver(lp3943_pwm_driver); |
317 | |
318 | MODULE_DESCRIPTION("LP3943 PWM driver" ); |
319 | MODULE_ALIAS("platform:lp3943-pwm" ); |
320 | MODULE_AUTHOR("Milo Kim" ); |
321 | MODULE_LICENSE("GPL" ); |
322 | |