1 | // SPDX-License-Identifier: GPL-2.0 |
2 | // Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. |
3 | // Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. |
4 | |
5 | #define pr_fmt(fmt) "%s: " fmt, __func__ |
6 | |
7 | #include <linux/err.h> |
8 | #include <linux/kernel.h> |
9 | #include <linux/module.h> |
10 | #include <linux/of.h> |
11 | #include <linux/platform_device.h> |
12 | #include <linux/slab.h> |
13 | #include <linux/string.h> |
14 | #include <linux/regulator/driver.h> |
15 | #include <linux/regulator/machine.h> |
16 | #include <linux/regulator/of_regulator.h> |
17 | |
18 | #include <soc/qcom/cmd-db.h> |
19 | #include <soc/qcom/rpmh.h> |
20 | |
21 | #include <dt-bindings/regulator/qcom,rpmh-regulator.h> |
22 | |
23 | /** |
24 | * enum rpmh_regulator_type - supported RPMh accelerator types |
25 | * @VRM: RPMh VRM accelerator which supports voting on enable, voltage, |
26 | * and mode of LDO, SMPS, and BOB type PMIC regulators. |
27 | * @XOB: RPMh XOB accelerator which supports voting on the enable state |
28 | * of PMIC regulators. |
29 | */ |
30 | enum rpmh_regulator_type { |
31 | VRM, |
32 | XOB, |
33 | }; |
34 | |
35 | #define RPMH_REGULATOR_REG_VRM_VOLTAGE 0x0 |
36 | #define RPMH_REGULATOR_REG_ENABLE 0x4 |
37 | #define RPMH_REGULATOR_REG_VRM_MODE 0x8 |
38 | |
39 | #define PMIC4_LDO_MODE_RETENTION 4 |
40 | #define PMIC4_LDO_MODE_LPM 5 |
41 | #define PMIC4_LDO_MODE_HPM 7 |
42 | |
43 | #define PMIC4_SMPS_MODE_RETENTION 4 |
44 | #define PMIC4_SMPS_MODE_PFM 5 |
45 | #define PMIC4_SMPS_MODE_AUTO 6 |
46 | #define PMIC4_SMPS_MODE_PWM 7 |
47 | |
48 | #define PMIC4_BOB_MODE_PASS 0 |
49 | #define PMIC4_BOB_MODE_PFM 1 |
50 | #define PMIC4_BOB_MODE_AUTO 2 |
51 | #define PMIC4_BOB_MODE_PWM 3 |
52 | |
53 | #define PMIC5_LDO_MODE_RETENTION 3 |
54 | #define PMIC5_LDO_MODE_LPM 4 |
55 | #define PMIC5_LDO_MODE_HPM 7 |
56 | |
57 | #define PMIC5_SMPS_MODE_RETENTION 3 |
58 | #define PMIC5_SMPS_MODE_PFM 4 |
59 | #define PMIC5_SMPS_MODE_AUTO 6 |
60 | #define PMIC5_SMPS_MODE_PWM 7 |
61 | |
62 | #define PMIC5_BOB_MODE_PASS 2 |
63 | #define PMIC5_BOB_MODE_PFM 4 |
64 | #define PMIC5_BOB_MODE_AUTO 6 |
65 | #define PMIC5_BOB_MODE_PWM 7 |
66 | |
67 | /** |
68 | * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations |
69 | * @regulator_type: RPMh accelerator type used to manage this |
70 | * regulator |
71 | * @ops: Pointer to regulator ops callback structure |
72 | * @voltage_ranges: The possible ranges of voltages supported by this |
73 | * PMIC regulator type |
74 | * @n_linear_ranges: Number of entries in voltage_ranges |
75 | * @n_voltages: The number of unique voltage set points defined |
76 | * by voltage_ranges |
77 | * @hpm_min_load_uA: Minimum load current in microamps that requires |
78 | * high power mode (HPM) operation. This is used |
79 | * for LDO hardware type regulators only. |
80 | * @pmic_mode_map: Array indexed by regulator framework mode |
81 | * containing PMIC hardware modes. Must be large |
82 | * enough to index all framework modes supported |
83 | * by this regulator hardware type. |
84 | * @of_map_mode: Maps an RPMH_REGULATOR_MODE_* mode value defined |
85 | * in device tree to a regulator framework mode |
86 | */ |
87 | struct rpmh_vreg_hw_data { |
88 | enum rpmh_regulator_type regulator_type; |
89 | const struct regulator_ops *ops; |
90 | const struct linear_range *voltage_ranges; |
91 | int n_linear_ranges; |
92 | int n_voltages; |
93 | int hpm_min_load_uA; |
94 | const int *pmic_mode_map; |
95 | unsigned int (*of_map_mode)(unsigned int mode); |
96 | }; |
97 | |
98 | /** |
99 | * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a |
100 | * single regulator device |
101 | * @dev: Device pointer for the top-level PMIC RPMh |
102 | * regulator parent device. This is used as a |
103 | * handle in RPMh write requests. |
104 | * @addr: Base address of the regulator resource within |
105 | * an RPMh accelerator |
106 | * @rdesc: Regulator descriptor |
107 | * @hw_data: PMIC regulator configuration data for this RPMh |
108 | * regulator |
109 | * @always_wait_for_ack: Boolean flag indicating if a request must always |
110 | * wait for an ACK from RPMh before continuing even |
111 | * if it corresponds to a strictly lower power |
112 | * state (e.g. enabled --> disabled). |
113 | * @enabled: Flag indicating if the regulator is enabled or |
114 | * not |
115 | * @bypassed: Boolean indicating if the regulator is in |
116 | * bypass (pass-through) mode or not. This is |
117 | * only used by BOB rpmh-regulator resources. |
118 | * @voltage_selector: Selector used for get_voltage_sel() and |
119 | * set_voltage_sel() callbacks |
120 | * @mode: RPMh VRM regulator current framework mode |
121 | */ |
122 | struct rpmh_vreg { |
123 | struct device *dev; |
124 | u32 addr; |
125 | struct regulator_desc rdesc; |
126 | const struct rpmh_vreg_hw_data *hw_data; |
127 | bool always_wait_for_ack; |
128 | |
129 | int enabled; |
130 | bool bypassed; |
131 | int voltage_selector; |
132 | unsigned int mode; |
133 | }; |
134 | |
135 | /** |
136 | * struct rpmh_vreg_init_data - initialization data for an RPMh regulator |
137 | * @name: Name for the regulator which also corresponds |
138 | * to the device tree subnode name of the regulator |
139 | * @resource_name: RPMh regulator resource name format string. |
140 | * This must include exactly one field: '%s' which |
141 | * is filled at run-time with the PMIC ID provided |
142 | * by device tree property qcom,pmic-id. Example: |
143 | * "ldo%s1" for RPMh resource "ldoa1". |
144 | * @supply_name: Parent supply regulator name |
145 | * @hw_data: Configuration data for this PMIC regulator type |
146 | */ |
147 | struct rpmh_vreg_init_data { |
148 | const char *name; |
149 | const char *resource_name; |
150 | const char *supply_name; |
151 | const struct rpmh_vreg_hw_data *hw_data; |
152 | }; |
153 | |
154 | /** |
155 | * rpmh_regulator_send_request() - send the request to RPMh |
156 | * @vreg: Pointer to the RPMh regulator |
157 | * @cmd: Pointer to the RPMh command to send |
158 | * @wait_for_ack: Boolean indicating if execution must wait until the |
159 | * request has been acknowledged as complete |
160 | * |
161 | * Return: 0 on success, errno on failure |
162 | */ |
163 | static int rpmh_regulator_send_request(struct rpmh_vreg *vreg, |
164 | struct tcs_cmd *cmd, bool wait_for_ack) |
165 | { |
166 | int ret; |
167 | |
168 | if (wait_for_ack || vreg->always_wait_for_ack) |
169 | ret = rpmh_write(dev: vreg->dev, state: RPMH_ACTIVE_ONLY_STATE, cmd, n: 1); |
170 | else |
171 | ret = rpmh_write_async(dev: vreg->dev, state: RPMH_ACTIVE_ONLY_STATE, cmd, |
172 | n: 1); |
173 | |
174 | return ret; |
175 | } |
176 | |
177 | static int _rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev, |
178 | unsigned int selector, bool wait_for_ack) |
179 | { |
180 | struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); |
181 | struct tcs_cmd cmd = { |
182 | .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_VOLTAGE, |
183 | }; |
184 | int ret; |
185 | |
186 | /* VRM voltage control register is set with voltage in millivolts. */ |
187 | cmd.data = DIV_ROUND_UP(regulator_list_voltage_linear_range(rdev, |
188 | selector), 1000); |
189 | |
190 | ret = rpmh_regulator_send_request(vreg, cmd: &cmd, wait_for_ack); |
191 | if (!ret) |
192 | vreg->voltage_selector = selector; |
193 | |
194 | return ret; |
195 | } |
196 | |
197 | static int rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev, |
198 | unsigned int selector) |
199 | { |
200 | struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); |
201 | |
202 | if (vreg->enabled == -EINVAL) { |
203 | /* |
204 | * Cache the voltage and send it later when the regulator is |
205 | * enabled or disabled. |
206 | */ |
207 | vreg->voltage_selector = selector; |
208 | return 0; |
209 | } |
210 | |
211 | return _rpmh_regulator_vrm_set_voltage_sel(rdev, selector, |
212 | wait_for_ack: selector > vreg->voltage_selector); |
213 | } |
214 | |
215 | static int rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev *rdev) |
216 | { |
217 | struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); |
218 | |
219 | return vreg->voltage_selector; |
220 | } |
221 | |
222 | static int rpmh_regulator_is_enabled(struct regulator_dev *rdev) |
223 | { |
224 | struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); |
225 | |
226 | return vreg->enabled; |
227 | } |
228 | |
229 | static int rpmh_regulator_set_enable_state(struct regulator_dev *rdev, |
230 | bool enable) |
231 | { |
232 | struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); |
233 | struct tcs_cmd cmd = { |
234 | .addr = vreg->addr + RPMH_REGULATOR_REG_ENABLE, |
235 | .data = enable, |
236 | }; |
237 | int ret; |
238 | |
239 | if (vreg->enabled == -EINVAL && |
240 | vreg->voltage_selector != -ENOTRECOVERABLE) { |
241 | ret = _rpmh_regulator_vrm_set_voltage_sel(rdev, |
242 | selector: vreg->voltage_selector, wait_for_ack: true); |
243 | if (ret < 0) |
244 | return ret; |
245 | } |
246 | |
247 | ret = rpmh_regulator_send_request(vreg, cmd: &cmd, wait_for_ack: enable); |
248 | if (!ret) |
249 | vreg->enabled = enable; |
250 | |
251 | return ret; |
252 | } |
253 | |
254 | static int rpmh_regulator_enable(struct regulator_dev *rdev) |
255 | { |
256 | return rpmh_regulator_set_enable_state(rdev, enable: true); |
257 | } |
258 | |
259 | static int rpmh_regulator_disable(struct regulator_dev *rdev) |
260 | { |
261 | return rpmh_regulator_set_enable_state(rdev, enable: false); |
262 | } |
263 | |
264 | static int rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg *vreg, |
265 | unsigned int mode, bool bypassed) |
266 | { |
267 | struct tcs_cmd cmd = { |
268 | .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_MODE, |
269 | }; |
270 | int pmic_mode; |
271 | |
272 | if (mode > REGULATOR_MODE_STANDBY) |
273 | return -EINVAL; |
274 | |
275 | pmic_mode = vreg->hw_data->pmic_mode_map[mode]; |
276 | if (pmic_mode < 0) |
277 | return pmic_mode; |
278 | |
279 | if (bypassed) |
280 | cmd.data = PMIC4_BOB_MODE_PASS; |
281 | else |
282 | cmd.data = pmic_mode; |
283 | |
284 | return rpmh_regulator_send_request(vreg, cmd: &cmd, wait_for_ack: true); |
285 | } |
286 | |
287 | static int rpmh_regulator_vrm_set_mode(struct regulator_dev *rdev, |
288 | unsigned int mode) |
289 | { |
290 | struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); |
291 | int ret; |
292 | |
293 | if (mode == vreg->mode) |
294 | return 0; |
295 | |
296 | ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode, bypassed: vreg->bypassed); |
297 | if (!ret) |
298 | vreg->mode = mode; |
299 | |
300 | return ret; |
301 | } |
302 | |
303 | static unsigned int rpmh_regulator_vrm_get_mode(struct regulator_dev *rdev) |
304 | { |
305 | struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); |
306 | |
307 | return vreg->mode; |
308 | } |
309 | |
310 | /** |
311 | * rpmh_regulator_vrm_get_optimum_mode() - get the mode based on the load |
312 | * @rdev: Regulator device pointer for the rpmh-regulator |
313 | * @input_uV: Input voltage |
314 | * @output_uV: Output voltage |
315 | * @load_uA: Aggregated load current in microamps |
316 | * |
317 | * This function is used in the regulator_ops for VRM type RPMh regulator |
318 | * devices. |
319 | * |
320 | * Return: 0 on success, errno on failure |
321 | */ |
322 | static unsigned int rpmh_regulator_vrm_get_optimum_mode( |
323 | struct regulator_dev *rdev, int input_uV, int output_uV, int load_uA) |
324 | { |
325 | struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); |
326 | |
327 | if (load_uA >= vreg->hw_data->hpm_min_load_uA) |
328 | return REGULATOR_MODE_NORMAL; |
329 | else |
330 | return REGULATOR_MODE_IDLE; |
331 | } |
332 | |
333 | static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev, |
334 | bool enable) |
335 | { |
336 | struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); |
337 | int ret; |
338 | |
339 | if (vreg->bypassed == enable) |
340 | return 0; |
341 | |
342 | ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode: vreg->mode, bypassed: enable); |
343 | if (!ret) |
344 | vreg->bypassed = enable; |
345 | |
346 | return ret; |
347 | } |
348 | |
349 | static int rpmh_regulator_vrm_get_bypass(struct regulator_dev *rdev, |
350 | bool *enable) |
351 | { |
352 | struct rpmh_vreg *vreg = rdev_get_drvdata(rdev); |
353 | |
354 | *enable = vreg->bypassed; |
355 | |
356 | return 0; |
357 | } |
358 | |
359 | static const struct regulator_ops rpmh_regulator_vrm_ops = { |
360 | .enable = rpmh_regulator_enable, |
361 | .disable = rpmh_regulator_disable, |
362 | .is_enabled = rpmh_regulator_is_enabled, |
363 | .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel, |
364 | .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel, |
365 | .list_voltage = regulator_list_voltage_linear_range, |
366 | .set_mode = rpmh_regulator_vrm_set_mode, |
367 | .get_mode = rpmh_regulator_vrm_get_mode, |
368 | }; |
369 | |
370 | static const struct regulator_ops rpmh_regulator_vrm_drms_ops = { |
371 | .enable = rpmh_regulator_enable, |
372 | .disable = rpmh_regulator_disable, |
373 | .is_enabled = rpmh_regulator_is_enabled, |
374 | .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel, |
375 | .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel, |
376 | .list_voltage = regulator_list_voltage_linear_range, |
377 | .set_mode = rpmh_regulator_vrm_set_mode, |
378 | .get_mode = rpmh_regulator_vrm_get_mode, |
379 | .get_optimum_mode = rpmh_regulator_vrm_get_optimum_mode, |
380 | }; |
381 | |
382 | static const struct regulator_ops rpmh_regulator_vrm_bypass_ops = { |
383 | .enable = rpmh_regulator_enable, |
384 | .disable = rpmh_regulator_disable, |
385 | .is_enabled = rpmh_regulator_is_enabled, |
386 | .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel, |
387 | .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel, |
388 | .list_voltage = regulator_list_voltage_linear_range, |
389 | .set_mode = rpmh_regulator_vrm_set_mode, |
390 | .get_mode = rpmh_regulator_vrm_get_mode, |
391 | .set_bypass = rpmh_regulator_vrm_set_bypass, |
392 | .get_bypass = rpmh_regulator_vrm_get_bypass, |
393 | }; |
394 | |
395 | static const struct regulator_ops rpmh_regulator_xob_ops = { |
396 | .enable = rpmh_regulator_enable, |
397 | .disable = rpmh_regulator_disable, |
398 | .is_enabled = rpmh_regulator_is_enabled, |
399 | }; |
400 | |
401 | /** |
402 | * rpmh_regulator_init_vreg() - initialize all attributes of an rpmh-regulator |
403 | * @vreg: Pointer to the individual rpmh-regulator resource |
404 | * @dev: Pointer to the top level rpmh-regulator PMIC device |
405 | * @node: Pointer to the individual rpmh-regulator resource |
406 | * device node |
407 | * @pmic_id: String used to identify the top level rpmh-regulator |
408 | * PMIC device on the board |
409 | * @pmic_rpmh_data: Pointer to a null-terminated array of rpmh-regulator |
410 | * resources defined for the top level PMIC device |
411 | * |
412 | * Return: 0 on success, errno on failure |
413 | */ |
414 | static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev, |
415 | struct device_node *node, const char *pmic_id, |
416 | const struct rpmh_vreg_init_data *pmic_rpmh_data) |
417 | { |
418 | struct regulator_config reg_config = {}; |
419 | char rpmh_resource_name[20] = "" ; |
420 | const struct rpmh_vreg_init_data *rpmh_data; |
421 | struct regulator_init_data *init_data; |
422 | struct regulator_dev *rdev; |
423 | int ret; |
424 | |
425 | vreg->dev = dev; |
426 | |
427 | for (rpmh_data = pmic_rpmh_data; rpmh_data->name; rpmh_data++) |
428 | if (of_node_name_eq(np: node, name: rpmh_data->name)) |
429 | break; |
430 | |
431 | if (!rpmh_data->name) { |
432 | dev_err(dev, "Unknown regulator %pOFn\n" , node); |
433 | return -EINVAL; |
434 | } |
435 | |
436 | scnprintf(buf: rpmh_resource_name, size: sizeof(rpmh_resource_name), |
437 | fmt: rpmh_data->resource_name, pmic_id); |
438 | |
439 | vreg->addr = cmd_db_read_addr(resource_id: rpmh_resource_name); |
440 | if (!vreg->addr) { |
441 | dev_err(dev, "%pOFn: could not find RPMh address for resource %s\n" , |
442 | node, rpmh_resource_name); |
443 | return -ENODEV; |
444 | } |
445 | |
446 | vreg->rdesc.name = rpmh_data->name; |
447 | vreg->rdesc.supply_name = rpmh_data->supply_name; |
448 | vreg->hw_data = rpmh_data->hw_data; |
449 | |
450 | vreg->enabled = -EINVAL; |
451 | vreg->voltage_selector = -ENOTRECOVERABLE; |
452 | vreg->mode = REGULATOR_MODE_INVALID; |
453 | |
454 | if (rpmh_data->hw_data->n_voltages) { |
455 | vreg->rdesc.linear_ranges = rpmh_data->hw_data->voltage_ranges; |
456 | vreg->rdesc.n_linear_ranges = rpmh_data->hw_data->n_linear_ranges; |
457 | vreg->rdesc.n_voltages = rpmh_data->hw_data->n_voltages; |
458 | } |
459 | |
460 | vreg->always_wait_for_ack = of_property_read_bool(np: node, |
461 | propname: "qcom,always-wait-for-ack" ); |
462 | |
463 | vreg->rdesc.owner = THIS_MODULE; |
464 | vreg->rdesc.type = REGULATOR_VOLTAGE; |
465 | vreg->rdesc.ops = vreg->hw_data->ops; |
466 | vreg->rdesc.of_map_mode = vreg->hw_data->of_map_mode; |
467 | |
468 | init_data = of_get_regulator_init_data(dev, node, desc: &vreg->rdesc); |
469 | if (!init_data) |
470 | return -ENOMEM; |
471 | |
472 | if (rpmh_data->hw_data->regulator_type == XOB && |
473 | init_data->constraints.min_uV && |
474 | init_data->constraints.min_uV == init_data->constraints.max_uV) { |
475 | vreg->rdesc.fixed_uV = init_data->constraints.min_uV; |
476 | vreg->rdesc.n_voltages = 1; |
477 | } |
478 | |
479 | reg_config.dev = dev; |
480 | reg_config.init_data = init_data; |
481 | reg_config.of_node = node; |
482 | reg_config.driver_data = vreg; |
483 | |
484 | rdev = devm_regulator_register(dev, regulator_desc: &vreg->rdesc, config: ®_config); |
485 | if (IS_ERR(ptr: rdev)) { |
486 | ret = PTR_ERR(ptr: rdev); |
487 | dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n" , |
488 | node, ret); |
489 | return ret; |
490 | } |
491 | |
492 | dev_dbg(dev, "%pOFn regulator registered for RPMh resource %s @ 0x%05X\n" , |
493 | node, rpmh_resource_name, vreg->addr); |
494 | |
495 | return 0; |
496 | } |
497 | |
498 | static const int pmic_mode_map_pmic4_ldo[REGULATOR_MODE_STANDBY + 1] = { |
499 | [REGULATOR_MODE_INVALID] = -EINVAL, |
500 | [REGULATOR_MODE_STANDBY] = PMIC4_LDO_MODE_RETENTION, |
501 | [REGULATOR_MODE_IDLE] = PMIC4_LDO_MODE_LPM, |
502 | [REGULATOR_MODE_NORMAL] = PMIC4_LDO_MODE_HPM, |
503 | [REGULATOR_MODE_FAST] = -EINVAL, |
504 | }; |
505 | |
506 | static const int pmic_mode_map_pmic5_ldo[REGULATOR_MODE_STANDBY + 1] = { |
507 | [REGULATOR_MODE_INVALID] = -EINVAL, |
508 | [REGULATOR_MODE_STANDBY] = PMIC5_LDO_MODE_RETENTION, |
509 | [REGULATOR_MODE_IDLE] = PMIC5_LDO_MODE_LPM, |
510 | [REGULATOR_MODE_NORMAL] = PMIC5_LDO_MODE_HPM, |
511 | [REGULATOR_MODE_FAST] = -EINVAL, |
512 | }; |
513 | |
514 | static const int pmic_mode_map_pmic5_ldo_hpm[REGULATOR_MODE_STANDBY + 1] = { |
515 | [REGULATOR_MODE_INVALID] = -EINVAL, |
516 | [REGULATOR_MODE_STANDBY] = -EINVAL, |
517 | [REGULATOR_MODE_IDLE] = -EINVAL, |
518 | [REGULATOR_MODE_NORMAL] = PMIC5_LDO_MODE_HPM, |
519 | [REGULATOR_MODE_FAST] = -EINVAL, |
520 | }; |
521 | |
522 | static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode) |
523 | { |
524 | unsigned int mode; |
525 | |
526 | switch (rpmh_mode) { |
527 | case RPMH_REGULATOR_MODE_HPM: |
528 | mode = REGULATOR_MODE_NORMAL; |
529 | break; |
530 | case RPMH_REGULATOR_MODE_LPM: |
531 | mode = REGULATOR_MODE_IDLE; |
532 | break; |
533 | case RPMH_REGULATOR_MODE_RET: |
534 | mode = REGULATOR_MODE_STANDBY; |
535 | break; |
536 | default: |
537 | mode = REGULATOR_MODE_INVALID; |
538 | break; |
539 | } |
540 | |
541 | return mode; |
542 | } |
543 | |
544 | static const int pmic_mode_map_pmic4_smps[REGULATOR_MODE_STANDBY + 1] = { |
545 | [REGULATOR_MODE_INVALID] = -EINVAL, |
546 | [REGULATOR_MODE_STANDBY] = PMIC4_SMPS_MODE_RETENTION, |
547 | [REGULATOR_MODE_IDLE] = PMIC4_SMPS_MODE_PFM, |
548 | [REGULATOR_MODE_NORMAL] = PMIC4_SMPS_MODE_AUTO, |
549 | [REGULATOR_MODE_FAST] = PMIC4_SMPS_MODE_PWM, |
550 | }; |
551 | |
552 | static const int pmic_mode_map_pmic5_smps[REGULATOR_MODE_STANDBY + 1] = { |
553 | [REGULATOR_MODE_INVALID] = -EINVAL, |
554 | [REGULATOR_MODE_STANDBY] = PMIC5_SMPS_MODE_RETENTION, |
555 | [REGULATOR_MODE_IDLE] = PMIC5_SMPS_MODE_PFM, |
556 | [REGULATOR_MODE_NORMAL] = PMIC5_SMPS_MODE_AUTO, |
557 | [REGULATOR_MODE_FAST] = PMIC5_SMPS_MODE_PWM, |
558 | }; |
559 | |
560 | static unsigned int |
561 | rpmh_regulator_pmic4_smps_of_map_mode(unsigned int rpmh_mode) |
562 | { |
563 | unsigned int mode; |
564 | |
565 | switch (rpmh_mode) { |
566 | case RPMH_REGULATOR_MODE_HPM: |
567 | mode = REGULATOR_MODE_FAST; |
568 | break; |
569 | case RPMH_REGULATOR_MODE_AUTO: |
570 | mode = REGULATOR_MODE_NORMAL; |
571 | break; |
572 | case RPMH_REGULATOR_MODE_LPM: |
573 | mode = REGULATOR_MODE_IDLE; |
574 | break; |
575 | case RPMH_REGULATOR_MODE_RET: |
576 | mode = REGULATOR_MODE_STANDBY; |
577 | break; |
578 | default: |
579 | mode = REGULATOR_MODE_INVALID; |
580 | break; |
581 | } |
582 | |
583 | return mode; |
584 | } |
585 | |
586 | static const int pmic_mode_map_pmic4_bob[REGULATOR_MODE_STANDBY + 1] = { |
587 | [REGULATOR_MODE_INVALID] = -EINVAL, |
588 | [REGULATOR_MODE_STANDBY] = -EINVAL, |
589 | [REGULATOR_MODE_IDLE] = PMIC4_BOB_MODE_PFM, |
590 | [REGULATOR_MODE_NORMAL] = PMIC4_BOB_MODE_AUTO, |
591 | [REGULATOR_MODE_FAST] = PMIC4_BOB_MODE_PWM, |
592 | }; |
593 | |
594 | static const int pmic_mode_map_pmic5_bob[REGULATOR_MODE_STANDBY + 1] = { |
595 | [REGULATOR_MODE_INVALID] = -EINVAL, |
596 | [REGULATOR_MODE_STANDBY] = -EINVAL, |
597 | [REGULATOR_MODE_IDLE] = PMIC5_BOB_MODE_PFM, |
598 | [REGULATOR_MODE_NORMAL] = PMIC5_BOB_MODE_AUTO, |
599 | [REGULATOR_MODE_FAST] = PMIC5_BOB_MODE_PWM, |
600 | }; |
601 | |
602 | static unsigned int rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode) |
603 | { |
604 | unsigned int mode; |
605 | |
606 | switch (rpmh_mode) { |
607 | case RPMH_REGULATOR_MODE_HPM: |
608 | mode = REGULATOR_MODE_FAST; |
609 | break; |
610 | case RPMH_REGULATOR_MODE_AUTO: |
611 | mode = REGULATOR_MODE_NORMAL; |
612 | break; |
613 | case RPMH_REGULATOR_MODE_LPM: |
614 | mode = REGULATOR_MODE_IDLE; |
615 | break; |
616 | default: |
617 | mode = REGULATOR_MODE_INVALID; |
618 | break; |
619 | } |
620 | |
621 | return mode; |
622 | } |
623 | |
624 | static const struct rpmh_vreg_hw_data pmic4_pldo = { |
625 | .regulator_type = VRM, |
626 | .ops = &rpmh_regulator_vrm_drms_ops, |
627 | .voltage_ranges = (struct linear_range[]) { |
628 | REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000), |
629 | }, |
630 | .n_linear_ranges = 1, |
631 | .n_voltages = 256, |
632 | .hpm_min_load_uA = 10000, |
633 | .pmic_mode_map = pmic_mode_map_pmic4_ldo, |
634 | .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, |
635 | }; |
636 | |
637 | static const struct rpmh_vreg_hw_data pmic4_pldo_lv = { |
638 | .regulator_type = VRM, |
639 | .ops = &rpmh_regulator_vrm_drms_ops, |
640 | .voltage_ranges = (struct linear_range[]) { |
641 | REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000), |
642 | }, |
643 | .n_linear_ranges = 1, |
644 | .n_voltages = 128, |
645 | .hpm_min_load_uA = 10000, |
646 | .pmic_mode_map = pmic_mode_map_pmic4_ldo, |
647 | .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, |
648 | }; |
649 | |
650 | static const struct rpmh_vreg_hw_data pmic4_nldo = { |
651 | .regulator_type = VRM, |
652 | .ops = &rpmh_regulator_vrm_drms_ops, |
653 | .voltage_ranges = (struct linear_range[]) { |
654 | REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), |
655 | }, |
656 | .n_linear_ranges = 1, |
657 | .n_voltages = 128, |
658 | .hpm_min_load_uA = 30000, |
659 | .pmic_mode_map = pmic_mode_map_pmic4_ldo, |
660 | .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, |
661 | }; |
662 | |
663 | static const struct rpmh_vreg_hw_data pmic4_hfsmps3 = { |
664 | .regulator_type = VRM, |
665 | .ops = &rpmh_regulator_vrm_ops, |
666 | .voltage_ranges = (struct linear_range[]) { |
667 | REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), |
668 | }, |
669 | .n_linear_ranges = 1, |
670 | .n_voltages = 216, |
671 | .pmic_mode_map = pmic_mode_map_pmic4_smps, |
672 | .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, |
673 | }; |
674 | |
675 | static const struct rpmh_vreg_hw_data pmic4_ftsmps426 = { |
676 | .regulator_type = VRM, |
677 | .ops = &rpmh_regulator_vrm_ops, |
678 | .voltage_ranges = (struct linear_range[]) { |
679 | REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000), |
680 | }, |
681 | .n_linear_ranges = 1, |
682 | .n_voltages = 259, |
683 | .pmic_mode_map = pmic_mode_map_pmic4_smps, |
684 | .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, |
685 | }; |
686 | |
687 | static const struct rpmh_vreg_hw_data pmic4_bob = { |
688 | .regulator_type = VRM, |
689 | .ops = &rpmh_regulator_vrm_bypass_ops, |
690 | .voltage_ranges = (struct linear_range[]) { |
691 | REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000), |
692 | }, |
693 | .n_linear_ranges = 1, |
694 | .n_voltages = 84, |
695 | .pmic_mode_map = pmic_mode_map_pmic4_bob, |
696 | .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode, |
697 | }; |
698 | |
699 | static const struct rpmh_vreg_hw_data pmic4_lvs = { |
700 | .regulator_type = XOB, |
701 | .ops = &rpmh_regulator_xob_ops, |
702 | /* LVS hardware does not support voltage or mode configuration. */ |
703 | }; |
704 | |
705 | static const struct rpmh_vreg_hw_data pmic5_pldo = { |
706 | .regulator_type = VRM, |
707 | .ops = &rpmh_regulator_vrm_drms_ops, |
708 | .voltage_ranges = (struct linear_range[]) { |
709 | REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), |
710 | }, |
711 | .n_linear_ranges = 1, |
712 | .n_voltages = 256, |
713 | .hpm_min_load_uA = 10000, |
714 | .pmic_mode_map = pmic_mode_map_pmic5_ldo, |
715 | .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, |
716 | }; |
717 | |
718 | static const struct rpmh_vreg_hw_data pmic5_pldo_lv = { |
719 | .regulator_type = VRM, |
720 | .ops = &rpmh_regulator_vrm_drms_ops, |
721 | .voltage_ranges = (struct linear_range[]) { |
722 | REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000), |
723 | }, |
724 | .n_linear_ranges = 1, |
725 | .n_voltages = 63, |
726 | .hpm_min_load_uA = 10000, |
727 | .pmic_mode_map = pmic_mode_map_pmic5_ldo, |
728 | .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, |
729 | }; |
730 | |
731 | static const struct rpmh_vreg_hw_data pmic5_pldo515_mv = { |
732 | .regulator_type = VRM, |
733 | .ops = &rpmh_regulator_vrm_drms_ops, |
734 | .voltage_ranges = (struct linear_range[]) { |
735 | REGULATOR_LINEAR_RANGE(1800000, 0, 187, 8000), |
736 | }, |
737 | .n_linear_ranges = 1, |
738 | .n_voltages = 188, |
739 | .hpm_min_load_uA = 10000, |
740 | .pmic_mode_map = pmic_mode_map_pmic5_ldo, |
741 | .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, |
742 | }; |
743 | |
744 | static const struct rpmh_vreg_hw_data pmic5_pldo502 = { |
745 | .regulator_type = VRM, |
746 | .ops = &rpmh_regulator_vrm_ops, |
747 | .voltage_ranges = (struct linear_range[]) { |
748 | REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), |
749 | }, |
750 | .n_linear_ranges = 1, |
751 | .n_voltages = 256, |
752 | .pmic_mode_map = pmic_mode_map_pmic5_ldo_hpm, |
753 | .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, |
754 | }; |
755 | |
756 | static const struct rpmh_vreg_hw_data pmic5_pldo502ln = { |
757 | .regulator_type = VRM, |
758 | .ops = &rpmh_regulator_vrm_ops, |
759 | .voltage_ranges = (struct linear_range[]) { |
760 | REGULATOR_LINEAR_RANGE(1800000, 0, 2, 200000), |
761 | REGULATOR_LINEAR_RANGE(2608000, 3, 28, 16000), |
762 | REGULATOR_LINEAR_RANGE(3104000, 29, 30, 96000), |
763 | REGULATOR_LINEAR_RANGE(3312000, 31, 31, 0), |
764 | }, |
765 | .n_linear_ranges = 4, |
766 | .n_voltages = 32, |
767 | .pmic_mode_map = pmic_mode_map_pmic5_ldo_hpm, |
768 | .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, |
769 | }; |
770 | |
771 | static const struct rpmh_vreg_hw_data pmic5_nldo = { |
772 | .regulator_type = VRM, |
773 | .ops = &rpmh_regulator_vrm_drms_ops, |
774 | .voltage_ranges = (struct linear_range[]) { |
775 | REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000), |
776 | }, |
777 | .n_linear_ranges = 1, |
778 | .n_voltages = 124, |
779 | .hpm_min_load_uA = 30000, |
780 | .pmic_mode_map = pmic_mode_map_pmic5_ldo, |
781 | .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, |
782 | }; |
783 | |
784 | static const struct rpmh_vreg_hw_data pmic5_nldo515 = { |
785 | .regulator_type = VRM, |
786 | .ops = &rpmh_regulator_vrm_drms_ops, |
787 | .voltage_ranges = (struct linear_range[]) { |
788 | REGULATOR_LINEAR_RANGE(320000, 0, 210, 8000), |
789 | }, |
790 | .n_linear_ranges = 1, |
791 | .n_voltages = 211, |
792 | .hpm_min_load_uA = 30000, |
793 | .pmic_mode_map = pmic_mode_map_pmic5_ldo, |
794 | .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, |
795 | }; |
796 | |
797 | static const struct rpmh_vreg_hw_data pmic5_nldo502 = { |
798 | .regulator_type = VRM, |
799 | .ops = &rpmh_regulator_vrm_drms_ops, |
800 | .voltage_ranges = (struct linear_range[]) { |
801 | REGULATOR_LINEAR_RANGE(528000, 0, 127, 8000), |
802 | }, |
803 | .n_linear_ranges = 1, |
804 | .n_voltages = 128, |
805 | .hpm_min_load_uA = 30000, |
806 | .pmic_mode_map = pmic_mode_map_pmic5_ldo, |
807 | .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode, |
808 | }; |
809 | |
810 | static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = { |
811 | .regulator_type = VRM, |
812 | .ops = &rpmh_regulator_vrm_ops, |
813 | .voltage_ranges = (struct linear_range[]) { |
814 | REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), |
815 | }, |
816 | .n_linear_ranges = 1, |
817 | .n_voltages = 216, |
818 | .pmic_mode_map = pmic_mode_map_pmic5_smps, |
819 | .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, |
820 | }; |
821 | |
822 | static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = { |
823 | .regulator_type = VRM, |
824 | .ops = &rpmh_regulator_vrm_ops, |
825 | .voltage_ranges = (struct linear_range[]) { |
826 | REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000), |
827 | }, |
828 | .n_linear_ranges = 1, |
829 | .n_voltages = 264, |
830 | .pmic_mode_map = pmic_mode_map_pmic5_smps, |
831 | .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, |
832 | }; |
833 | |
834 | static const struct rpmh_vreg_hw_data pmic5_ftsmps520 = { |
835 | .regulator_type = VRM, |
836 | .ops = &rpmh_regulator_vrm_ops, |
837 | .voltage_ranges = (struct linear_range[]) { |
838 | REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000), |
839 | }, |
840 | .n_linear_ranges = 1, |
841 | .n_voltages = 264, |
842 | .pmic_mode_map = pmic_mode_map_pmic5_smps, |
843 | .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, |
844 | }; |
845 | |
846 | static const struct rpmh_vreg_hw_data pmic5_ftsmps525_lv = { |
847 | .regulator_type = VRM, |
848 | .ops = &rpmh_regulator_vrm_ops, |
849 | .voltage_ranges = (struct linear_range[]) { |
850 | REGULATOR_LINEAR_RANGE(300000, 0, 267, 4000), |
851 | }, |
852 | .n_linear_ranges = 1, |
853 | .n_voltages = 268, |
854 | .pmic_mode_map = pmic_mode_map_pmic5_smps, |
855 | .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, |
856 | }; |
857 | |
858 | static const struct rpmh_vreg_hw_data pmic5_ftsmps525_mv = { |
859 | .regulator_type = VRM, |
860 | .ops = &rpmh_regulator_vrm_ops, |
861 | .voltage_ranges = (struct linear_range[]) { |
862 | REGULATOR_LINEAR_RANGE(600000, 0, 267, 8000), |
863 | }, |
864 | .n_linear_ranges = 1, |
865 | .n_voltages = 268, |
866 | .pmic_mode_map = pmic_mode_map_pmic5_smps, |
867 | .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, |
868 | }; |
869 | |
870 | static const struct rpmh_vreg_hw_data pmic5_ftsmps527 = { |
871 | .regulator_type = VRM, |
872 | .ops = &rpmh_regulator_vrm_ops, |
873 | .voltage_ranges = (struct linear_range[]) { |
874 | REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), |
875 | }, |
876 | .n_linear_ranges = 1, |
877 | .n_voltages = 215, |
878 | .pmic_mode_map = pmic_mode_map_pmic5_smps, |
879 | .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, |
880 | }; |
881 | |
882 | static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = { |
883 | .regulator_type = VRM, |
884 | .ops = &rpmh_regulator_vrm_ops, |
885 | .voltage_ranges = (struct linear_range[]) { |
886 | REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000), |
887 | }, |
888 | .n_linear_ranges = 1, |
889 | .n_voltages = 236, |
890 | .pmic_mode_map = pmic_mode_map_pmic5_smps, |
891 | .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, |
892 | }; |
893 | |
894 | static const struct rpmh_vreg_hw_data pmic5_hfsmps515_1 = { |
895 | .regulator_type = VRM, |
896 | .ops = &rpmh_regulator_vrm_ops, |
897 | .voltage_ranges = (struct linear_range[]) { |
898 | REGULATOR_LINEAR_RANGE(900000, 0, 4, 16000), |
899 | }, |
900 | .n_linear_ranges = 1, |
901 | .n_voltages = 5, |
902 | .pmic_mode_map = pmic_mode_map_pmic5_smps, |
903 | .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, |
904 | }; |
905 | |
906 | static const struct rpmh_vreg_hw_data pmic5_bob = { |
907 | .regulator_type = VRM, |
908 | .ops = &rpmh_regulator_vrm_bypass_ops, |
909 | .voltage_ranges = (struct linear_range[]) { |
910 | REGULATOR_LINEAR_RANGE(3000000, 0, 31, 32000), |
911 | }, |
912 | .n_linear_ranges = 1, |
913 | .n_voltages = 32, |
914 | .pmic_mode_map = pmic_mode_map_pmic5_bob, |
915 | .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode, |
916 | }; |
917 | |
918 | #define RPMH_VREG(_name, _resource_name, _hw_data, _supply_name) \ |
919 | { \ |
920 | .name = _name, \ |
921 | .resource_name = _resource_name, \ |
922 | .hw_data = _hw_data, \ |
923 | .supply_name = _supply_name, \ |
924 | } |
925 | |
926 | static const struct rpmh_vreg_init_data pm8998_vreg_data[] = { |
927 | RPMH_VREG("smps1" , "smp%s1" , &pmic4_ftsmps426, "vdd-s1" ), |
928 | RPMH_VREG("smps2" , "smp%s2" , &pmic4_ftsmps426, "vdd-s2" ), |
929 | RPMH_VREG("smps3" , "smp%s3" , &pmic4_hfsmps3, "vdd-s3" ), |
930 | RPMH_VREG("smps4" , "smp%s4" , &pmic4_hfsmps3, "vdd-s4" ), |
931 | RPMH_VREG("smps5" , "smp%s5" , &pmic4_hfsmps3, "vdd-s5" ), |
932 | RPMH_VREG("smps6" , "smp%s6" , &pmic4_ftsmps426, "vdd-s6" ), |
933 | RPMH_VREG("smps7" , "smp%s7" , &pmic4_ftsmps426, "vdd-s7" ), |
934 | RPMH_VREG("smps8" , "smp%s8" , &pmic4_ftsmps426, "vdd-s8" ), |
935 | RPMH_VREG("smps9" , "smp%s9" , &pmic4_ftsmps426, "vdd-s9" ), |
936 | RPMH_VREG("smps10" , "smp%s10" , &pmic4_ftsmps426, "vdd-s10" ), |
937 | RPMH_VREG("smps11" , "smp%s11" , &pmic4_ftsmps426, "vdd-s11" ), |
938 | RPMH_VREG("smps12" , "smp%s12" , &pmic4_ftsmps426, "vdd-s12" ), |
939 | RPMH_VREG("smps13" , "smp%s13" , &pmic4_ftsmps426, "vdd-s13" ), |
940 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic4_nldo, "vdd-l1-l27" ), |
941 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic4_nldo, "vdd-l2-l8-l17" ), |
942 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic4_nldo, "vdd-l3-l11" ), |
943 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic4_nldo, "vdd-l4-l5" ), |
944 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic4_nldo, "vdd-l4-l5" ), |
945 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic4_pldo, "vdd-l6" ), |
946 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic4_pldo_lv, "vdd-l7-l12-l14-l15" ), |
947 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic4_nldo, "vdd-l2-l8-l17" ), |
948 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic4_pldo, "vdd-l9" ), |
949 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic4_pldo, "vdd-l10-l23-l25" ), |
950 | RPMH_VREG("ldo11" , "ldo%s11" , &pmic4_nldo, "vdd-l3-l11" ), |
951 | RPMH_VREG("ldo12" , "ldo%s12" , &pmic4_pldo_lv, "vdd-l7-l12-l14-l15" ), |
952 | RPMH_VREG("ldo13" , "ldo%s13" , &pmic4_pldo, "vdd-l13-l19-l21" ), |
953 | RPMH_VREG("ldo14" , "ldo%s14" , &pmic4_pldo_lv, "vdd-l7-l12-l14-l15" ), |
954 | RPMH_VREG("ldo15" , "ldo%s15" , &pmic4_pldo_lv, "vdd-l7-l12-l14-l15" ), |
955 | RPMH_VREG("ldo16" , "ldo%s16" , &pmic4_pldo, "vdd-l16-l28" ), |
956 | RPMH_VREG("ldo17" , "ldo%s17" , &pmic4_nldo, "vdd-l2-l8-l17" ), |
957 | RPMH_VREG("ldo18" , "ldo%s18" , &pmic4_pldo, "vdd-l18-l22" ), |
958 | RPMH_VREG("ldo19" , "ldo%s19" , &pmic4_pldo, "vdd-l13-l19-l21" ), |
959 | RPMH_VREG("ldo20" , "ldo%s20" , &pmic4_pldo, "vdd-l20-l24" ), |
960 | RPMH_VREG("ldo21" , "ldo%s21" , &pmic4_pldo, "vdd-l13-l19-l21" ), |
961 | RPMH_VREG("ldo22" , "ldo%s22" , &pmic4_pldo, "vdd-l18-l22" ), |
962 | RPMH_VREG("ldo23" , "ldo%s23" , &pmic4_pldo, "vdd-l10-l23-l25" ), |
963 | RPMH_VREG("ldo24" , "ldo%s24" , &pmic4_pldo, "vdd-l20-l24" ), |
964 | RPMH_VREG("ldo25" , "ldo%s25" , &pmic4_pldo, "vdd-l10-l23-l25" ), |
965 | RPMH_VREG("ldo26" , "ldo%s26" , &pmic4_nldo, "vdd-l26" ), |
966 | RPMH_VREG("ldo27" , "ldo%s27" , &pmic4_nldo, "vdd-l1-l27" ), |
967 | RPMH_VREG("ldo28" , "ldo%s28" , &pmic4_pldo, "vdd-l16-l28" ), |
968 | RPMH_VREG("lvs1" , "vs%s1" , &pmic4_lvs, "vin-lvs-1-2" ), |
969 | RPMH_VREG("lvs2" , "vs%s2" , &pmic4_lvs, "vin-lvs-1-2" ), |
970 | {} |
971 | }; |
972 | |
973 | static const struct rpmh_vreg_init_data pmg1110_vreg_data[] = { |
974 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ), |
975 | {} |
976 | }; |
977 | |
978 | static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = { |
979 | RPMH_VREG("bob" , "bob%s1" , &pmic4_bob, "vdd-bob" ), |
980 | {} |
981 | }; |
982 | |
983 | static const struct rpmh_vreg_init_data pm8005_vreg_data[] = { |
984 | RPMH_VREG("smps1" , "smp%s1" , &pmic4_ftsmps426, "vdd-s1" ), |
985 | RPMH_VREG("smps2" , "smp%s2" , &pmic4_ftsmps426, "vdd-s2" ), |
986 | RPMH_VREG("smps3" , "smp%s3" , &pmic4_ftsmps426, "vdd-s3" ), |
987 | RPMH_VREG("smps4" , "smp%s4" , &pmic4_ftsmps426, "vdd-s4" ), |
988 | {} |
989 | }; |
990 | |
991 | static const struct rpmh_vreg_init_data pm8150_vreg_data[] = { |
992 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ), |
993 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps510, "vdd-s2" ), |
994 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_ftsmps510, "vdd-s3" ), |
995 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_hfsmps510, "vdd-s4" ), |
996 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_hfsmps510, "vdd-s5" ), |
997 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ), |
998 | RPMH_VREG("smps7" , "smp%s7" , &pmic5_ftsmps510, "vdd-s7" ), |
999 | RPMH_VREG("smps8" , "smp%s8" , &pmic5_ftsmps510, "vdd-s8" ), |
1000 | RPMH_VREG("smps9" , "smp%s9" , &pmic5_ftsmps510, "vdd-s9" ), |
1001 | RPMH_VREG("smps10" , "smp%s10" , &pmic5_ftsmps510, "vdd-s10" ), |
1002 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1-l8-l11" ), |
1003 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_pldo, "vdd-l2-l10" ), |
1004 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ), |
1005 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ), |
1006 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ), |
1007 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_nldo, "vdd-l6-l9" ), |
1008 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l7-l12-l14-l15" ), |
1009 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l1-l8-l11" ), |
1010 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l6-l9" ), |
1011 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic5_pldo, "vdd-l2-l10" ), |
1012 | RPMH_VREG("ldo11" , "ldo%s11" , &pmic5_nldo, "vdd-l1-l8-l11" ), |
1013 | RPMH_VREG("ldo12" , "ldo%s12" , &pmic5_pldo_lv, "vdd-l7-l12-l14-l15" ), |
1014 | RPMH_VREG("ldo13" , "ldo%s13" , &pmic5_pldo, "vdd-l13-l16-l17" ), |
1015 | RPMH_VREG("ldo14" , "ldo%s14" , &pmic5_pldo_lv, "vdd-l7-l12-l14-l15" ), |
1016 | RPMH_VREG("ldo15" , "ldo%s15" , &pmic5_pldo_lv, "vdd-l7-l12-l14-l15" ), |
1017 | RPMH_VREG("ldo16" , "ldo%s16" , &pmic5_pldo, "vdd-l13-l16-l17" ), |
1018 | RPMH_VREG("ldo17" , "ldo%s17" , &pmic5_pldo, "vdd-l13-l16-l17" ), |
1019 | RPMH_VREG("ldo18" , "ldo%s18" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ), |
1020 | {} |
1021 | }; |
1022 | |
1023 | static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = { |
1024 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ), |
1025 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps510, "vdd-s2" ), |
1026 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_ftsmps510, "vdd-s3" ), |
1027 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_ftsmps510, "vdd-s4" ), |
1028 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_ftsmps510, "vdd-s5" ), |
1029 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ), |
1030 | RPMH_VREG("smps7" , "smp%s7" , &pmic5_ftsmps510, "vdd-s7" ), |
1031 | RPMH_VREG("smps8" , "smp%s8" , &pmic5_hfsmps510, "vdd-s8" ), |
1032 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_pldo_lv, "vdd-l1-l8" ), |
1033 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l2-l3" ), |
1034 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l2-l3" ), |
1035 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_pldo, "vdd-l4-l5-l6" ), |
1036 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l4-l5-l6" ), |
1037 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l4-l5-l6" ), |
1038 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l7-l11" ), |
1039 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic5_pldo_lv, "vdd-l1-l8" ), |
1040 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic5_pldo, "vdd-l9-l10" ), |
1041 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic5_pldo, "vdd-l9-l10" ), |
1042 | RPMH_VREG("ldo11" , "ldo%s11" , &pmic5_pldo, "vdd-l7-l11" ), |
1043 | RPMH_VREG("bob" , "bob%s1" , &pmic5_bob, "vdd-bob" ), |
1044 | {} |
1045 | }; |
1046 | |
1047 | static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = { |
1048 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ), |
1049 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps510, "vdd-s2" ), |
1050 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_ftsmps510, "vdd-s3" ), |
1051 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_hfsmps510, "vdd-s4" ), |
1052 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_hfsmps510, "vdd-s5" ), |
1053 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ), |
1054 | RPMH_VREG("smps7" , "smp%s7" , &pmic5_ftsmps510, "vdd-s7" ), |
1055 | RPMH_VREG("smps8" , "smp%s8" , &pmic5_ftsmps510, "vdd-s8" ), |
1056 | RPMH_VREG("smps9" , "smp%s9" , &pmic5_ftsmps510, "vdd-s9" ), |
1057 | RPMH_VREG("smps10" , "smp%s10" , &pmic5_ftsmps510, "vdd-s10" ), |
1058 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1-l8-l11" ), |
1059 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_pldo, "vdd-l2-l10" ), |
1060 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ), |
1061 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ), |
1062 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ), |
1063 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_nldo, "vdd-l6-l9" ), |
1064 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_pldo_lv, "vdd-l7-l12-l14-l15" ), |
1065 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l1-l8-l11" ), |
1066 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l6-l9" ), |
1067 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic5_pldo, "vdd-l2-l10" ), |
1068 | RPMH_VREG("ldo11" , "ldo%s11" , &pmic5_nldo, "vdd-l1-l8-l11" ), |
1069 | RPMH_VREG("ldo12" , "ldo%s12" , &pmic5_pldo_lv, "vdd-l7-l12-l14-l15" ), |
1070 | RPMH_VREG("ldo13" , "ldo%s13" , &pmic5_pldo, "vdd-l13-l16-l17" ), |
1071 | RPMH_VREG("ldo14" , "ldo%s14" , &pmic5_pldo_lv, "vdd-l7-l12-l14-l15" ), |
1072 | RPMH_VREG("ldo15" , "ldo%s15" , &pmic5_pldo_lv, "vdd-l7-l12-l14-l15" ), |
1073 | RPMH_VREG("ldo16" , "ldo%s16" , &pmic5_pldo, "vdd-l13-l16-l17" ), |
1074 | RPMH_VREG("ldo17" , "ldo%s17" , &pmic5_pldo, "vdd-l13-l16-l17" ), |
1075 | RPMH_VREG("ldo18" , "ldo%s18" , &pmic5_nldo, "vdd-l3-l4-l5-l18" ), |
1076 | {} |
1077 | }; |
1078 | |
1079 | static const struct rpmh_vreg_init_data pmm8654au_vreg_data[] = { |
1080 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps527, "vdd-s1" ), |
1081 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps527, "vdd-s2" ), |
1082 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_ftsmps527, "vdd-s3" ), |
1083 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_ftsmps527, "vdd-s4" ), |
1084 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_ftsmps527, "vdd-s5" ), |
1085 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps527, "vdd-s6" ), |
1086 | RPMH_VREG("smps7" , "smp%s7" , &pmic5_ftsmps527, "vdd-s7" ), |
1087 | RPMH_VREG("smps8" , "smp%s8" , &pmic5_ftsmps527, "vdd-s8" ), |
1088 | RPMH_VREG("smps9" , "smp%s9" , &pmic5_ftsmps527, "vdd-s9" ), |
1089 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo515, "vdd-s9" ), |
1090 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo515, "vdd-l2-l3" ), |
1091 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo515, "vdd-l2-l3" ), |
1092 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_nldo515, "vdd-s9" ), |
1093 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_nldo515, "vdd-s9" ), |
1094 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_nldo515, "vdd-l6-l7" ), |
1095 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_nldo515, "vdd-l6-l7" ), |
1096 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic5_pldo515_mv, "vdd-l8-l9" ), |
1097 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic5_pldo, "vdd-l8-l9" ), |
1098 | {} |
1099 | }; |
1100 | |
1101 | static const struct rpmh_vreg_init_data pm8350_vreg_data[] = { |
1102 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ), |
1103 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps510, "vdd-s2" ), |
1104 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_ftsmps510, "vdd-s3" ), |
1105 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_ftsmps510, "vdd-s4" ), |
1106 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_ftsmps510, "vdd-s5" ), |
1107 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ), |
1108 | RPMH_VREG("smps7" , "smp%s7" , &pmic5_ftsmps510, "vdd-s7" ), |
1109 | RPMH_VREG("smps8" , "smp%s8" , &pmic5_ftsmps510, "vdd-s8" ), |
1110 | RPMH_VREG("smps9" , "smp%s9" , &pmic5_ftsmps510, "vdd-s9" ), |
1111 | RPMH_VREG("smps10" , "smp%s10" , &pmic5_hfsmps510, "vdd-s10" ), |
1112 | RPMH_VREG("smps11" , "smp%s11" , &pmic5_hfsmps510, "vdd-s11" ), |
1113 | RPMH_VREG("smps12" , "smp%s12" , &pmic5_hfsmps510, "vdd-s12" ), |
1114 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1-l4" ), |
1115 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_pldo, "vdd-l2-l7" ), |
1116 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3-l5" ), |
1117 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l1-l4" ), |
1118 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_nldo, "vdd-l3-l5" ), |
1119 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_nldo, "vdd-l6-l9-l10" ), |
1120 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l2-l7" ), |
1121 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l8" ), |
1122 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l6-l9-l10" ), |
1123 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic5_nldo, "vdd-l6-l9-l10" ), |
1124 | {} |
1125 | }; |
1126 | |
1127 | static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = { |
1128 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_hfsmps515, "vdd-s1" ), |
1129 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps510, "vdd-s2" ), |
1130 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_ftsmps510, "vdd-s3" ), |
1131 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_ftsmps510, "vdd-s4" ), |
1132 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_ftsmps510, "vdd-s5" ), |
1133 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ), |
1134 | RPMH_VREG("smps7" , "smp%s7" , &pmic5_ftsmps510, "vdd-s7" ), |
1135 | RPMH_VREG("smps8" , "smp%s8" , &pmic5_ftsmps510, "vdd-s8" ), |
1136 | RPMH_VREG("smps9" , "smp%s9" , &pmic5_ftsmps510, "vdd-s9" ), |
1137 | RPMH_VREG("smps10" , "smp%s10" , &pmic5_ftsmps510, "vdd-s10" ), |
1138 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_pldo_lv, "vdd-l1-l12" ), |
1139 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_pldo_lv, "vdd-l2-l8" ), |
1140 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_pldo, "vdd-l3-l4-l5-l7-l13" ), |
1141 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_pldo, "vdd-l3-l4-l5-l7-l13" ), |
1142 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l3-l4-l5-l7-l13" ), |
1143 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l6-l9-l11" ), |
1144 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l3-l4-l5-l7-l13" ), |
1145 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic5_pldo_lv, "vdd-l2-l8" ), |
1146 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic5_pldo, "vdd-l6-l9-l11" ), |
1147 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic5_nldo, "vdd-l10" ), |
1148 | RPMH_VREG("ldo11" , "ldo%s11" , &pmic5_pldo, "vdd-l6-l9-l11" ), |
1149 | RPMH_VREG("ldo12" , "ldo%s12" , &pmic5_pldo_lv, "vdd-l1-l12" ), |
1150 | RPMH_VREG("ldo13" , "ldo%s13" , &pmic5_pldo, "vdd-l3-l4-l5-l7-l13" ), |
1151 | RPMH_VREG("bob" , "bob%s1" , &pmic5_bob, "vdd-bob" ), |
1152 | {} |
1153 | }; |
1154 | |
1155 | static const struct rpmh_vreg_init_data pm8450_vreg_data[] = { |
1156 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps520, "vdd-s1" ), |
1157 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps520, "vdd-s2" ), |
1158 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_ftsmps520, "vdd-s3" ), |
1159 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_ftsmps520, "vdd-s4" ), |
1160 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_ftsmps520, "vdd-s5" ), |
1161 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps520, "vdd-s6" ), |
1162 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1" ), |
1163 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l2" ), |
1164 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3" ), |
1165 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_pldo_lv, "vdd-l4" ), |
1166 | {} |
1167 | }; |
1168 | |
1169 | static const struct rpmh_vreg_init_data pm8550_vreg_data[] = { |
1170 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo515, "vdd-l1-l4-l10" ), |
1171 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_pldo, "vdd-l2-l13-l14" ), |
1172 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo515, "vdd-l3" ), |
1173 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_nldo515, "vdd-l1-l4-l10" ), |
1174 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l5-l16" ), |
1175 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l6-l7" ), |
1176 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l6-l7" ), |
1177 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic5_pldo, "vdd-l8-l9" ), |
1178 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic5_pldo, "vdd-l8-l9" ), |
1179 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic5_nldo515, "vdd-l1-l4-l10" ), |
1180 | RPMH_VREG("ldo11" , "ldo%s11" , &pmic5_nldo515, "vdd-l11" ), |
1181 | RPMH_VREG("ldo12" , "ldo%s12" , &pmic5_nldo515, "vdd-l12" ), |
1182 | RPMH_VREG("ldo13" , "ldo%s13" , &pmic5_pldo, "vdd-l2-l13-l14" ), |
1183 | RPMH_VREG("ldo14" , "ldo%s14" , &pmic5_pldo, "vdd-l2-l13-l14" ), |
1184 | RPMH_VREG("ldo15" , "ldo%s15" , &pmic5_nldo515, "vdd-l15" ), |
1185 | RPMH_VREG("ldo16" , "ldo%s16" , &pmic5_pldo, "vdd-l5-l16" ), |
1186 | RPMH_VREG("ldo17" , "ldo%s17" , &pmic5_pldo, "vdd-l17" ), |
1187 | RPMH_VREG("bob1" , "bob%s1" , &pmic5_bob, "vdd-bob1" ), |
1188 | RPMH_VREG("bob2" , "bob%s2" , &pmic5_bob, "vdd-bob2" ), |
1189 | {} |
1190 | }; |
1191 | |
1192 | static const struct rpmh_vreg_init_data pm8550vs_vreg_data[] = { |
1193 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps525_lv, "vdd-s1" ), |
1194 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps525_lv, "vdd-s2" ), |
1195 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_ftsmps525_lv, "vdd-s3" ), |
1196 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_ftsmps525_lv, "vdd-s4" ), |
1197 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_ftsmps525_lv, "vdd-s5" ), |
1198 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps525_mv, "vdd-s6" ), |
1199 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo515, "vdd-l1" ), |
1200 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo515, "vdd-l2" ), |
1201 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo515, "vdd-l3" ), |
1202 | {} |
1203 | }; |
1204 | |
1205 | static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = { |
1206 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps525_lv, "vdd-s1" ), |
1207 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps525_lv, "vdd-s2" ), |
1208 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_ftsmps525_lv, "vdd-s3" ), |
1209 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_ftsmps525_mv, "vdd-s4" ), |
1210 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_ftsmps525_lv, "vdd-s5" ), |
1211 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps525_lv, "vdd-s6" ), |
1212 | RPMH_VREG("smps7" , "smp%s7" , &pmic5_ftsmps525_lv, "vdd-s7" ), |
1213 | RPMH_VREG("smps8" , "smp%s8" , &pmic5_ftsmps525_lv, "vdd-s8" ), |
1214 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo515, "vdd-l1" ), |
1215 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo515, "vdd-l2" ), |
1216 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo515, "vdd-l3" ), |
1217 | {} |
1218 | }; |
1219 | |
1220 | static const struct rpmh_vreg_init_data pmc8380_vreg_data[] = { |
1221 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps525_lv, "vdd-s1" ), |
1222 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps525_lv, "vdd-s2" ), |
1223 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_ftsmps525_lv, "vdd-s3" ), |
1224 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_ftsmps525_mv, "vdd-s4" ), |
1225 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_ftsmps525_lv, "vdd-s5" ), |
1226 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps525_lv, "vdd-s6" ), |
1227 | RPMH_VREG("smps7" , "smp%s7" , &pmic5_ftsmps525_lv, "vdd-s7" ), |
1228 | RPMH_VREG("smps8" , "smp%s8" , &pmic5_ftsmps525_lv, "vdd-s8" ), |
1229 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo515, "vdd-l1" ), |
1230 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo515, "vdd-l2" ), |
1231 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo515, "vdd-l3" ), |
1232 | {} |
1233 | }; |
1234 | |
1235 | static const struct rpmh_vreg_init_data pm8009_vreg_data[] = { |
1236 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_hfsmps510, "vdd-s1" ), |
1237 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_hfsmps515, "vdd-s2" ), |
1238 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1" ), |
1239 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l2" ), |
1240 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3" ), |
1241 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l4" ), |
1242 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l5-l6" ), |
1243 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l5-l6" ), |
1244 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_pldo_lv, "vdd-l7" ), |
1245 | {} |
1246 | }; |
1247 | |
1248 | static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = { |
1249 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_hfsmps510, "vdd-s1" ), |
1250 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_hfsmps515_1, "vdd-s2" ), |
1251 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1" ), |
1252 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l2" ), |
1253 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3" ), |
1254 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l4" ), |
1255 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l5-l6" ), |
1256 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l5-l6" ), |
1257 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_pldo_lv, "vdd-l7" ), |
1258 | {} |
1259 | }; |
1260 | |
1261 | static const struct rpmh_vreg_init_data pm8010_vreg_data[] = { |
1262 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo502, "vdd-l1-l2" ), |
1263 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo502, "vdd-l1-l2" ), |
1264 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_pldo502ln, "vdd-l3-l4" ), |
1265 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_pldo502ln, "vdd-l3-l4" ), |
1266 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_pldo502, "vdd-l5" ), |
1267 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_pldo502ln, "vdd-l6" ), |
1268 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_pldo502, "vdd-l7" ), |
1269 | }; |
1270 | |
1271 | static const struct rpmh_vreg_init_data pm6150_vreg_data[] = { |
1272 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ), |
1273 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps510, "vdd-s2" ), |
1274 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_ftsmps510, "vdd-s3" ), |
1275 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_hfsmps510, "vdd-s4" ), |
1276 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_hfsmps510, "vdd-s5" ), |
1277 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1" ), |
1278 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l2-l3" ), |
1279 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l2-l3" ), |
1280 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l4-l7-l8" ), |
1281 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l5-l16-l17-l18-l19" ), |
1282 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_nldo, "vdd-l6" ), |
1283 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_nldo, "vdd-l4-l7-l8" ), |
1284 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l4-l7-l8" ), |
1285 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l9" ), |
1286 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic5_pldo_lv, "vdd-l10-l14-l15" ), |
1287 | RPMH_VREG("ldo11" , "ldo%s11" , &pmic5_pldo_lv, "vdd-l11-l12-l13" ), |
1288 | RPMH_VREG("ldo12" , "ldo%s12" , &pmic5_pldo_lv, "vdd-l11-l12-l13" ), |
1289 | RPMH_VREG("ldo13" , "ldo%s13" , &pmic5_pldo_lv, "vdd-l11-l12-l13" ), |
1290 | RPMH_VREG("ldo14" , "ldo%s14" , &pmic5_pldo_lv, "vdd-l10-l14-l15" ), |
1291 | RPMH_VREG("ldo15" , "ldo%s15" , &pmic5_pldo_lv, "vdd-l10-l14-l15" ), |
1292 | RPMH_VREG("ldo16" , "ldo%s16" , &pmic5_pldo, "vdd-l5-l16-l17-l18-l19" ), |
1293 | RPMH_VREG("ldo17" , "ldo%s17" , &pmic5_pldo, "vdd-l5-l16-l17-l18-l19" ), |
1294 | RPMH_VREG("ldo18" , "ldo%s18" , &pmic5_pldo, "vdd-l5-l16-l17-l18-l19" ), |
1295 | RPMH_VREG("ldo19" , "ldo%s19" , &pmic5_pldo, "vdd-l5-l16-l17-l18-l19" ), |
1296 | {} |
1297 | }; |
1298 | |
1299 | static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = { |
1300 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ), |
1301 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps510, "vdd-s2" ), |
1302 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_ftsmps510, "vdd-s3" ), |
1303 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_ftsmps510, "vdd-s4" ), |
1304 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_ftsmps510, "vdd-s5" ), |
1305 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ), |
1306 | RPMH_VREG("smps7" , "smp%s7" , &pmic5_ftsmps510, "vdd-s7" ), |
1307 | RPMH_VREG("smps8" , "smp%s8" , &pmic5_hfsmps510, "vdd-s8" ), |
1308 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_pldo_lv, "vdd-l1-l8" ), |
1309 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l2-l3" ), |
1310 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l2-l3" ), |
1311 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_pldo, "vdd-l4-l5-l6" ), |
1312 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l4-l5-l6" ), |
1313 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l4-l5-l6" ), |
1314 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l7-l11" ), |
1315 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic5_pldo, "vdd-l1-l8" ), |
1316 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic5_pldo, "vdd-l9-l10" ), |
1317 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic5_pldo, "vdd-l9-l10" ), |
1318 | RPMH_VREG("ldo11" , "ldo%s11" , &pmic5_pldo, "vdd-l7-l11" ), |
1319 | RPMH_VREG("bob" , "bob%s1" , &pmic5_bob, "vdd-bob" ), |
1320 | {} |
1321 | }; |
1322 | |
1323 | static const struct rpmh_vreg_init_data pm6350_vreg_data[] = { |
1324 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps510, NULL), |
1325 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_hfsmps510, NULL), |
1326 | /* smps3 - smps5 not configured */ |
1327 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo, NULL), |
1328 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_pldo, NULL), |
1329 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_pldo, NULL), |
1330 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_nldo, NULL), |
1331 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_pldo, NULL), |
1332 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_pldo, NULL), |
1333 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_pldo, NULL), |
1334 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic5_pldo, NULL), |
1335 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic5_pldo, NULL), |
1336 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic5_pldo, NULL), |
1337 | RPMH_VREG("ldo11" , "ldo%s11" , &pmic5_pldo, NULL), |
1338 | RPMH_VREG("ldo12" , "ldo%s12" , &pmic5_pldo, NULL), |
1339 | RPMH_VREG("ldo13" , "ldo%s13" , &pmic5_nldo, NULL), |
1340 | RPMH_VREG("ldo14" , "ldo%s14" , &pmic5_pldo, NULL), |
1341 | RPMH_VREG("ldo15" , "ldo%s15" , &pmic5_nldo, NULL), |
1342 | RPMH_VREG("ldo16" , "ldo%s16" , &pmic5_nldo, NULL), |
1343 | /* ldo17 not configured */ |
1344 | RPMH_VREG("ldo18" , "ldo%s18" , &pmic5_nldo, NULL), |
1345 | RPMH_VREG("ldo19" , "ldo%s19" , &pmic5_nldo, NULL), |
1346 | RPMH_VREG("ldo20" , "ldo%s20" , &pmic5_nldo, NULL), |
1347 | RPMH_VREG("ldo21" , "ldo%s21" , &pmic5_nldo, NULL), |
1348 | RPMH_VREG("ldo22" , "ldo%s22" , &pmic5_nldo, NULL), |
1349 | }; |
1350 | |
1351 | static const struct rpmh_vreg_init_data pmx55_vreg_data[] = { |
1352 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ), |
1353 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_hfsmps510, "vdd-s2" ), |
1354 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_hfsmps510, "vdd-s3" ), |
1355 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_hfsmps510, "vdd-s4" ), |
1356 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_hfsmps510, "vdd-s5" ), |
1357 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ), |
1358 | RPMH_VREG("smps7" , "smp%s7" , &pmic5_hfsmps510, "vdd-s7" ), |
1359 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1-l2" ), |
1360 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l1-l2" ), |
1361 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3-l9" ), |
1362 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l4-l12" ), |
1363 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l5-l6" ), |
1364 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l5-l6" ), |
1365 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_nldo, "vdd-l7-l8" ), |
1366 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l7-l8" ), |
1367 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l3-l9" ), |
1368 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic5_pldo, "vdd-l10-l11-l13" ), |
1369 | RPMH_VREG("ldo11" , "ldo%s11" , &pmic5_pldo, "vdd-l10-l11-l13" ), |
1370 | RPMH_VREG("ldo12" , "ldo%s12" , &pmic5_nldo, "vdd-l4-l12" ), |
1371 | RPMH_VREG("ldo13" , "ldo%s13" , &pmic5_pldo, "vdd-l10-l11-l13" ), |
1372 | RPMH_VREG("ldo14" , "ldo%s14" , &pmic5_nldo, "vdd-l14" ), |
1373 | RPMH_VREG("ldo15" , "ldo%s15" , &pmic5_nldo, "vdd-l15" ), |
1374 | RPMH_VREG("ldo16" , "ldo%s16" , &pmic5_pldo, "vdd-l16" ), |
1375 | {} |
1376 | }; |
1377 | |
1378 | static const struct rpmh_vreg_init_data pmx65_vreg_data[] = { |
1379 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps510, "vdd-s1" ), |
1380 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_hfsmps510, "vdd-s2" ), |
1381 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_hfsmps510, "vdd-s3" ), |
1382 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_hfsmps510, "vdd-s4" ), |
1383 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_hfsmps510, "vdd-s5" ), |
1384 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps510, "vdd-s6" ), |
1385 | RPMH_VREG("smps7" , "smp%s7" , &pmic5_hfsmps510, "vdd-s7" ), |
1386 | RPMH_VREG("smps8" , "smp%s8" , &pmic5_hfsmps510, "vdd-s8" ), |
1387 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1" ), |
1388 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l2-l18" ), |
1389 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3" ), |
1390 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l4" ), |
1391 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_pldo, "vdd-l5-l6-l16" ), |
1392 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_pldo, "vdd-l5-l6-l16" ), |
1393 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_nldo, "vdd-l7" ), |
1394 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l8-l9" ), |
1395 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l8-l9" ), |
1396 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic5_pldo, "vdd-l10" ), |
1397 | RPMH_VREG("ldo11" , "ldo%s11" , &pmic5_pldo, "vdd-l11-l13" ), |
1398 | RPMH_VREG("ldo12" , "ldo%s12" , &pmic5_nldo, "vdd-l12" ), |
1399 | RPMH_VREG("ldo13" , "ldo%s13" , &pmic5_pldo, "vdd-l11-l13" ), |
1400 | RPMH_VREG("ldo14" , "ldo%s14" , &pmic5_nldo, "vdd-l14" ), |
1401 | RPMH_VREG("ldo15" , "ldo%s15" , &pmic5_nldo, "vdd-l15" ), |
1402 | RPMH_VREG("ldo16" , "ldo%s16" , &pmic5_pldo, "vdd-l5-l6-l16" ), |
1403 | RPMH_VREG("ldo17" , "ldo%s17" , &pmic5_nldo, "vdd-l17" ), |
1404 | /* ldo18 not configured */ |
1405 | RPMH_VREG("ldo19" , "ldo%s19" , &pmic5_nldo, "vdd-l19" ), |
1406 | RPMH_VREG("ldo20" , "ldo%s20" , &pmic5_nldo, "vdd-l20" ), |
1407 | RPMH_VREG("ldo21" , "ldo%s21" , &pmic5_nldo, "vdd-l21" ), |
1408 | {} |
1409 | }; |
1410 | |
1411 | static const struct rpmh_vreg_init_data pmx75_vreg_data[] = { |
1412 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps525_lv, "vdd-s1" ), |
1413 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps525_lv, "vdd-s2" ), |
1414 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_ftsmps525_lv, "vdd-s3" ), |
1415 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_ftsmps525_mv, "vdd-s4" ), |
1416 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_ftsmps525_lv, "vdd-s5" ), |
1417 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps525_lv, "vdd-s6" ), |
1418 | RPMH_VREG("smps7" , "smp%s7" , &pmic5_ftsmps525_lv, "vdd-s7" ), |
1419 | RPMH_VREG("smps8" , "smp%s8" , &pmic5_ftsmps525_lv, "vdd-s8" ), |
1420 | RPMH_VREG("smps9" , "smp%s9" , &pmic5_ftsmps525_lv, "vdd-s9" ), |
1421 | RPMH_VREG("smps10" , "smp%s10" , &pmic5_ftsmps525_lv, "vdd-s10" ), |
1422 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo515, "vdd-l1" ), |
1423 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo515, "vdd-l2-18" ), |
1424 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo515, "vdd-l3" ), |
1425 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_nldo515, "vdd-l4-l16" ), |
1426 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_pldo_lv, "vdd-l5-l6" ), |
1427 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_pldo_lv, "vdd-l5-l6" ), |
1428 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_nldo515, "vdd-l7" ), |
1429 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic5_nldo515, "vdd-l8-l9" ), |
1430 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic5_nldo515, "vdd-l8-l9" ), |
1431 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic5_pldo, "vdd-l10" ), |
1432 | RPMH_VREG("ldo11" , "ldo%s11" , &pmic5_pldo, "vdd-l11-l13" ), |
1433 | RPMH_VREG("ldo12" , "ldo%s12" , &pmic5_nldo515, "vdd-l12" ), |
1434 | RPMH_VREG("ldo13" , "ldo%s13" , &pmic5_pldo, "vdd-l11-l13" ), |
1435 | RPMH_VREG("ldo14" , "ldo%s14" , &pmic5_nldo515, "vdd-l14" ), |
1436 | RPMH_VREG("ldo15" , "ldo%s15" , &pmic5_nldo515, "vdd-l15" ), |
1437 | RPMH_VREG("ldo16" , "ldo%s16" , &pmic5_nldo515, "vdd-l4-l16" ), |
1438 | RPMH_VREG("ldo17" , "ldo%s17" , &pmic5_nldo515, "vdd-l17" ), |
1439 | /* ldo18 not configured */ |
1440 | RPMH_VREG("ldo19" , "ldo%s19" , &pmic5_nldo515, "vdd-l19" ), |
1441 | RPMH_VREG("ldo20" , "ldo%s20" , &pmic5_nldo515, "vdd-l20-l21" ), |
1442 | RPMH_VREG("ldo21" , "ldo%s21" , &pmic5_nldo515, "vdd-l20-l21" ), |
1443 | }; |
1444 | |
1445 | static const struct rpmh_vreg_init_data pm7325_vreg_data[] = { |
1446 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_hfsmps510, "vdd-s1" ), |
1447 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps520, "vdd-s2" ), |
1448 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_ftsmps520, "vdd-s3" ), |
1449 | RPMH_VREG("smps4" , "smp%s4" , &pmic5_ftsmps520, "vdd-s4" ), |
1450 | RPMH_VREG("smps5" , "smp%s5" , &pmic5_ftsmps520, "vdd-s5" ), |
1451 | RPMH_VREG("smps6" , "smp%s6" , &pmic5_ftsmps520, "vdd-s6" ), |
1452 | RPMH_VREG("smps7" , "smp%s7" , &pmic5_ftsmps520, "vdd-s7" ), |
1453 | RPMH_VREG("smps8" , "smp%s8" , &pmic5_hfsmps510, "vdd-s8" ), |
1454 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1-l4-l12-l15" ), |
1455 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_pldo, "vdd-l2-l7" ), |
1456 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3" ), |
1457 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_nldo, "vdd-l1-l4-l12-l15" ), |
1458 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_nldo, "vdd-l5" ), |
1459 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_nldo, "vdd-l6-l9-l10" ), |
1460 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l2-l7" ), |
1461 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic5_nldo, "vdd-l8" ), |
1462 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic5_nldo, "vdd-l6-l9-l10" ), |
1463 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic5_nldo, "vdd-l6-l9-l10" ), |
1464 | RPMH_VREG("ldo11" , "ldo%s11" , &pmic5_pldo_lv, "vdd-l11-l17-l18-l19" ), |
1465 | RPMH_VREG("ldo12" , "ldo%s12" , &pmic5_nldo, "vdd-l1-l4-l12-l15" ), |
1466 | RPMH_VREG("ldo13" , "ldo%s13" , &pmic5_nldo, "vdd-l13" ), |
1467 | RPMH_VREG("ldo14" , "ldo%s14" , &pmic5_nldo, "vdd-l14-l16" ), |
1468 | RPMH_VREG("ldo15" , "ldo%s15" , &pmic5_nldo, "vdd-l1-l4-l12-l15" ), |
1469 | RPMH_VREG("ldo16" , "ldo%s16" , &pmic5_nldo, "vdd-l14-l16" ), |
1470 | RPMH_VREG("ldo17" , "ldo%s17" , &pmic5_pldo_lv, "vdd-l11-l17-l18-l19" ), |
1471 | RPMH_VREG("ldo18" , "ldo%s18" , &pmic5_pldo_lv, "vdd-l11-l17-l18-l19" ), |
1472 | RPMH_VREG("ldo19" , "ldo%s19" , &pmic5_pldo_lv, "vdd-l11-l17-l18-l19" ), |
1473 | {} |
1474 | }; |
1475 | |
1476 | static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = { |
1477 | RPMH_VREG("smps1" , "smp%s1" , &pmic5_ftsmps520, "vdd-s1" ), |
1478 | RPMH_VREG("smps2" , "smp%s2" , &pmic5_ftsmps520, "vdd-s2" ), |
1479 | RPMH_VREG("smps3" , "smp%s3" , &pmic5_hfsmps515, "vdd-s3" ), |
1480 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic5_nldo, "vdd-l1-l2" ), |
1481 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic5_nldo, "vdd-l1-l2" ), |
1482 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic5_nldo, "vdd-l3" ), |
1483 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic5_pldo_lv, "vdd-l4" ), |
1484 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic5_nldo, "vdd-l5-l6" ), |
1485 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic5_nldo, "vdd-l5-l6" ), |
1486 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic5_pldo, "vdd-l7-bob" ), |
1487 | {} |
1488 | }; |
1489 | |
1490 | static const struct rpmh_vreg_init_data pm660_vreg_data[] = { |
1491 | RPMH_VREG("smps1" , "smp%s1" , &pmic4_ftsmps426, "vdd-s1" ), |
1492 | RPMH_VREG("smps2" , "smp%s2" , &pmic4_ftsmps426, "vdd-s2" ), |
1493 | RPMH_VREG("smps3" , "smp%s3" , &pmic4_ftsmps426, "vdd-s3" ), |
1494 | RPMH_VREG("smps4" , "smp%s4" , &pmic4_hfsmps3, "vdd-s4" ), |
1495 | RPMH_VREG("smps5" , "smp%s5" , &pmic4_hfsmps3, "vdd-s5" ), |
1496 | RPMH_VREG("smps6" , "smp%s6" , &pmic4_hfsmps3, "vdd-s6" ), |
1497 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic4_nldo, "vdd-l1-l6-l7" ), |
1498 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic4_nldo, "vdd-l2-l3" ), |
1499 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic4_nldo, "vdd-l2-l3" ), |
1500 | /* ldo4 is inaccessible on PM660 */ |
1501 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic4_nldo, "vdd-l5" ), |
1502 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic4_nldo, "vdd-l1-l6-l7" ), |
1503 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic4_nldo, "vdd-l1-l6-l7" ), |
1504 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14" ), |
1505 | RPMH_VREG("ldo9" , "ldo%s9" , &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14" ), |
1506 | RPMH_VREG("ldo10" , "ldo%s10" , &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14" ), |
1507 | RPMH_VREG("ldo11" , "ldo%s11" , &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14" ), |
1508 | RPMH_VREG("ldo12" , "ldo%s12" , &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14" ), |
1509 | RPMH_VREG("ldo13" , "ldo%s13" , &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14" ), |
1510 | RPMH_VREG("ldo14" , "ldo%s14" , &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14" ), |
1511 | RPMH_VREG("ldo15" , "ldo%s15" , &pmic4_pldo, "vdd-l15-l16-l17-l18-l19" ), |
1512 | RPMH_VREG("ldo16" , "ldo%s16" , &pmic4_pldo, "vdd-l15-l16-l17-l18-l19" ), |
1513 | RPMH_VREG("ldo17" , "ldo%s17" , &pmic4_pldo, "vdd-l15-l16-l17-l18-l19" ), |
1514 | RPMH_VREG("ldo18" , "ldo%s18" , &pmic4_pldo, "vdd-l15-l16-l17-l18-l19" ), |
1515 | RPMH_VREG("ldo19" , "ldo%s19" , &pmic4_pldo, "vdd-l15-l16-l17-l18-l19" ), |
1516 | {} |
1517 | }; |
1518 | |
1519 | static const struct rpmh_vreg_init_data pm660l_vreg_data[] = { |
1520 | RPMH_VREG("smps1" , "smp%s1" , &pmic4_ftsmps426, "vdd-s1" ), |
1521 | RPMH_VREG("smps2" , "smp%s2" , &pmic4_ftsmps426, "vdd-s2" ), |
1522 | RPMH_VREG("smps3" , "smp%s3" , &pmic4_ftsmps426, "vdd-s3-s4" ), |
1523 | RPMH_VREG("smps5" , "smp%s5" , &pmic4_ftsmps426, "vdd-s5" ), |
1524 | RPMH_VREG("ldo1" , "ldo%s1" , &pmic4_nldo, "vdd-l1-l9-l10" ), |
1525 | RPMH_VREG("ldo2" , "ldo%s2" , &pmic4_pldo, "vdd-l2" ), |
1526 | RPMH_VREG("ldo3" , "ldo%s3" , &pmic4_pldo, "vdd-l3-l5-l7-l8" ), |
1527 | RPMH_VREG("ldo4" , "ldo%s4" , &pmic4_pldo, "vdd-l4-l6" ), |
1528 | RPMH_VREG("ldo5" , "ldo%s5" , &pmic4_pldo, "vdd-l3-l5-l7-l8" ), |
1529 | RPMH_VREG("ldo6" , "ldo%s6" , &pmic4_pldo, "vdd-l4-l6" ), |
1530 | RPMH_VREG("ldo7" , "ldo%s7" , &pmic4_pldo, "vdd-l3-l5-l7-l8" ), |
1531 | RPMH_VREG("ldo8" , "ldo%s8" , &pmic4_pldo, "vdd-l3-l5-l7-l8" ), |
1532 | RPMH_VREG("bob" , "bob%s1" , &pmic4_bob, "vdd-bob" ), |
1533 | {} |
1534 | }; |
1535 | |
1536 | static int rpmh_regulator_probe(struct platform_device *pdev) |
1537 | { |
1538 | struct device *dev = &pdev->dev; |
1539 | const struct rpmh_vreg_init_data *vreg_data; |
1540 | struct device_node *node; |
1541 | struct rpmh_vreg *vreg; |
1542 | const char *pmic_id; |
1543 | int ret; |
1544 | |
1545 | vreg_data = of_device_get_match_data(dev); |
1546 | if (!vreg_data) |
1547 | return -ENODEV; |
1548 | |
1549 | ret = of_property_read_string(np: dev->of_node, propname: "qcom,pmic-id" , out_string: &pmic_id); |
1550 | if (ret < 0) { |
1551 | dev_err(dev, "qcom,pmic-id missing in DT node\n" ); |
1552 | return ret; |
1553 | } |
1554 | |
1555 | for_each_available_child_of_node(dev->of_node, node) { |
1556 | vreg = devm_kzalloc(dev, size: sizeof(*vreg), GFP_KERNEL); |
1557 | if (!vreg) { |
1558 | of_node_put(node); |
1559 | return -ENOMEM; |
1560 | } |
1561 | |
1562 | ret = rpmh_regulator_init_vreg(vreg, dev, node, pmic_id, |
1563 | pmic_rpmh_data: vreg_data); |
1564 | if (ret < 0) { |
1565 | of_node_put(node); |
1566 | return ret; |
1567 | } |
1568 | } |
1569 | |
1570 | return 0; |
1571 | } |
1572 | |
1573 | static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = { |
1574 | { |
1575 | .compatible = "qcom,pm8005-rpmh-regulators" , |
1576 | .data = pm8005_vreg_data, |
1577 | }, |
1578 | { |
1579 | .compatible = "qcom,pm8009-rpmh-regulators" , |
1580 | .data = pm8009_vreg_data, |
1581 | }, |
1582 | { |
1583 | .compatible = "qcom,pm8009-1-rpmh-regulators" , |
1584 | .data = pm8009_1_vreg_data, |
1585 | }, |
1586 | { |
1587 | .compatible = "qcom,pm8010-rpmh-regulators" , |
1588 | .data = pm8010_vreg_data, |
1589 | }, |
1590 | { |
1591 | .compatible = "qcom,pm8150-rpmh-regulators" , |
1592 | .data = pm8150_vreg_data, |
1593 | }, |
1594 | { |
1595 | .compatible = "qcom,pm8150l-rpmh-regulators" , |
1596 | .data = pm8150l_vreg_data, |
1597 | }, |
1598 | { |
1599 | .compatible = "qcom,pm8350-rpmh-regulators" , |
1600 | .data = pm8350_vreg_data, |
1601 | }, |
1602 | { |
1603 | .compatible = "qcom,pm8350c-rpmh-regulators" , |
1604 | .data = pm8350c_vreg_data, |
1605 | }, |
1606 | { |
1607 | .compatible = "qcom,pm8450-rpmh-regulators" , |
1608 | .data = pm8450_vreg_data, |
1609 | }, |
1610 | { |
1611 | .compatible = "qcom,pm8550-rpmh-regulators" , |
1612 | .data = pm8550_vreg_data, |
1613 | }, |
1614 | { |
1615 | .compatible = "qcom,pm8550ve-rpmh-regulators" , |
1616 | .data = pm8550ve_vreg_data, |
1617 | }, |
1618 | { |
1619 | .compatible = "qcom,pm8550vs-rpmh-regulators" , |
1620 | .data = pm8550vs_vreg_data, |
1621 | }, |
1622 | { |
1623 | .compatible = "qcom,pm8998-rpmh-regulators" , |
1624 | .data = pm8998_vreg_data, |
1625 | }, |
1626 | { |
1627 | .compatible = "qcom,pmg1110-rpmh-regulators" , |
1628 | .data = pmg1110_vreg_data, |
1629 | }, |
1630 | { |
1631 | .compatible = "qcom,pmi8998-rpmh-regulators" , |
1632 | .data = pmi8998_vreg_data, |
1633 | }, |
1634 | { |
1635 | .compatible = "qcom,pm6150-rpmh-regulators" , |
1636 | .data = pm6150_vreg_data, |
1637 | }, |
1638 | { |
1639 | .compatible = "qcom,pm6150l-rpmh-regulators" , |
1640 | .data = pm6150l_vreg_data, |
1641 | }, |
1642 | { |
1643 | .compatible = "qcom,pm6350-rpmh-regulators" , |
1644 | .data = pm6350_vreg_data, |
1645 | }, |
1646 | { |
1647 | .compatible = "qcom,pmc8180-rpmh-regulators" , |
1648 | .data = pm8150_vreg_data, |
1649 | }, |
1650 | { |
1651 | .compatible = "qcom,pmc8180c-rpmh-regulators" , |
1652 | .data = pm8150l_vreg_data, |
1653 | }, |
1654 | { |
1655 | .compatible = "qcom,pmc8380-rpmh-regulators" , |
1656 | .data = pmc8380_vreg_data, |
1657 | }, |
1658 | { |
1659 | .compatible = "qcom,pmm8155au-rpmh-regulators" , |
1660 | .data = pmm8155au_vreg_data, |
1661 | }, |
1662 | { |
1663 | .compatible = "qcom,pmm8654au-rpmh-regulators" , |
1664 | .data = pmm8654au_vreg_data, |
1665 | }, |
1666 | { |
1667 | .compatible = "qcom,pmx55-rpmh-regulators" , |
1668 | .data = pmx55_vreg_data, |
1669 | }, |
1670 | { |
1671 | .compatible = "qcom,pmx65-rpmh-regulators" , |
1672 | .data = pmx65_vreg_data, |
1673 | }, |
1674 | { |
1675 | .compatible = "qcom,pmx75-rpmh-regulators" , |
1676 | .data = pmx75_vreg_data, |
1677 | }, |
1678 | { |
1679 | .compatible = "qcom,pm7325-rpmh-regulators" , |
1680 | .data = pm7325_vreg_data, |
1681 | }, |
1682 | { |
1683 | .compatible = "qcom,pmr735a-rpmh-regulators" , |
1684 | .data = pmr735a_vreg_data, |
1685 | }, |
1686 | { |
1687 | .compatible = "qcom,pm660-rpmh-regulators" , |
1688 | .data = pm660_vreg_data, |
1689 | }, |
1690 | { |
1691 | .compatible = "qcom,pm660l-rpmh-regulators" , |
1692 | .data = pm660l_vreg_data, |
1693 | }, |
1694 | {} |
1695 | }; |
1696 | MODULE_DEVICE_TABLE(of, rpmh_regulator_match_table); |
1697 | |
1698 | static struct platform_driver rpmh_regulator_driver = { |
1699 | .driver = { |
1700 | .name = "qcom-rpmh-regulator" , |
1701 | .probe_type = PROBE_PREFER_ASYNCHRONOUS, |
1702 | .of_match_table = of_match_ptr(rpmh_regulator_match_table), |
1703 | }, |
1704 | .probe = rpmh_regulator_probe, |
1705 | }; |
1706 | module_platform_driver(rpmh_regulator_driver); |
1707 | |
1708 | MODULE_DESCRIPTION("Qualcomm RPMh regulator driver" ); |
1709 | MODULE_LICENSE("GPL v2" ); |
1710 | |