| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * Copyright (c) 2017 Pengutronix, Oleksij Rempel <kernel@pengutronix.de> |
| 4 | * Copyright 2021 NXP |
| 5 | */ |
| 6 | |
| 7 | #ifndef _IMX_RPROC_H |
| 8 | #define _IMX_RPROC_H |
| 9 | |
| 10 | /* address translation table */ |
| 11 | struct imx_rproc_att { |
| 12 | u32 da; /* device address (From Cortex M4 view)*/ |
| 13 | u32 sa; /* system bus address */ |
| 14 | u32 size; /* size of reg range */ |
| 15 | int flags; |
| 16 | }; |
| 17 | |
| 18 | /* Remote core start/stop method */ |
| 19 | enum imx_rproc_method { |
| 20 | IMX_RPROC_NONE, |
| 21 | /* Through syscon regmap */ |
| 22 | IMX_RPROC_MMIO, |
| 23 | /* Through ARM SMCCC */ |
| 24 | IMX_RPROC_SMC, |
| 25 | /* Through System Control Unit API */ |
| 26 | IMX_RPROC_SCU_API, |
| 27 | /* Through Reset Controller API */ |
| 28 | IMX_RPROC_RESET_CONTROLLER, |
| 29 | }; |
| 30 | |
| 31 | /* dcfg flags */ |
| 32 | #define IMX_RPROC_NEED_SYSTEM_OFF BIT(0) |
| 33 | |
| 34 | struct imx_rproc_dcfg { |
| 35 | u32 src_reg; |
| 36 | u32 src_mask; |
| 37 | u32 src_start; |
| 38 | u32 src_stop; |
| 39 | u32 gpr_reg; |
| 40 | u32 gpr_wait; |
| 41 | const struct imx_rproc_att *att; |
| 42 | size_t att_size; |
| 43 | enum imx_rproc_method method; |
| 44 | u32 flags; |
| 45 | }; |
| 46 | |
| 47 | #endif /* _IMX_RPROC_H */ |
| 48 | |