1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Watchdog Timer Driver
4 * for ITE IT87xx Environment Control - Low Pin Count Input / Output
5 *
6 * (c) Copyright 2007 Oliver Schuster <olivers137@aol.com>
7 *
8 * Based on softdog.c by Alan Cox,
9 * 83977f_wdt.c by Jose Goncalves,
10 * it87.c by Chris Gauthron, Jean Delvare
11 *
12 * Data-sheets: Publicly available at the ITE website
13 * http://www.ite.com.tw/
14 *
15 * Support of the watchdog timers, which are available on
16 * IT8607, IT8613, IT8620, IT8622, IT8625, IT8628, IT8655, IT8659,
17 * IT8665, IT8686, IT8702, IT8712, IT8716, IT8718, IT8720, IT8721,
18 * IT8726, IT8728, IT8772, IT8783, IT8784 and IT8786.
19 */
20
21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
23#include <linux/bits.h>
24#include <linux/dmi.h>
25#include <linux/errno.h>
26#include <linux/init.h>
27#include <linux/io.h>
28#include <linux/ioport.h>
29#include <linux/module.h>
30#include <linux/moduleparam.h>
31#include <linux/printk.h>
32#include <linux/types.h>
33#include <linux/watchdog.h>
34
35#define WATCHDOG_NAME "IT87 WDT"
36
37/* Defaults for Module Parameter */
38#define DEFAULT_TIMEOUT 60
39#define DEFAULT_TESTMODE 0
40#define DEFAULT_NOWAYOUT WATCHDOG_NOWAYOUT
41
42/* IO Ports */
43#define REG 0x2e
44#define VAL 0x2f
45
46/* Logical device Numbers LDN */
47#define EC 0x04
48#define GPIO 0x07
49
50/* Configuration Registers and Functions */
51#define LDNREG 0x07
52#define CHIPID 0x20
53#define CHIPREV 0x22
54
55/* Chip Id numbers */
56#define NO_DEV_ID 0xffff
57#define IT8607_ID 0x8607
58#define IT8613_ID 0x8613
59#define IT8620_ID 0x8620
60#define IT8622_ID 0x8622
61#define IT8625_ID 0x8625
62#define IT8628_ID 0x8628
63#define IT8655_ID 0x8655
64#define IT8659_ID 0x8659
65#define IT8665_ID 0x8665
66#define IT8686_ID 0x8686
67#define IT8702_ID 0x8702
68#define IT8705_ID 0x8705
69#define IT8712_ID 0x8712
70#define IT8716_ID 0x8716
71#define IT8718_ID 0x8718
72#define IT8720_ID 0x8720
73#define IT8721_ID 0x8721
74#define IT8726_ID 0x8726 /* the data sheet suggest wrongly 0x8716 */
75#define IT8728_ID 0x8728
76#define IT8772_ID 0x8772
77#define IT8783_ID 0x8783
78#define IT8784_ID 0x8784
79#define IT8786_ID 0x8786
80
81/* Environment Controller Configuration Registers LDN=0x04 */
82#define SCR1 0xfa
83
84/* Environment Controller Bits SCR1 */
85#define WDT_PWRGD 0x20
86
87/* GPIO Configuration Registers LDN=0x07 */
88#define WDTCTRL 0x71
89#define WDTCFG 0x72
90#define WDTVALLSB 0x73
91#define WDTVALMSB 0x74
92
93/* GPIO Bits WDTCFG */
94#define WDT_TOV1 0x80
95#define WDT_KRST 0x40
96#define WDT_TOVE 0x20
97#define WDT_PWROK 0x10 /* not in it8721 */
98#define WDT_INT_MASK 0x0f
99
100static unsigned int max_units, chip_type;
101
102static unsigned int timeout = DEFAULT_TIMEOUT;
103static int testmode = DEFAULT_TESTMODE;
104static bool nowayout = DEFAULT_NOWAYOUT;
105
106module_param(timeout, int, 0);
107MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
108 __MODULE_STRING(DEFAULT_TIMEOUT));
109module_param(testmode, int, 0);
110MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
111 __MODULE_STRING(DEFAULT_TESTMODE));
112module_param(nowayout, bool, 0);
113MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
114 __MODULE_STRING(WATCHDOG_NOWAYOUT));
115
116/* Superio Chip */
117
118static inline int superio_enter(void)
119{
120 /*
121 * Try to reserve REG and REG + 1 for exclusive access.
122 */
123 if (!request_muxed_region(REG, 2, WATCHDOG_NAME))
124 return -EBUSY;
125
126 outb(value: 0x87, REG);
127 outb(value: 0x01, REG);
128 outb(value: 0x55, REG);
129 outb(value: 0x55, REG);
130 return 0;
131}
132
133static inline void superio_exit(void)
134{
135 outb(value: 0x02, REG);
136 outb(value: 0x02, VAL);
137 release_region(REG, 2);
138}
139
140static inline void superio_select(int ldn)
141{
142 outb(LDNREG, REG);
143 outb(value: ldn, VAL);
144}
145
146static inline int superio_inb(int reg)
147{
148 outb(value: reg, REG);
149 return inb(VAL);
150}
151
152static inline void superio_outb(int val, int reg)
153{
154 outb(value: reg, REG);
155 outb(value: val, VAL);
156}
157
158static inline int superio_inw(int reg)
159{
160 int val;
161
162 outb(value: reg++, REG);
163 val = inb(VAL) << 8;
164 outb(value: reg, REG);
165 val |= inb(VAL);
166 return val;
167}
168
169/* Internal function, should be called after superio_select(GPIO) */
170static void _wdt_update_timeout(unsigned int t)
171{
172 unsigned char cfg = WDT_KRST;
173
174 if (testmode)
175 cfg = 0;
176
177 if (t <= max_units)
178 cfg |= WDT_TOV1;
179 else
180 t /= 60;
181
182 if (chip_type != IT8721_ID)
183 cfg |= WDT_PWROK;
184
185 superio_outb(val: cfg, WDTCFG);
186 superio_outb(val: t, WDTVALLSB);
187 if (max_units > 255)
188 superio_outb(val: t >> 8, WDTVALMSB);
189}
190
191static int wdt_update_timeout(unsigned int t)
192{
193 int ret;
194
195 ret = superio_enter();
196 if (ret)
197 return ret;
198
199 superio_select(GPIO);
200 _wdt_update_timeout(t);
201 superio_exit();
202
203 return 0;
204}
205
206static int wdt_round_time(int t)
207{
208 t += 59;
209 t -= t % 60;
210 return t;
211}
212
213/* watchdog timer handling */
214
215static int wdt_start(struct watchdog_device *wdd)
216{
217 return wdt_update_timeout(t: wdd->timeout);
218}
219
220static int wdt_stop(struct watchdog_device *wdd)
221{
222 return wdt_update_timeout(t: 0);
223}
224
225/**
226 * wdt_set_timeout - set a new timeout value with watchdog ioctl
227 * @wdd: pointer to the watchdog_device structure
228 * @t: timeout value in seconds
229 *
230 * The hardware device has a 8 or 16 bit watchdog timer (depends on
231 * chip version) that can be configured to count seconds or minutes.
232 *
233 * Used within WDIOC_SETTIMEOUT watchdog device ioctl.
234 *
235 * Return: 0 if the timeout was set successfully, or a negative error code on
236 * failure.
237 */
238
239static int wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
240{
241 int ret = 0;
242
243 if (t > max_units)
244 t = wdt_round_time(t);
245
246 wdd->timeout = t;
247
248 if (watchdog_hw_running(wdd))
249 ret = wdt_update_timeout(t);
250
251 return ret;
252}
253
254enum {
255 IT87_WDT_OUTPUT_THROUGH_PWRGD = BIT(0),
256};
257
258static const struct dmi_system_id it87_quirks[] = {
259 {
260 /* Qotom Q30900P (IT8786) */
261 .matches = {
262 DMI_EXACT_MATCH(DMI_BOARD_NAME, "QCML04"),
263 },
264 .driver_data = (void *)IT87_WDT_OUTPUT_THROUGH_PWRGD,
265 },
266 {}
267};
268
269static const struct watchdog_info ident = {
270 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
271 .firmware_version = 1,
272 .identity = WATCHDOG_NAME,
273};
274
275static const struct watchdog_ops wdt_ops = {
276 .owner = THIS_MODULE,
277 .start = wdt_start,
278 .stop = wdt_stop,
279 .set_timeout = wdt_set_timeout,
280};
281
282static struct watchdog_device wdt_dev = {
283 .info = &ident,
284 .ops = &wdt_ops,
285 .min_timeout = 1,
286};
287
288static int __init it87_wdt_init(void)
289{
290 const struct dmi_system_id *dmi_id;
291 u8 chip_rev;
292 u8 ctrl;
293 int quirks = 0;
294 int rc;
295
296 rc = superio_enter();
297 if (rc)
298 return rc;
299
300 chip_type = superio_inw(CHIPID);
301 chip_rev = superio_inb(CHIPREV) & 0x0f;
302 superio_exit();
303
304 dmi_id = dmi_first_match(list: it87_quirks);
305 if (dmi_id)
306 quirks = (long)dmi_id->driver_data;
307
308 switch (chip_type) {
309 case IT8702_ID:
310 max_units = 255;
311 break;
312 case IT8712_ID:
313 max_units = (chip_rev < 8) ? 255 : 65535;
314 break;
315 case IT8607_ID:
316 case IT8613_ID:
317 case IT8620_ID:
318 case IT8622_ID:
319 case IT8625_ID:
320 case IT8628_ID:
321 case IT8655_ID:
322 case IT8659_ID:
323 case IT8665_ID:
324 case IT8686_ID:
325 case IT8716_ID:
326 case IT8718_ID:
327 case IT8720_ID:
328 case IT8721_ID:
329 case IT8726_ID:
330 case IT8728_ID:
331 case IT8772_ID:
332 case IT8783_ID:
333 case IT8784_ID:
334 case IT8786_ID:
335 max_units = 65535;
336 break;
337 case IT8705_ID:
338 pr_err("Unsupported Chip found, Chip %04x Revision %02x\n",
339 chip_type, chip_rev);
340 return -ENODEV;
341 case NO_DEV_ID:
342 pr_err("no device\n");
343 return -ENODEV;
344 default:
345 pr_err("Unknown Chip found, Chip %04x Revision %04x\n",
346 chip_type, chip_rev);
347 return -ENODEV;
348 }
349
350 rc = superio_enter();
351 if (rc)
352 return rc;
353
354 superio_select(GPIO);
355 superio_outb(WDT_TOV1, WDTCFG);
356
357 switch (chip_type) {
358 case IT8784_ID:
359 case IT8786_ID:
360 ctrl = superio_inb(WDTCTRL);
361 ctrl &= 0x08;
362 superio_outb(val: ctrl, WDTCTRL);
363 break;
364 default:
365 superio_outb(val: 0x00, WDTCTRL);
366 }
367
368 if (quirks & IT87_WDT_OUTPUT_THROUGH_PWRGD) {
369 superio_select(EC);
370 ctrl = superio_inb(SCR1);
371 if (!(ctrl & WDT_PWRGD)) {
372 ctrl |= WDT_PWRGD;
373 superio_outb(val: ctrl, SCR1);
374 }
375 }
376
377 superio_exit();
378
379 if (timeout < 1 || timeout > max_units * 60) {
380 timeout = DEFAULT_TIMEOUT;
381 pr_warn("Timeout value out of range, use default %d sec\n",
382 DEFAULT_TIMEOUT);
383 }
384
385 if (timeout > max_units)
386 timeout = wdt_round_time(t: timeout);
387
388 wdt_dev.timeout = timeout;
389 wdt_dev.max_timeout = max_units * 60;
390
391 watchdog_stop_on_reboot(wdd: &wdt_dev);
392 rc = watchdog_register_device(&wdt_dev);
393 if (rc)
394 return rc;
395
396 pr_info("Chip IT%04x revision %d initialized. timeout=%d sec (nowayout=%d testmode=%d)\n",
397 chip_type, chip_rev, timeout, nowayout, testmode);
398
399 return 0;
400}
401
402static void __exit it87_wdt_exit(void)
403{
404 watchdog_unregister_device(&wdt_dev);
405}
406
407module_init(it87_wdt_init);
408module_exit(it87_wdt_exit);
409
410MODULE_AUTHOR("Oliver Schuster");
411MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
412MODULE_LICENSE("GPL");
413

source code of linux/drivers/watchdog/it87_wdt.c