| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
|---|
| 2 | /* |
|---|
| 3 | * Copyright(C) 2015 Linaro Limited. All rights reserved. |
|---|
| 4 | * Author: Mathieu Poirier <mathieu.poirier@linaro.org> |
|---|
| 5 | */ |
|---|
| 6 | |
|---|
| 7 | #ifndef _LINUX_CORESIGHT_PMU_H |
|---|
| 8 | #define _LINUX_CORESIGHT_PMU_H |
|---|
| 9 | |
|---|
| 10 | #include <linux/bits.h> |
|---|
| 11 | |
|---|
| 12 | #define CORESIGHT_ETM_PMU_NAME "cs_etm" |
|---|
| 13 | |
|---|
| 14 | /* |
|---|
| 15 | * The legacy Trace ID system based on fixed calculation from the cpu |
|---|
| 16 | * number. This has been replaced by drivers using a dynamic allocation |
|---|
| 17 | * system - but need to retain the legacy algorithm for backward comparibility |
|---|
| 18 | * in certain situations:- |
|---|
| 19 | * a) new perf running on older systems that generate the legacy mapping |
|---|
| 20 | * b) older tools that may not update at the same time as the kernel. |
|---|
| 21 | */ |
|---|
| 22 | #define CORESIGHT_LEGACY_CPU_TRACE_ID(cpu) (0x10 + (cpu * 2)) |
|---|
| 23 | |
|---|
| 24 | /* |
|---|
| 25 | * Below are the definition of bit offsets for perf option, and works as |
|---|
| 26 | * arbitrary values for all ETM versions. |
|---|
| 27 | * |
|---|
| 28 | * Most of them are orignally from ETMv3.5/PTM's ETMCR config, therefore, |
|---|
| 29 | * ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and |
|---|
| 30 | * directly use below macros as config bits. |
|---|
| 31 | */ |
|---|
| 32 | #define ETM_OPT_BRANCH_BROADCAST 8 |
|---|
| 33 | #define ETM_OPT_CYCACC 12 |
|---|
| 34 | #define ETM_OPT_CTXTID 14 |
|---|
| 35 | #define ETM_OPT_CTXTID2 15 |
|---|
| 36 | #define ETM_OPT_TS 28 |
|---|
| 37 | #define ETM_OPT_RETSTK 29 |
|---|
| 38 | |
|---|
| 39 | /* ETMv4 CONFIGR programming bits for the ETM OPTs */ |
|---|
| 40 | #define ETM4_CFG_BIT_BB 3 |
|---|
| 41 | #define ETM4_CFG_BIT_CYCACC 4 |
|---|
| 42 | #define ETM4_CFG_BIT_CTXTID 6 |
|---|
| 43 | #define ETM4_CFG_BIT_VMID 7 |
|---|
| 44 | #define ETM4_CFG_BIT_TS 11 |
|---|
| 45 | #define ETM4_CFG_BIT_RETSTK 12 |
|---|
| 46 | #define ETM4_CFG_BIT_VMID_OPT 15 |
|---|
| 47 | |
|---|
| 48 | /* |
|---|
| 49 | * Interpretation of the PERF_RECORD_AUX_OUTPUT_HW_ID payload. |
|---|
| 50 | * Used to associate a CPU with the CoreSight Trace ID. |
|---|
| 51 | * [07:00] - Trace ID - uses 8 bits to make value easy to read in file. |
|---|
| 52 | * [39:08] - Sink ID - as reported in /sys/bus/event_source/devices/cs_etm/sinks/ |
|---|
| 53 | * Added in minor version 1. |
|---|
| 54 | * [55:40] - Unused (SBZ) |
|---|
| 55 | * [59:56] - Minor Version - previously existing fields are compatible with |
|---|
| 56 | * all minor versions. |
|---|
| 57 | * [63:60] - Major Version - previously existing fields mean different things |
|---|
| 58 | * in new major versions. |
|---|
| 59 | */ |
|---|
| 60 | #define CS_AUX_HW_ID_TRACE_ID_MASK GENMASK_ULL(7, 0) |
|---|
| 61 | #define CS_AUX_HW_ID_SINK_ID_MASK GENMASK_ULL(39, 8) |
|---|
| 62 | |
|---|
| 63 | #define CS_AUX_HW_ID_MINOR_VERSION_MASK GENMASK_ULL(59, 56) |
|---|
| 64 | #define CS_AUX_HW_ID_MAJOR_VERSION_MASK GENMASK_ULL(63, 60) |
|---|
| 65 | |
|---|
| 66 | #define CS_AUX_HW_ID_MAJOR_VERSION 0 |
|---|
| 67 | #define CS_AUX_HW_ID_MINOR_VERSION 1 |
|---|
| 68 | |
|---|
| 69 | #endif |
|---|
| 70 | |
|---|
