| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * Copyright(C) 2015 Linaro Limited. All rights reserved. |
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| 4 | * Author: Mathieu Poirier <mathieu.poirier@linaro.org> |
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| 5 | */ |
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| 6 | |
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| 7 | #ifndef _LINUX_CORESIGHT_PMU_H |
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| 8 | #define _LINUX_CORESIGHT_PMU_H |
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| 9 | |
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| 10 | #include <linux/bits.h> |
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| 11 | |
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| 12 | #define CORESIGHT_ETM_PMU_NAME "cs_etm" |
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| 13 | |
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| 14 | /* |
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| 15 | * The legacy Trace ID system based on fixed calculation from the cpu |
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| 16 | * number. This has been replaced by drivers using a dynamic allocation |
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| 17 | * system - but need to retain the legacy algorithm for backward comparibility |
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| 18 | * in certain situations:- |
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| 19 | * a) new perf running on older systems that generate the legacy mapping |
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| 20 | * b) older tools that may not update at the same time as the kernel. |
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| 21 | */ |
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| 22 | #define CORESIGHT_LEGACY_CPU_TRACE_ID(cpu) (0x10 + (cpu * 2)) |
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| 23 | |
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| 24 | /* |
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| 25 | * Below are the definition of bit offsets for perf option, and works as |
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| 26 | * arbitrary values for all ETM versions. |
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| 27 | * |
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| 28 | * Most of them are orignally from ETMv3.5/PTM's ETMCR config, therefore, |
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| 29 | * ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and |
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| 30 | * directly use below macros as config bits. |
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| 31 | */ |
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| 32 | #define ETM_OPT_BRANCH_BROADCAST 8 |
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| 33 | #define ETM_OPT_CYCACC 12 |
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| 34 | #define ETM_OPT_CTXTID 14 |
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| 35 | #define ETM_OPT_CTXTID2 15 |
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| 36 | #define ETM_OPT_TS 28 |
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| 37 | #define ETM_OPT_RETSTK 29 |
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| 38 | |
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| 39 | /* ETMv4 CONFIGR programming bits for the ETM OPTs */ |
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| 40 | #define ETM4_CFG_BIT_BB 3 |
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| 41 | #define ETM4_CFG_BIT_CYCACC 4 |
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| 42 | #define ETM4_CFG_BIT_CTXTID 6 |
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| 43 | #define ETM4_CFG_BIT_VMID 7 |
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| 44 | #define ETM4_CFG_BIT_TS 11 |
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| 45 | #define ETM4_CFG_BIT_RETSTK 12 |
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| 46 | #define ETM4_CFG_BIT_VMID_OPT 15 |
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| 47 | |
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| 48 | /* |
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| 49 | * Interpretation of the PERF_RECORD_AUX_OUTPUT_HW_ID payload. |
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| 50 | * Used to associate a CPU with the CoreSight Trace ID. |
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| 51 | * [07:00] - Trace ID - uses 8 bits to make value easy to read in file. |
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| 52 | * [59:08] - Unused (SBZ) |
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| 53 | * [63:60] - Version |
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| 54 | */ |
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| 55 | #define CS_AUX_HW_ID_TRACE_ID_MASK GENMASK_ULL(7, 0) |
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| 56 | #define CS_AUX_HW_ID_VERSION_MASK GENMASK_ULL(63, 60) |
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| 57 | |
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| 58 | #define CS_AUX_HW_ID_CURR_VERSION 0 |
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| 59 | |
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| 60 | #endif |
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| 61 | |
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