1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright(C) 2015 Linaro Limited. All rights reserved.
4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
5 */
6
7#include <linux/bitfield.h>
8#include <linux/coresight.h>
9#include <linux/coresight-pmu.h>
10#include <linux/cpumask.h>
11#include <linux/device.h>
12#include <linux/list.h>
13#include <linux/mm.h>
14#include <linux/init.h>
15#include <linux/perf_event.h>
16#include <linux/percpu-defs.h>
17#include <linux/slab.h>
18#include <linux/stringhash.h>
19#include <linux/types.h>
20#include <linux/workqueue.h>
21
22#include "coresight-config.h"
23#include "coresight-etm-perf.h"
24#include "coresight-priv.h"
25#include "coresight-syscfg.h"
26#include "coresight-trace-id.h"
27
28static struct pmu etm_pmu;
29static bool etm_perf_up;
30
31/*
32 * An ETM context for a running event includes the perf aux handle
33 * and aux_data. For ETM, the aux_data (etm_event_data), consists of
34 * the trace path and the sink configuration. The event data is accessible
35 * via perf_get_aux(handle). However, a sink could "end" a perf output
36 * handle via the IRQ handler. And if the "sink" encounters a failure
37 * to "begin" another session (e.g due to lack of space in the buffer),
38 * the handle will be cleared. Thus, the event_data may not be accessible
39 * from the handle when we get to the etm_event_stop(), which is required
40 * for stopping the trace path. The event_data is guaranteed to stay alive
41 * until "free_aux()", which cannot happen as long as the event is active on
42 * the ETM. Thus the event_data for the session must be part of the ETM context
43 * to make sure we can disable the trace path.
44 */
45struct etm_ctxt {
46 struct perf_output_handle handle;
47 struct etm_event_data *event_data;
48};
49
50static DEFINE_PER_CPU(struct etm_ctxt, etm_ctxt);
51static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
52
53/*
54 * The PMU formats were orignally for ETMv3.5/PTM's ETMCR 'config';
55 * now take them as general formats and apply on all ETMs.
56 */
57PMU_FORMAT_ATTR(branch_broadcast, "config:"__stringify(ETM_OPT_BRANCH_BROADCAST));
58PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC));
59/* contextid1 enables tracing CONTEXTIDR_EL1 for ETMv4 */
60PMU_FORMAT_ATTR(contextid1, "config:" __stringify(ETM_OPT_CTXTID));
61/* contextid2 enables tracing CONTEXTIDR_EL2 for ETMv4 */
62PMU_FORMAT_ATTR(contextid2, "config:" __stringify(ETM_OPT_CTXTID2));
63PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS));
64PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK));
65/* preset - if sink ID is used as a configuration selector */
66PMU_FORMAT_ATTR(preset, "config:0-3");
67/* Sink ID - same for all ETMs */
68PMU_FORMAT_ATTR(sinkid, "config2:0-31");
69/* config ID - set if a system configuration is selected */
70PMU_FORMAT_ATTR(configid, "config2:32-63");
71PMU_FORMAT_ATTR(cc_threshold, "config3:0-11");
72
73
74/*
75 * contextid always traces the "PID". The PID is in CONTEXTIDR_EL1
76 * when the kernel is running at EL1; when the kernel is at EL2,
77 * the PID is in CONTEXTIDR_EL2.
78 */
79static ssize_t format_attr_contextid_show(struct device *dev,
80 struct device_attribute *attr,
81 char *page)
82{
83 int pid_fmt = ETM_OPT_CTXTID;
84
85#if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM4X)
86 pid_fmt = is_kernel_in_hyp_mode() ? ETM_OPT_CTXTID2 : ETM_OPT_CTXTID;
87#endif
88 return sprintf(buf: page, fmt: "config:%d\n", pid_fmt);
89}
90
91static struct device_attribute format_attr_contextid =
92 __ATTR(contextid, 0444, format_attr_contextid_show, NULL);
93
94static struct attribute *etm_config_formats_attr[] = {
95 &format_attr_cycacc.attr,
96 &format_attr_contextid.attr,
97 &format_attr_contextid1.attr,
98 &format_attr_contextid2.attr,
99 &format_attr_timestamp.attr,
100 &format_attr_retstack.attr,
101 &format_attr_sinkid.attr,
102 &format_attr_preset.attr,
103 &format_attr_configid.attr,
104 &format_attr_branch_broadcast.attr,
105 &format_attr_cc_threshold.attr,
106 NULL,
107};
108
109static const struct attribute_group etm_pmu_format_group = {
110 .name = "format",
111 .attrs = etm_config_formats_attr,
112};
113
114static struct attribute *etm_config_sinks_attr[] = {
115 NULL,
116};
117
118static const struct attribute_group etm_pmu_sinks_group = {
119 .name = "sinks",
120 .attrs = etm_config_sinks_attr,
121};
122
123static struct attribute *etm_config_events_attr[] = {
124 NULL,
125};
126
127static const struct attribute_group etm_pmu_events_group = {
128 .name = "events",
129 .attrs = etm_config_events_attr,
130};
131
132static const struct attribute_group *etm_pmu_attr_groups[] = {
133 &etm_pmu_format_group,
134 &etm_pmu_sinks_group,
135 &etm_pmu_events_group,
136 NULL,
137};
138
139static inline struct coresight_path **
140etm_event_cpu_path_ptr(struct etm_event_data *data, int cpu)
141{
142 return per_cpu_ptr(data->path, cpu);
143}
144
145static inline struct coresight_path *
146etm_event_cpu_path(struct etm_event_data *data, int cpu)
147{
148 return *etm_event_cpu_path_ptr(data, cpu);
149}
150
151static void etm_event_read(struct perf_event *event) {}
152
153static int etm_addr_filters_alloc(struct perf_event *event)
154{
155 struct etm_filters *filters;
156 int node = event->cpu == -1 ? -1 : cpu_to_node(cpu: event->cpu);
157
158 filters = kzalloc_node(sizeof(struct etm_filters), GFP_KERNEL, node);
159 if (!filters)
160 return -ENOMEM;
161
162 if (event->parent)
163 memcpy(filters, event->parent->hw.addr_filters,
164 sizeof(*filters));
165
166 event->hw.addr_filters = filters;
167
168 return 0;
169}
170
171static void etm_event_destroy(struct perf_event *event)
172{
173 kfree(objp: event->hw.addr_filters);
174 event->hw.addr_filters = NULL;
175}
176
177static int etm_event_init(struct perf_event *event)
178{
179 int ret = 0;
180
181 if (event->attr.type != etm_pmu.type) {
182 ret = -ENOENT;
183 goto out;
184 }
185
186 ret = etm_addr_filters_alloc(event);
187 if (ret)
188 goto out;
189
190 event->destroy = etm_event_destroy;
191out:
192 return ret;
193}
194
195static void free_sink_buffer(struct etm_event_data *event_data)
196{
197 int cpu;
198 cpumask_t *mask = &event_data->mask;
199 struct coresight_device *sink;
200
201 if (!event_data->snk_config)
202 return;
203
204 if (WARN_ON(cpumask_empty(mask)))
205 return;
206
207 cpu = cpumask_first(srcp: mask);
208 sink = coresight_get_sink(path: etm_event_cpu_path(data: event_data, cpu));
209 sink_ops(sink)->free_buffer(event_data->snk_config);
210}
211
212static void free_event_data(struct work_struct *work)
213{
214 int cpu;
215 cpumask_t *mask;
216 struct etm_event_data *event_data;
217
218 event_data = container_of(work, struct etm_event_data, work);
219 mask = &event_data->mask;
220
221 /* Free the sink buffers, if there are any */
222 free_sink_buffer(event_data);
223
224 /* clear any configuration we were using */
225 if (event_data->cfg_hash)
226 cscfg_deactivate_config(cfg_hash: event_data->cfg_hash);
227
228 for_each_cpu(cpu, mask) {
229 struct coresight_path **ppath;
230
231 ppath = etm_event_cpu_path_ptr(data: event_data, cpu);
232 if (!(IS_ERR_OR_NULL(ptr: *ppath))) {
233 struct coresight_device *sink = coresight_get_sink(path: *ppath);
234
235 /*
236 * Mark perf event as done for trace id allocator, but don't call
237 * coresight_trace_id_put_cpu_id_map() on individual IDs. Perf sessions
238 * never free trace IDs to ensure that the ID associated with a CPU
239 * cannot change during their and other's concurrent sessions. Instead,
240 * a refcount is used so that the last event to call
241 * coresight_trace_id_perf_stop() frees all IDs.
242 */
243 coresight_trace_id_perf_stop(id_map: &sink->perf_sink_id_map);
244
245 coresight_release_path(path: *ppath);
246 }
247 *ppath = NULL;
248 }
249
250 free_percpu(pdata: event_data->path);
251 kfree(objp: event_data);
252}
253
254static void *alloc_event_data(int cpu)
255{
256 cpumask_t *mask;
257 struct etm_event_data *event_data;
258
259 /* First get memory for the session's data */
260 event_data = kzalloc(sizeof(struct etm_event_data), GFP_KERNEL);
261 if (!event_data)
262 return NULL;
263
264
265 mask = &event_data->mask;
266 if (cpu != -1)
267 cpumask_set_cpu(cpu, dstp: mask);
268 else
269 cpumask_copy(dstp: mask, cpu_present_mask);
270
271 /*
272 * Each CPU has a single path between source and destination. As such
273 * allocate an array using CPU numbers as indexes. That way a path
274 * for any CPU can easily be accessed at any given time. We proceed
275 * the same way for sessions involving a single CPU. The cost of
276 * unused memory when dealing with single CPU trace scenarios is small
277 * compared to the cost of searching through an optimized array.
278 */
279 event_data->path = alloc_percpu(struct coresight_path *);
280
281 if (!event_data->path) {
282 kfree(objp: event_data);
283 return NULL;
284 }
285
286 return event_data;
287}
288
289static void etm_free_aux(void *data)
290{
291 struct etm_event_data *event_data = data;
292
293 schedule_work(work: &event_data->work);
294}
295
296/*
297 * Check if two given sinks are compatible with each other,
298 * so that they can use the same sink buffers, when an event
299 * moves around.
300 */
301static bool sinks_compatible(struct coresight_device *a,
302 struct coresight_device *b)
303{
304 if (!a || !b)
305 return false;
306 /*
307 * If the sinks are of the same subtype and driven
308 * by the same driver, we can use the same buffer
309 * on these sinks.
310 */
311 return (a->subtype.sink_subtype == b->subtype.sink_subtype) &&
312 (sink_ops(a) == sink_ops(b));
313}
314
315static void *etm_setup_aux(struct perf_event *event, void **pages,
316 int nr_pages, bool overwrite)
317{
318 u32 id, cfg_hash;
319 int cpu = event->cpu;
320 cpumask_t *mask;
321 struct coresight_device *sink = NULL;
322 struct coresight_device *user_sink = NULL, *last_sink = NULL;
323 struct etm_event_data *event_data = NULL;
324
325 event_data = alloc_event_data(cpu);
326 if (!event_data)
327 return NULL;
328 INIT_WORK(&event_data->work, free_event_data);
329
330 /* First get the selected sink from user space. */
331 if (event->attr.config2 & GENMASK_ULL(31, 0)) {
332 id = (u32)event->attr.config2;
333 sink = user_sink = coresight_get_sink_by_id(id);
334 }
335
336 /* check if user wants a coresight configuration selected */
337 cfg_hash = (u32)((event->attr.config2 & GENMASK_ULL(63, 32)) >> 32);
338 if (cfg_hash) {
339 if (cscfg_activate_config(cfg_hash))
340 goto err;
341 event_data->cfg_hash = cfg_hash;
342 }
343
344 mask = &event_data->mask;
345
346 /*
347 * Setup the path for each CPU in a trace session. We try to build
348 * trace path for each CPU in the mask. If we don't find an ETM
349 * for the CPU or fail to build a path, we clear the CPU from the
350 * mask and continue with the rest. If ever we try to trace on those
351 * CPUs, we can handle it and fail the session.
352 */
353 for_each_cpu(cpu, mask) {
354 struct coresight_path *path;
355 struct coresight_device *csdev;
356
357 csdev = per_cpu(csdev_src, cpu);
358 /*
359 * If there is no ETM associated with this CPU clear it from
360 * the mask and continue with the rest. If ever we try to trace
361 * on this CPU, we handle it accordingly.
362 */
363 if (!csdev) {
364 cpumask_clear_cpu(cpu, dstp: mask);
365 continue;
366 }
367
368 /*
369 * If AUX pause feature is enabled but the ETM driver does not
370 * support the operations, clear this CPU from the mask and
371 * continue to next one.
372 */
373 if (event->attr.aux_start_paused &&
374 (!source_ops(csdev)->pause_perf || !source_ops(csdev)->resume_perf)) {
375 dev_err_once(&csdev->dev, "AUX pause is not supported.\n");
376 cpumask_clear_cpu(cpu, dstp: mask);
377 continue;
378 }
379
380 /*
381 * No sink provided - look for a default sink for all the ETMs,
382 * where this event can be scheduled.
383 * We allocate the sink specific buffers only once for this
384 * event. If the ETMs have different default sink devices, we
385 * can only use a single "type" of sink as the event can carry
386 * only one sink specific buffer. Thus we have to make sure
387 * that the sinks are of the same type and driven by the same
388 * driver, as the one we allocate the buffer for. As such
389 * we choose the first sink and check if the remaining ETMs
390 * have a compatible default sink. We don't trace on a CPU
391 * if the sink is not compatible.
392 */
393 if (!user_sink) {
394 /* Find the default sink for this ETM */
395 sink = coresight_find_default_sink(csdev);
396 if (!sink) {
397 cpumask_clear_cpu(cpu, dstp: mask);
398 continue;
399 }
400
401 /* Check if this sink compatible with the last sink */
402 if (last_sink && !sinks_compatible(a: last_sink, b: sink)) {
403 cpumask_clear_cpu(cpu, dstp: mask);
404 continue;
405 }
406 last_sink = sink;
407 }
408
409 /*
410 * Building a path doesn't enable it, it simply builds a
411 * list of devices from source to sink that can be
412 * referenced later when the path is actually needed.
413 */
414 path = coresight_build_path(csdev, sink);
415 if (IS_ERR(ptr: path)) {
416 cpumask_clear_cpu(cpu, dstp: mask);
417 continue;
418 }
419
420 /* ensure we can allocate a trace ID for this CPU */
421 coresight_path_assign_trace_id(path, mode: CS_MODE_PERF);
422 if (!IS_VALID_CS_TRACE_ID(path->trace_id)) {
423 cpumask_clear_cpu(cpu, dstp: mask);
424 coresight_release_path(path);
425 continue;
426 }
427
428 coresight_trace_id_perf_start(id_map: &sink->perf_sink_id_map);
429 *etm_event_cpu_path_ptr(data: event_data, cpu) = path;
430 }
431
432 /* no sink found for any CPU - cannot trace */
433 if (!sink)
434 goto err;
435
436 /* If we don't have any CPUs ready for tracing, abort */
437 cpu = cpumask_first(srcp: mask);
438 if (cpu >= nr_cpu_ids)
439 goto err;
440
441 if (!sink_ops(sink)->alloc_buffer || !sink_ops(sink)->free_buffer)
442 goto err;
443
444 /*
445 * Allocate the sink buffer for this session. All the sinks
446 * where this event can be scheduled are ensured to be of the
447 * same type. Thus the same sink configuration is used by the
448 * sinks.
449 */
450 event_data->snk_config =
451 sink_ops(sink)->alloc_buffer(sink, event, pages,
452 nr_pages, overwrite);
453 if (!event_data->snk_config)
454 goto err;
455
456out:
457 return event_data;
458
459err:
460 etm_free_aux(data: event_data);
461 event_data = NULL;
462 goto out;
463}
464
465static int etm_event_resume(struct coresight_device *csdev,
466 struct etm_ctxt *ctxt)
467{
468 if (!ctxt->event_data)
469 return 0;
470
471 return coresight_resume_source(csdev);
472}
473
474static void etm_event_start(struct perf_event *event, int flags)
475{
476 int cpu = smp_processor_id();
477 struct etm_event_data *event_data;
478 struct etm_ctxt *ctxt = this_cpu_ptr(&etm_ctxt);
479 struct perf_output_handle *handle = &ctxt->handle;
480 struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
481 struct coresight_path *path;
482 u64 hw_id;
483
484 if (!csdev)
485 goto fail;
486
487 if (flags & PERF_EF_RESUME) {
488 if (etm_event_resume(csdev, ctxt) < 0) {
489 dev_err(&csdev->dev, "Failed to resume ETM event.\n");
490 goto fail;
491 }
492 return;
493 }
494
495 /* Have we messed up our tracking ? */
496 if (WARN_ON(ctxt->event_data))
497 goto fail;
498
499 /*
500 * Deal with the ring buffer API and get a handle on the
501 * session's information.
502 */
503 event_data = perf_aux_output_begin(handle, event);
504 if (!event_data)
505 goto fail;
506
507 /*
508 * Check if this ETM is allowed to trace, as decided
509 * at etm_setup_aux(). This could be due to an unreachable
510 * sink from this ETM. We can't do much in this case if
511 * the sink was specified or hinted to the driver. For
512 * now, simply don't record anything on this ETM.
513 *
514 * As such we pretend that everything is fine, and let
515 * it continue without actually tracing. The event could
516 * continue tracing when it moves to a CPU where it is
517 * reachable to a sink.
518 */
519 if (!cpumask_test_cpu(cpu, cpumask: &event_data->mask))
520 goto out;
521
522 path = etm_event_cpu_path(data: event_data, cpu);
523 /* We need a sink, no need to continue without one */
524 sink = coresight_get_sink(path);
525 if (WARN_ON_ONCE(!sink))
526 goto fail_end_stop;
527
528 /* Nothing will happen without a path */
529 if (coresight_enable_path(path, mode: CS_MODE_PERF, sink_data: handle))
530 goto fail_end_stop;
531
532 /* Finally enable the tracer */
533 if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF, path))
534 goto fail_disable_path;
535
536 /*
537 * output cpu / trace ID in perf record, once for the lifetime
538 * of the event.
539 */
540 if (!cpumask_test_cpu(cpu, cpumask: &event_data->aux_hwid_done)) {
541 cpumask_set_cpu(cpu, dstp: &event_data->aux_hwid_done);
542
543 hw_id = FIELD_PREP(CS_AUX_HW_ID_MAJOR_VERSION_MASK,
544 CS_AUX_HW_ID_MAJOR_VERSION);
545 hw_id |= FIELD_PREP(CS_AUX_HW_ID_MINOR_VERSION_MASK,
546 CS_AUX_HW_ID_MINOR_VERSION);
547 hw_id |= FIELD_PREP(CS_AUX_HW_ID_TRACE_ID_MASK, path->trace_id);
548 hw_id |= FIELD_PREP(CS_AUX_HW_ID_SINK_ID_MASK, coresight_get_sink_id(sink));
549
550 perf_report_aux_output_id(event, hw_id);
551 }
552
553out:
554 /* Tell the perf core the event is alive */
555 event->hw.state = 0;
556 /* Save the event_data for this ETM */
557 ctxt->event_data = event_data;
558 return;
559
560fail_disable_path:
561 coresight_disable_path(path);
562fail_end_stop:
563 /*
564 * Check if the handle is still associated with the event,
565 * to handle cases where if the sink failed to start the
566 * trace and TRUNCATED the handle already.
567 */
568 if (READ_ONCE(handle->event)) {
569 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
570 perf_aux_output_end(handle, size: 0);
571 }
572fail:
573 event->hw.state = PERF_HES_STOPPED;
574 return;
575}
576
577static void etm_event_pause(struct perf_event *event,
578 struct coresight_device *csdev,
579 struct etm_ctxt *ctxt)
580{
581 int cpu = smp_processor_id();
582 struct coresight_device *sink;
583 struct perf_output_handle *handle = &ctxt->handle;
584 struct coresight_path *path;
585 unsigned long size;
586
587 if (!ctxt->event_data)
588 return;
589
590 /* Stop tracer */
591 coresight_pause_source(csdev);
592
593 path = etm_event_cpu_path(data: ctxt->event_data, cpu);
594 sink = coresight_get_sink(path);
595 if (WARN_ON_ONCE(!sink))
596 return;
597
598 /*
599 * The per CPU sink has own interrupt handling, it might have
600 * race condition with updating buffer on AUX trace pause if
601 * it is invoked from NMI. To avoid the race condition,
602 * disallows updating buffer for the per CPU sink case.
603 */
604 if (coresight_is_percpu_sink(csdev: sink))
605 return;
606
607 if (WARN_ON_ONCE(handle->event != event))
608 return;
609
610 if (!sink_ops(sink)->update_buffer)
611 return;
612
613 size = sink_ops(sink)->update_buffer(sink, handle,
614 ctxt->event_data->snk_config);
615 if (READ_ONCE(handle->event)) {
616 if (!size)
617 return;
618
619 perf_aux_output_end(handle, size);
620 perf_aux_output_begin(handle, event);
621 } else {
622 WARN_ON_ONCE(size);
623 }
624}
625
626static void etm_event_stop(struct perf_event *event, int mode)
627{
628 int cpu = smp_processor_id();
629 unsigned long size;
630 struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
631 struct etm_ctxt *ctxt = this_cpu_ptr(&etm_ctxt);
632 struct perf_output_handle *handle = &ctxt->handle;
633 struct etm_event_data *event_data;
634 struct coresight_path *path;
635
636 if (mode & PERF_EF_PAUSE)
637 return etm_event_pause(event, csdev, ctxt);
638
639 /*
640 * If we still have access to the event_data via handle,
641 * confirm that we haven't messed up the tracking.
642 */
643 if (handle->event &&
644 WARN_ON(perf_get_aux(handle) != ctxt->event_data))
645 return;
646
647 event_data = ctxt->event_data;
648 /* Clear the event_data as this ETM is stopping the trace. */
649 ctxt->event_data = NULL;
650
651 if (event->hw.state == PERF_HES_STOPPED)
652 return;
653
654 /* We must have a valid event_data for a running event */
655 if (WARN_ON(!event_data))
656 return;
657
658 /*
659 * Check if this ETM was allowed to trace, as decided at
660 * etm_setup_aux(). If it wasn't allowed to trace, then
661 * nothing needs to be torn down other than outputting a
662 * zero sized record.
663 */
664 if (handle->event && (mode & PERF_EF_UPDATE) &&
665 !cpumask_test_cpu(cpu, cpumask: &event_data->mask)) {
666 event->hw.state = PERF_HES_STOPPED;
667 perf_aux_output_end(handle, size: 0);
668 return;
669 }
670
671 if (!csdev)
672 return;
673
674 path = etm_event_cpu_path(data: event_data, cpu);
675 if (!path)
676 return;
677
678 sink = coresight_get_sink(path);
679 if (!sink)
680 return;
681
682 /* stop tracer */
683 coresight_disable_source(csdev, data: event);
684
685 /* tell the core */
686 event->hw.state = PERF_HES_STOPPED;
687
688 /*
689 * If the handle is not bound to an event anymore
690 * (e.g, the sink driver was unable to restart the
691 * handle due to lack of buffer space), we don't
692 * have to do anything here.
693 */
694 if (handle->event && (mode & PERF_EF_UPDATE)) {
695 if (WARN_ON_ONCE(handle->event != event))
696 return;
697
698 /* update trace information */
699 if (!sink_ops(sink)->update_buffer)
700 return;
701
702 size = sink_ops(sink)->update_buffer(sink, handle,
703 event_data->snk_config);
704 /*
705 * Make sure the handle is still valid as the
706 * sink could have closed it from an IRQ.
707 * The sink driver must handle the race with
708 * update_buffer() and IRQ. Thus either we
709 * should get a valid handle and valid size
710 * (which may be 0).
711 *
712 * But we should never get a non-zero size with
713 * an invalid handle.
714 */
715 if (READ_ONCE(handle->event))
716 perf_aux_output_end(handle, size);
717 else
718 WARN_ON(size);
719 }
720
721 /* Disabling the path make its elements available to other sessions */
722 coresight_disable_path(path);
723}
724
725static int etm_event_add(struct perf_event *event, int mode)
726{
727 int ret = 0;
728 struct hw_perf_event *hwc = &event->hw;
729
730 if (mode & PERF_EF_START) {
731 etm_event_start(event, flags: 0);
732 if (hwc->state & PERF_HES_STOPPED)
733 ret = -EINVAL;
734 } else {
735 hwc->state = PERF_HES_STOPPED;
736 }
737
738 return ret;
739}
740
741static void etm_event_del(struct perf_event *event, int mode)
742{
743 etm_event_stop(event, PERF_EF_UPDATE);
744}
745
746static int etm_addr_filters_validate(struct list_head *filters)
747{
748 bool range = false, address = false;
749 int index = 0;
750 struct perf_addr_filter *filter;
751
752 list_for_each_entry(filter, filters, entry) {
753 /*
754 * No need to go further if there's no more
755 * room for filters.
756 */
757 if (++index > ETM_ADDR_CMP_MAX)
758 return -EOPNOTSUPP;
759
760 /* filter::size==0 means single address trigger */
761 if (filter->size) {
762 /*
763 * The existing code relies on START/STOP filters
764 * being address filters.
765 */
766 if (filter->action == PERF_ADDR_FILTER_ACTION_START ||
767 filter->action == PERF_ADDR_FILTER_ACTION_STOP)
768 return -EOPNOTSUPP;
769
770 range = true;
771 } else
772 address = true;
773
774 /*
775 * At this time we don't allow range and start/stop filtering
776 * to cohabitate, they have to be mutually exclusive.
777 */
778 if (range && address)
779 return -EOPNOTSUPP;
780 }
781
782 return 0;
783}
784
785static void etm_addr_filters_sync(struct perf_event *event)
786{
787 struct perf_addr_filters_head *head = perf_event_addr_filters(event);
788 unsigned long start, stop;
789 struct perf_addr_filter_range *fr = event->addr_filter_ranges;
790 struct etm_filters *filters = event->hw.addr_filters;
791 struct etm_filter *etm_filter;
792 struct perf_addr_filter *filter;
793 int i = 0;
794
795 list_for_each_entry(filter, &head->list, entry) {
796 start = fr[i].start;
797 stop = start + fr[i].size;
798 etm_filter = &filters->etm_filter[i];
799
800 switch (filter->action) {
801 case PERF_ADDR_FILTER_ACTION_FILTER:
802 etm_filter->start_addr = start;
803 etm_filter->stop_addr = stop;
804 etm_filter->type = ETM_ADDR_TYPE_RANGE;
805 break;
806 case PERF_ADDR_FILTER_ACTION_START:
807 etm_filter->start_addr = start;
808 etm_filter->type = ETM_ADDR_TYPE_START;
809 break;
810 case PERF_ADDR_FILTER_ACTION_STOP:
811 etm_filter->stop_addr = stop;
812 etm_filter->type = ETM_ADDR_TYPE_STOP;
813 break;
814 }
815 i++;
816 }
817
818 filters->nr_filters = i;
819}
820
821int etm_perf_symlink(struct coresight_device *csdev, bool link)
822{
823 char entry[sizeof("cpu9999999")];
824 int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev);
825 struct device *pmu_dev = etm_pmu.dev;
826 struct device *cs_dev = &csdev->dev;
827
828 sprintf(buf: entry, fmt: "cpu%d", cpu);
829
830 if (!etm_perf_up)
831 return -EPROBE_DEFER;
832
833 if (link) {
834 ret = sysfs_create_link(kobj: &pmu_dev->kobj, target: &cs_dev->kobj, name: entry);
835 if (ret)
836 return ret;
837 per_cpu(csdev_src, cpu) = csdev;
838 } else {
839 sysfs_remove_link(kobj: &pmu_dev->kobj, name: entry);
840 per_cpu(csdev_src, cpu) = NULL;
841 }
842
843 return 0;
844}
845EXPORT_SYMBOL_GPL(etm_perf_symlink);
846
847static ssize_t etm_perf_sink_name_show(struct device *dev,
848 struct device_attribute *dattr,
849 char *buf)
850{
851 struct dev_ext_attribute *ea;
852
853 ea = container_of(dattr, struct dev_ext_attribute, attr);
854 return scnprintf(buf, PAGE_SIZE, fmt: "0x%lx\n", (unsigned long)(ea->var));
855}
856
857static struct dev_ext_attribute *
858etm_perf_add_symlink_group(struct device *dev, const char *name, const char *group_name)
859{
860 struct dev_ext_attribute *ea;
861 unsigned long hash;
862 int ret;
863 struct device *pmu_dev = etm_pmu.dev;
864
865 if (!etm_perf_up)
866 return ERR_PTR(error: -EPROBE_DEFER);
867
868 ea = devm_kzalloc(dev, size: sizeof(*ea), GFP_KERNEL);
869 if (!ea)
870 return ERR_PTR(error: -ENOMEM);
871
872 /*
873 * If this function is called adding a sink then the hash is used for
874 * sink selection - see function coresight_get_sink_by_id().
875 * If adding a configuration then the hash is used for selection in
876 * cscfg_activate_config()
877 */
878 hash = hashlen_hash(hashlen_string(NULL, name));
879
880 sysfs_attr_init(&ea->attr.attr);
881 ea->attr.attr.name = devm_kstrdup(dev, s: name, GFP_KERNEL);
882 if (!ea->attr.attr.name)
883 return ERR_PTR(error: -ENOMEM);
884
885 ea->attr.attr.mode = 0444;
886 ea->var = (unsigned long *)hash;
887
888 ret = sysfs_add_file_to_group(kobj: &pmu_dev->kobj,
889 attr: &ea->attr.attr, group: group_name);
890
891 return ret ? ERR_PTR(error: ret) : ea;
892}
893
894int etm_perf_add_symlink_sink(struct coresight_device *csdev)
895{
896 const char *name;
897 struct device *dev = &csdev->dev;
898 int err = 0;
899
900 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
901 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
902 return -EINVAL;
903
904 if (csdev->ea != NULL)
905 return -EINVAL;
906
907 name = dev_name(dev);
908 csdev->ea = etm_perf_add_symlink_group(dev, name, group_name: "sinks");
909 if (IS_ERR(ptr: csdev->ea)) {
910 err = PTR_ERR(ptr: csdev->ea);
911 csdev->ea = NULL;
912 } else
913 csdev->ea->attr.show = etm_perf_sink_name_show;
914
915 return err;
916}
917
918static void etm_perf_del_symlink_group(struct dev_ext_attribute *ea, const char *group_name)
919{
920 struct device *pmu_dev = etm_pmu.dev;
921
922 sysfs_remove_file_from_group(kobj: &pmu_dev->kobj,
923 attr: &ea->attr.attr, group: group_name);
924}
925
926void etm_perf_del_symlink_sink(struct coresight_device *csdev)
927{
928 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
929 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
930 return;
931
932 if (!csdev->ea)
933 return;
934
935 etm_perf_del_symlink_group(ea: csdev->ea, group_name: "sinks");
936 csdev->ea = NULL;
937}
938
939static ssize_t etm_perf_cscfg_event_show(struct device *dev,
940 struct device_attribute *dattr,
941 char *buf)
942{
943 struct dev_ext_attribute *ea;
944
945 ea = container_of(dattr, struct dev_ext_attribute, attr);
946 return scnprintf(buf, PAGE_SIZE, fmt: "configid=0x%lx\n", (unsigned long)(ea->var));
947}
948
949int etm_perf_add_symlink_cscfg(struct device *dev, struct cscfg_config_desc *config_desc)
950{
951 int err = 0;
952
953 if (config_desc->event_ea != NULL)
954 return 0;
955
956 config_desc->event_ea = etm_perf_add_symlink_group(dev, name: config_desc->name, group_name: "events");
957
958 /* set the show function to the custom cscfg event */
959 if (!IS_ERR(ptr: config_desc->event_ea))
960 config_desc->event_ea->attr.show = etm_perf_cscfg_event_show;
961 else {
962 err = PTR_ERR(ptr: config_desc->event_ea);
963 config_desc->event_ea = NULL;
964 }
965
966 return err;
967}
968
969void etm_perf_del_symlink_cscfg(struct cscfg_config_desc *config_desc)
970{
971 if (!config_desc->event_ea)
972 return;
973
974 etm_perf_del_symlink_group(ea: config_desc->event_ea, group_name: "events");
975 config_desc->event_ea = NULL;
976}
977
978int __init etm_perf_init(void)
979{
980 int ret;
981
982 etm_pmu.capabilities = (PERF_PMU_CAP_EXCLUSIVE |
983 PERF_PMU_CAP_ITRACE |
984 PERF_PMU_CAP_AUX_PAUSE);
985
986 etm_pmu.attr_groups = etm_pmu_attr_groups;
987 etm_pmu.task_ctx_nr = perf_sw_context;
988 etm_pmu.read = etm_event_read;
989 etm_pmu.event_init = etm_event_init;
990 etm_pmu.setup_aux = etm_setup_aux;
991 etm_pmu.free_aux = etm_free_aux;
992 etm_pmu.start = etm_event_start;
993 etm_pmu.stop = etm_event_stop;
994 etm_pmu.add = etm_event_add;
995 etm_pmu.del = etm_event_del;
996 etm_pmu.addr_filters_sync = etm_addr_filters_sync;
997 etm_pmu.addr_filters_validate = etm_addr_filters_validate;
998 etm_pmu.nr_addr_filters = ETM_ADDR_CMP_MAX;
999 etm_pmu.module = THIS_MODULE;
1000
1001 ret = perf_pmu_register(pmu: &etm_pmu, CORESIGHT_ETM_PMU_NAME, type: -1);
1002 if (ret == 0)
1003 etm_perf_up = true;
1004
1005 return ret;
1006}
1007
1008void etm_perf_exit(void)
1009{
1010 perf_pmu_unregister(pmu: &etm_pmu);
1011}
1012

source code of linux/drivers/hwtracing/coresight/coresight-etm-perf.c