1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* |
3 | * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. |
4 | * |
5 | */ |
6 | |
7 | #include <linux/platform_device.h> |
8 | #ifndef __LLCC_QCOM__ |
9 | #define __LLCC_QCOM__ |
10 | |
11 | #define LLCC_CPUSS 1 |
12 | #define LLCC_VIDSC0 2 |
13 | #define LLCC_VIDSC1 3 |
14 | #define LLCC_ROTATOR 4 |
15 | #define LLCC_VOICE 5 |
16 | #define LLCC_AUDIO 6 |
17 | #define LLCC_MDMHPGRW 7 |
18 | #define LLCC_MDM 8 |
19 | #define LLCC_MODHW 9 |
20 | #define LLCC_CMPT 10 |
21 | #define LLCC_GPUHTW 11 |
22 | #define LLCC_GPU 12 |
23 | #define LLCC_MMUHWT 13 |
24 | #define LLCC_CMPTDMA 15 |
25 | #define LLCC_DISP 16 |
26 | #define LLCC_VIDFW 17 |
27 | #define LLCC_CAMFW 18 |
28 | #define LLCC_MDMHPFX 20 |
29 | #define LLCC_MDMPNG 21 |
30 | #define LLCC_AUDHW 22 |
31 | #define LLCC_NPU 23 |
32 | #define LLCC_WLHW 24 |
33 | #define LLCC_PIMEM 25 |
34 | #define LLCC_ECC 26 |
35 | #define LLCC_CVP 28 |
36 | #define LLCC_MODPE 29 |
37 | #define LLCC_APTCM 30 |
38 | #define LLCC_WRCACHE 31 |
39 | #define LLCC_CVPFW 32 |
40 | #define LLCC_CPUSS1 33 |
41 | #define LLCC_CAMEXP0 34 |
42 | #define LLCC_CPUMTE 35 |
43 | #define LLCC_CPUHWT 36 |
44 | #define LLCC_MDMCLAD2 37 |
45 | #define LLCC_CAMEXP1 38 |
46 | #define LLCC_CMPTHCP 39 |
47 | #define LLCC_LCPDARE 40 |
48 | #define LLCC_AENPU 45 |
49 | #define LLCC_ISLAND1 46 |
50 | #define LLCC_ISLAND2 47 |
51 | #define LLCC_ISLAND3 48 |
52 | #define LLCC_ISLAND4 49 |
53 | #define LLCC_CAMEXP2 50 |
54 | #define LLCC_CAMEXP3 51 |
55 | #define LLCC_CAMEXP4 52 |
56 | #define LLCC_DISP_WB 53 |
57 | #define LLCC_DISP_1 54 |
58 | #define LLCC_VIEYE 57 |
59 | #define LLCC_VIDPTH 58 |
60 | #define LLCC_GPUMV 59 |
61 | #define LLCC_EVA_LEFT 60 |
62 | #define LLCC_EVA_RIGHT 61 |
63 | #define LLCC_EVAGAIN 62 |
64 | #define LLCC_VIPTH 63 |
65 | #define LLCC_VIDVSP 64 |
66 | #define LLCC_DISP_LEFT 65 |
67 | #define LLCC_DISP_RIGHT 66 |
68 | #define LLCC_EVCS_LEFT 67 |
69 | #define LLCC_EVCS_RIGHT 68 |
70 | #define LLCC_SPAD 69 |
71 | #define LLCC_VIDDEC 70 |
72 | #define LLCC_CAMOFE 71 |
73 | #define LLCC_CAMRTIP 72 |
74 | #define LLCC_CAMSRTIP 73 |
75 | #define LLCC_CAMRTRF 74 |
76 | #define LLCC_CAMSRTRF 75 |
77 | #define LLCC_CPUSSMPAM 89 |
78 | |
79 | /** |
80 | * struct llcc_slice_desc - Cache slice descriptor |
81 | * @slice_id: llcc slice id |
82 | * @slice_size: Size allocated for the llcc slice |
83 | */ |
84 | struct llcc_slice_desc { |
85 | u32 slice_id; |
86 | size_t slice_size; |
87 | }; |
88 | |
89 | /** |
90 | * struct llcc_edac_reg_data - llcc edac registers data for each error type |
91 | * @name: Name of the error |
92 | * @reg_cnt: Number of registers |
93 | * @count_mask: Mask value to get the error count |
94 | * @ways_mask: Mask value to get the error ways |
95 | * @count_shift: Shift value to get the error count |
96 | * @ways_shift: Shift value to get the error ways |
97 | */ |
98 | struct llcc_edac_reg_data { |
99 | char *name; |
100 | u32 reg_cnt; |
101 | u32 count_mask; |
102 | u32 ways_mask; |
103 | u8 count_shift; |
104 | u8 ways_shift; |
105 | }; |
106 | |
107 | struct llcc_edac_reg_offset { |
108 | /* LLCC TRP registers */ |
109 | u32 trp_ecc_error_status0; |
110 | u32 trp_ecc_error_status1; |
111 | u32 trp_ecc_sb_err_syn0; |
112 | u32 trp_ecc_db_err_syn0; |
113 | u32 trp_ecc_error_cntr_clear; |
114 | u32 trp_interrupt_0_status; |
115 | u32 trp_interrupt_0_clear; |
116 | u32 trp_interrupt_0_enable; |
117 | |
118 | /* LLCC Common registers */ |
119 | u32 cmn_status0; |
120 | u32 cmn_interrupt_0_enable; |
121 | u32 cmn_interrupt_2_enable; |
122 | |
123 | /* LLCC DRP registers */ |
124 | u32 drp_ecc_error_cfg; |
125 | u32 drp_ecc_error_cntr_clear; |
126 | u32 drp_interrupt_status; |
127 | u32 drp_interrupt_clear; |
128 | u32 drp_interrupt_enable; |
129 | u32 drp_ecc_error_status0; |
130 | u32 drp_ecc_error_status1; |
131 | u32 drp_ecc_sb_err_syn0; |
132 | u32 drp_ecc_db_err_syn0; |
133 | }; |
134 | |
135 | /** |
136 | * struct llcc_drv_data - Data associated with the llcc driver |
137 | * @regmaps: regmaps associated with the llcc device |
138 | * @bcast_regmap: regmap associated with llcc broadcast OR offset |
139 | * @bcast_and_regmap: regmap associated with llcc broadcast AND offset |
140 | * @cfg: pointer to the data structure for slice configuration |
141 | * @edac_reg_offset: Offset of the LLCC EDAC registers |
142 | * @lock: mutex associated with each slice |
143 | * @cfg_size: size of the config data table |
144 | * @max_slices: max slices as read from device tree |
145 | * @num_banks: Number of llcc banks |
146 | * @bitmap: Bit map to track the active slice ids |
147 | * @ecc_irq: interrupt for llcc cache error detection and reporting |
148 | * @ecc_irq_configured: 'True' if firmware has already configured the irq propagation |
149 | * @version: Indicates the LLCC version |
150 | */ |
151 | struct llcc_drv_data { |
152 | struct regmap **regmaps; |
153 | struct regmap *bcast_regmap; |
154 | struct regmap *bcast_and_regmap; |
155 | const struct llcc_slice_config *cfg; |
156 | const struct llcc_edac_reg_offset *edac_reg_offset; |
157 | struct mutex lock; |
158 | u32 cfg_size; |
159 | u32 max_slices; |
160 | u32 num_banks; |
161 | unsigned long *bitmap; |
162 | int ecc_irq; |
163 | bool ecc_irq_configured; |
164 | u32 version; |
165 | }; |
166 | |
167 | #if IS_ENABLED(CONFIG_QCOM_LLCC) |
168 | /** |
169 | * llcc_slice_getd - get llcc slice descriptor |
170 | * @uid: usecase_id of the client |
171 | */ |
172 | struct llcc_slice_desc *llcc_slice_getd(u32 uid); |
173 | |
174 | /** |
175 | * llcc_slice_putd - llcc slice descritpor |
176 | * @desc: Pointer to llcc slice descriptor |
177 | */ |
178 | void llcc_slice_putd(struct llcc_slice_desc *desc); |
179 | |
180 | /** |
181 | * llcc_get_slice_id - get slice id |
182 | * @desc: Pointer to llcc slice descriptor |
183 | */ |
184 | int llcc_get_slice_id(struct llcc_slice_desc *desc); |
185 | |
186 | /** |
187 | * llcc_get_slice_size - llcc slice size |
188 | * @desc: Pointer to llcc slice descriptor |
189 | */ |
190 | size_t llcc_get_slice_size(struct llcc_slice_desc *desc); |
191 | |
192 | /** |
193 | * llcc_slice_activate - Activate the llcc slice |
194 | * @desc: Pointer to llcc slice descriptor |
195 | */ |
196 | int llcc_slice_activate(struct llcc_slice_desc *desc); |
197 | |
198 | /** |
199 | * llcc_slice_deactivate - Deactivate the llcc slice |
200 | * @desc: Pointer to llcc slice descriptor |
201 | */ |
202 | int llcc_slice_deactivate(struct llcc_slice_desc *desc); |
203 | |
204 | #else |
205 | static inline struct llcc_slice_desc *llcc_slice_getd(u32 uid) |
206 | { |
207 | return NULL; |
208 | } |
209 | |
210 | static inline void llcc_slice_putd(struct llcc_slice_desc *desc) |
211 | { |
212 | |
213 | }; |
214 | |
215 | static inline int llcc_get_slice_id(struct llcc_slice_desc *desc) |
216 | { |
217 | return -EINVAL; |
218 | } |
219 | |
220 | static inline size_t llcc_get_slice_size(struct llcc_slice_desc *desc) |
221 | { |
222 | return 0; |
223 | } |
224 | static inline int llcc_slice_activate(struct llcc_slice_desc *desc) |
225 | { |
226 | return -EINVAL; |
227 | } |
228 | |
229 | static inline int llcc_slice_deactivate(struct llcc_slice_desc *desc) |
230 | { |
231 | return -EINVAL; |
232 | } |
233 | #endif |
234 | |
235 | #endif |
236 | |