| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
|---|
| 2 | /* |
|---|
| 3 | * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved |
|---|
| 4 | */ |
|---|
| 5 | |
|---|
| 6 | #ifndef TEGRA_CBB_H |
|---|
| 7 | #define TEGRA_CBB_H |
|---|
| 8 | |
|---|
| 9 | #include <linux/list.h> |
|---|
| 10 | |
|---|
| 11 | struct tegra_cbb_error { |
|---|
| 12 | const char *code; |
|---|
| 13 | const char *source; |
|---|
| 14 | const char *desc; |
|---|
| 15 | }; |
|---|
| 16 | |
|---|
| 17 | struct tegra_cbb { |
|---|
| 18 | struct device *dev; |
|---|
| 19 | const struct tegra_cbb_ops *ops; |
|---|
| 20 | struct list_head node; |
|---|
| 21 | }; |
|---|
| 22 | |
|---|
| 23 | struct tegra_cbb_ops { |
|---|
| 24 | int (*debugfs_show)(struct tegra_cbb *cbb, struct seq_file *s, void *v); |
|---|
| 25 | int (*interrupt_enable)(struct tegra_cbb *cbb); |
|---|
| 26 | void (*error_enable)(struct tegra_cbb *cbb); |
|---|
| 27 | void (*fault_enable)(struct tegra_cbb *cbb); |
|---|
| 28 | void (*stall_enable)(struct tegra_cbb *cbb); |
|---|
| 29 | void (*error_clear)(struct tegra_cbb *cbb); |
|---|
| 30 | u32 (*get_status)(struct tegra_cbb *cbb); |
|---|
| 31 | }; |
|---|
| 32 | |
|---|
| 33 | int tegra_cbb_get_irq(struct platform_device *pdev, unsigned int *nonsec_irq, |
|---|
| 34 | unsigned int *sec_irq); |
|---|
| 35 | __printf(2, 3) |
|---|
| 36 | void tegra_cbb_print_err(struct seq_file *file, const char *fmt, ...); |
|---|
| 37 | |
|---|
| 38 | void tegra_cbb_print_cache(struct seq_file *file, u32 cache); |
|---|
| 39 | void tegra_cbb_print_prot(struct seq_file *file, u32 prot); |
|---|
| 40 | int tegra_cbb_register(struct tegra_cbb *cbb); |
|---|
| 41 | |
|---|
| 42 | void tegra_cbb_fault_enable(struct tegra_cbb *cbb); |
|---|
| 43 | void tegra_cbb_stall_enable(struct tegra_cbb *cbb); |
|---|
| 44 | void tegra_cbb_error_clear(struct tegra_cbb *cbb); |
|---|
| 45 | u32 tegra_cbb_get_status(struct tegra_cbb *cbb); |
|---|
| 46 | |
|---|
| 47 | #endif /* TEGRA_CBB_H */ |
|---|
| 48 | |
|---|
