1 | /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ |
2 | /* |
3 | * include/linux/spi/spidev.h |
4 | * |
5 | * Copyright (C) 2006 SWAPP |
6 | * Andrea Paterniani <a.paterniani@swapp-eng.it> |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by |
10 | * the Free Software Foundation; either version 2 of the License, or |
11 | * (at your option) any later version. |
12 | * |
13 | * This program is distributed in the hope that it will be useful, |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
16 | * GNU General Public License for more details. |
17 | * |
18 | * You should have received a copy of the GNU General Public License |
19 | * along with this program; if not, write to the Free Software |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
21 | */ |
22 | |
23 | #ifndef SPIDEV_H |
24 | #define SPIDEV_H |
25 | |
26 | #include <linux/types.h> |
27 | #include <linux/ioctl.h> |
28 | #include <linux/spi/spi.h> |
29 | |
30 | /* IOCTL commands */ |
31 | |
32 | #define SPI_IOC_MAGIC 'k' |
33 | |
34 | /** |
35 | * struct spi_ioc_transfer - describes a single SPI transfer |
36 | * @tx_buf: Holds pointer to userspace buffer with transmit data, or null. |
37 | * If no data is provided, zeroes are shifted out. |
38 | * @rx_buf: Holds pointer to userspace buffer for receive data, or null. |
39 | * @len: Length of tx and rx buffers, in bytes. |
40 | * @speed_hz: Temporary override of the device's bitrate. |
41 | * @bits_per_word: Temporary override of the device's wordsize. |
42 | * @delay_usecs: If nonzero, how long to delay after the last bit transfer |
43 | * before optionally deselecting the device before the next transfer. |
44 | * @cs_change: True to deselect device before starting the next transfer. |
45 | * @word_delay_usecs: If nonzero, how long to wait between words within one |
46 | * transfer. This property needs explicit support in the SPI controller, |
47 | * otherwise it is silently ignored. |
48 | * |
49 | * This structure is mapped directly to the kernel spi_transfer structure; |
50 | * the fields have the same meanings, except of course that the pointers |
51 | * are in a different address space (and may be of different sizes in some |
52 | * cases, such as 32-bit i386 userspace over a 64-bit x86_64 kernel). |
53 | * Zero-initialize the structure, including currently unused fields, to |
54 | * accommodate potential future updates. |
55 | * |
56 | * SPI_IOC_MESSAGE gives userspace the equivalent of kernel spi_sync(). |
57 | * Pass it an array of related transfers, they'll execute together. |
58 | * Each transfer may be half duplex (either direction) or full duplex. |
59 | * |
60 | * struct spi_ioc_transfer mesg[4]; |
61 | * ... |
62 | * status = ioctl(fd, SPI_IOC_MESSAGE(4), mesg); |
63 | * |
64 | * So for example one transfer might send a nine bit command (right aligned |
65 | * in a 16-bit word), the next could read a block of 8-bit data before |
66 | * terminating that command by temporarily deselecting the chip; the next |
67 | * could send a different nine bit command (re-selecting the chip), and the |
68 | * last transfer might write some register values. |
69 | */ |
70 | struct spi_ioc_transfer { |
71 | __u64 tx_buf; |
72 | __u64 rx_buf; |
73 | |
74 | __u32 len; |
75 | __u32 speed_hz; |
76 | |
77 | __u16 delay_usecs; |
78 | __u8 bits_per_word; |
79 | __u8 cs_change; |
80 | __u8 tx_nbits; |
81 | __u8 rx_nbits; |
82 | __u8 word_delay_usecs; |
83 | __u8 pad; |
84 | |
85 | /* If the contents of 'struct spi_ioc_transfer' ever change |
86 | * incompatibly, then the ioctl number (currently 0) must change; |
87 | * ioctls with constant size fields get a bit more in the way of |
88 | * error checking than ones (like this) where that field varies. |
89 | * |
90 | * NOTE: struct layout is the same in 64bit and 32bit userspace. |
91 | */ |
92 | }; |
93 | |
94 | /* not all platforms use <asm-generic/ioctl.h> or _IOC_TYPECHECK() ... */ |
95 | #define SPI_MSGSIZE(N) \ |
96 | ((((N)*(sizeof (struct spi_ioc_transfer))) < (1 << _IOC_SIZEBITS)) \ |
97 | ? ((N)*(sizeof (struct spi_ioc_transfer))) : 0) |
98 | #define SPI_IOC_MESSAGE(N) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(N)]) |
99 | |
100 | |
101 | /* Read / Write of SPI mode (SPI_MODE_0..SPI_MODE_3) (limited to 8 bits) */ |
102 | #define SPI_IOC_RD_MODE _IOR(SPI_IOC_MAGIC, 1, __u8) |
103 | #define SPI_IOC_WR_MODE _IOW(SPI_IOC_MAGIC, 1, __u8) |
104 | |
105 | /* Read / Write SPI bit justification */ |
106 | #define SPI_IOC_RD_LSB_FIRST _IOR(SPI_IOC_MAGIC, 2, __u8) |
107 | #define SPI_IOC_WR_LSB_FIRST _IOW(SPI_IOC_MAGIC, 2, __u8) |
108 | |
109 | /* Read / Write SPI device word length (1..N) */ |
110 | #define SPI_IOC_RD_BITS_PER_WORD _IOR(SPI_IOC_MAGIC, 3, __u8) |
111 | #define SPI_IOC_WR_BITS_PER_WORD _IOW(SPI_IOC_MAGIC, 3, __u8) |
112 | |
113 | /* Read / Write SPI device default max speed hz */ |
114 | #define SPI_IOC_RD_MAX_SPEED_HZ _IOR(SPI_IOC_MAGIC, 4, __u32) |
115 | #define SPI_IOC_WR_MAX_SPEED_HZ _IOW(SPI_IOC_MAGIC, 4, __u32) |
116 | |
117 | /* Read / Write of the SPI mode field */ |
118 | #define SPI_IOC_RD_MODE32 _IOR(SPI_IOC_MAGIC, 5, __u32) |
119 | #define SPI_IOC_WR_MODE32 _IOW(SPI_IOC_MAGIC, 5, __u32) |
120 | |
121 | |
122 | |
123 | #endif /* SPIDEV_H */ |
124 | |