| 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | // |
| 3 | // Driver for the TAS5805M Audio Amplifier |
| 4 | // |
| 5 | // Author: Andy Liu <andy-liu@ti.com> |
| 6 | // Author: Daniel Beer <daniel.beer@igorinstitute.com> |
| 7 | // |
| 8 | // This is based on a driver originally written by Andy Liu at TI and |
| 9 | // posted here: |
| 10 | // |
| 11 | // https://e2e.ti.com/support/audio-group/audio/f/audio-forum/722027/linux-tas5825m-linux-drivers |
| 12 | // |
| 13 | // It has been simplified a little and reworked for the 5.x ALSA SoC API. |
| 14 | |
| 15 | #include <linux/module.h> |
| 16 | #include <linux/moduleparam.h> |
| 17 | #include <linux/kernel.h> |
| 18 | #include <linux/firmware.h> |
| 19 | #include <linux/slab.h> |
| 20 | #include <linux/of.h> |
| 21 | #include <linux/init.h> |
| 22 | #include <linux/i2c.h> |
| 23 | #include <linux/regmap.h> |
| 24 | #include <linux/gpio/consumer.h> |
| 25 | #include <linux/regulator/consumer.h> |
| 26 | #include <linux/atomic.h> |
| 27 | #include <linux/workqueue.h> |
| 28 | |
| 29 | #include <sound/soc.h> |
| 30 | #include <sound/pcm.h> |
| 31 | #include <sound/initval.h> |
| 32 | |
| 33 | /* Datasheet-defined registers on page 0, book 0 */ |
| 34 | #define REG_PAGE 0x00 |
| 35 | #define REG_DEVICE_CTRL_1 0x02 |
| 36 | #define REG_DEVICE_CTRL_2 0x03 |
| 37 | #define REG_SIG_CH_CTRL 0x28 |
| 38 | #define REG_SAP_CTRL_1 0x33 |
| 39 | #define REG_FS_MON 0x37 |
| 40 | #define REG_BCK_MON 0x38 |
| 41 | #define REG_CLKDET_STATUS 0x39 |
| 42 | #define REG_VOL_CTL 0x4c |
| 43 | #define REG_AGAIN 0x54 |
| 44 | #define REG_ADR_PIN_CTRL 0x60 |
| 45 | #define REG_ADR_PIN_CONFIG 0x61 |
| 46 | #define REG_CHAN_FAULT 0x70 |
| 47 | #define REG_GLOBAL_FAULT1 0x71 |
| 48 | #define REG_GLOBAL_FAULT2 0x72 |
| 49 | #define REG_FAULT 0x78 |
| 50 | #define REG_BOOK 0x7f |
| 51 | |
| 52 | /* DEVICE_CTRL_2 register values */ |
| 53 | #define DCTRL2_MODE_DEEP_SLEEP 0x00 |
| 54 | #define DCTRL2_MODE_SLEEP 0x01 |
| 55 | #define DCTRL2_MODE_HIZ 0x02 |
| 56 | #define DCTRL2_MODE_PLAY 0x03 |
| 57 | |
| 58 | #define DCTRL2_MUTE 0x08 |
| 59 | #define DCTRL2_DIS_DSP 0x10 |
| 60 | |
| 61 | /* This sequence of register writes must always be sent, prior to the |
| 62 | * 5ms delay while we wait for the DSP to boot. |
| 63 | */ |
| 64 | static const uint8_t dsp_cfg_preboot[] = { |
| 65 | 0x00, 0x00, 0x7f, 0x00, 0x03, 0x02, 0x01, 0x11, |
| 66 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 67 | 0x00, 0x00, 0x7f, 0x00, 0x03, 0x02, |
| 68 | }; |
| 69 | |
| 70 | static const uint32_t tas5805m_volume[] = { |
| 71 | 0x0000001B, /* 0, -110dB */ 0x0000001E, /* 1, -109dB */ |
| 72 | 0x00000021, /* 2, -108dB */ 0x00000025, /* 3, -107dB */ |
| 73 | 0x0000002A, /* 4, -106dB */ 0x0000002F, /* 5, -105dB */ |
| 74 | 0x00000035, /* 6, -104dB */ 0x0000003B, /* 7, -103dB */ |
| 75 | 0x00000043, /* 8, -102dB */ 0x0000004B, /* 9, -101dB */ |
| 76 | 0x00000054, /* 10, -100dB */ 0x0000005E, /* 11, -99dB */ |
| 77 | 0x0000006A, /* 12, -98dB */ 0x00000076, /* 13, -97dB */ |
| 78 | 0x00000085, /* 14, -96dB */ 0x00000095, /* 15, -95dB */ |
| 79 | 0x000000A7, /* 16, -94dB */ 0x000000BC, /* 17, -93dB */ |
| 80 | 0x000000D3, /* 18, -92dB */ 0x000000EC, /* 19, -91dB */ |
| 81 | 0x00000109, /* 20, -90dB */ 0x0000012A, /* 21, -89dB */ |
| 82 | 0x0000014E, /* 22, -88dB */ 0x00000177, /* 23, -87dB */ |
| 83 | 0x000001A4, /* 24, -86dB */ 0x000001D8, /* 25, -85dB */ |
| 84 | 0x00000211, /* 26, -84dB */ 0x00000252, /* 27, -83dB */ |
| 85 | 0x0000029A, /* 28, -82dB */ 0x000002EC, /* 29, -81dB */ |
| 86 | 0x00000347, /* 30, -80dB */ 0x000003AD, /* 31, -79dB */ |
| 87 | 0x00000420, /* 32, -78dB */ 0x000004A1, /* 33, -77dB */ |
| 88 | 0x00000532, /* 34, -76dB */ 0x000005D4, /* 35, -75dB */ |
| 89 | 0x0000068A, /* 36, -74dB */ 0x00000756, /* 37, -73dB */ |
| 90 | 0x0000083B, /* 38, -72dB */ 0x0000093C, /* 39, -71dB */ |
| 91 | 0x00000A5D, /* 40, -70dB */ 0x00000BA0, /* 41, -69dB */ |
| 92 | 0x00000D0C, /* 42, -68dB */ 0x00000EA3, /* 43, -67dB */ |
| 93 | 0x0000106C, /* 44, -66dB */ 0x0000126D, /* 45, -65dB */ |
| 94 | 0x000014AD, /* 46, -64dB */ 0x00001733, /* 47, -63dB */ |
| 95 | 0x00001A07, /* 48, -62dB */ 0x00001D34, /* 49, -61dB */ |
| 96 | 0x000020C5, /* 50, -60dB */ 0x000024C4, /* 51, -59dB */ |
| 97 | 0x00002941, /* 52, -58dB */ 0x00002E49, /* 53, -57dB */ |
| 98 | 0x000033EF, /* 54, -56dB */ 0x00003A45, /* 55, -55dB */ |
| 99 | 0x00004161, /* 56, -54dB */ 0x0000495C, /* 57, -53dB */ |
| 100 | 0x0000524F, /* 58, -52dB */ 0x00005C5A, /* 59, -51dB */ |
| 101 | 0x0000679F, /* 60, -50dB */ 0x00007444, /* 61, -49dB */ |
| 102 | 0x00008274, /* 62, -48dB */ 0x0000925F, /* 63, -47dB */ |
| 103 | 0x0000A43B, /* 64, -46dB */ 0x0000B845, /* 65, -45dB */ |
| 104 | 0x0000CEC1, /* 66, -44dB */ 0x0000E7FB, /* 67, -43dB */ |
| 105 | 0x00010449, /* 68, -42dB */ 0x0001240C, /* 69, -41dB */ |
| 106 | 0x000147AE, /* 70, -40dB */ 0x00016FAA, /* 71, -39dB */ |
| 107 | 0x00019C86, /* 72, -38dB */ 0x0001CEDC, /* 73, -37dB */ |
| 108 | 0x00020756, /* 74, -36dB */ 0x000246B5, /* 75, -35dB */ |
| 109 | 0x00028DCF, /* 76, -34dB */ 0x0002DD96, /* 77, -33dB */ |
| 110 | 0x00033718, /* 78, -32dB */ 0x00039B87, /* 79, -31dB */ |
| 111 | 0x00040C37, /* 80, -30dB */ 0x00048AA7, /* 81, -29dB */ |
| 112 | 0x00051884, /* 82, -28dB */ 0x0005B7B1, /* 83, -27dB */ |
| 113 | 0x00066A4A, /* 84, -26dB */ 0x000732AE, /* 85, -25dB */ |
| 114 | 0x00081385, /* 86, -24dB */ 0x00090FCC, /* 87, -23dB */ |
| 115 | 0x000A2ADB, /* 88, -22dB */ 0x000B6873, /* 89, -21dB */ |
| 116 | 0x000CCCCD, /* 90, -20dB */ 0x000E5CA1, /* 91, -19dB */ |
| 117 | 0x00101D3F, /* 92, -18dB */ 0x0012149A, /* 93, -17dB */ |
| 118 | 0x00144961, /* 94, -16dB */ 0x0016C311, /* 95, -15dB */ |
| 119 | 0x00198A13, /* 96, -14dB */ 0x001CA7D7, /* 97, -13dB */ |
| 120 | 0x002026F3, /* 98, -12dB */ 0x00241347, /* 99, -11dB */ |
| 121 | 0x00287A27, /* 100, -10dB */ 0x002D6A86, /* 101, -9dB */ |
| 122 | 0x0032F52D, /* 102, -8dB */ 0x00392CEE, /* 103, -7dB */ |
| 123 | 0x004026E7, /* 104, -6dB */ 0x0047FACD, /* 105, -5dB */ |
| 124 | 0x0050C336, /* 106, -4dB */ 0x005A9DF8, /* 107, -3dB */ |
| 125 | 0x0065AC8C, /* 108, -2dB */ 0x00721483, /* 109, -1dB */ |
| 126 | 0x00800000, /* 110, 0dB */ 0x008F9E4D, /* 111, 1dB */ |
| 127 | 0x00A12478, /* 112, 2dB */ 0x00B4CE08, /* 113, 3dB */ |
| 128 | 0x00CADDC8, /* 114, 4dB */ 0x00E39EA9, /* 115, 5dB */ |
| 129 | 0x00FF64C1, /* 116, 6dB */ 0x011E8E6A, /* 117, 7dB */ |
| 130 | 0x0141857F, /* 118, 8dB */ 0x0168C0C6, /* 119, 9dB */ |
| 131 | 0x0194C584, /* 120, 10dB */ 0x01C62940, /* 121, 11dB */ |
| 132 | 0x01FD93C2, /* 122, 12dB */ 0x023BC148, /* 123, 13dB */ |
| 133 | 0x02818508, /* 124, 14dB */ 0x02CFCC01, /* 125, 15dB */ |
| 134 | 0x0327A01A, /* 126, 16dB */ 0x038A2BAD, /* 127, 17dB */ |
| 135 | 0x03F8BD7A, /* 128, 18dB */ 0x0474CD1B, /* 129, 19dB */ |
| 136 | 0x05000000, /* 130, 20dB */ 0x059C2F02, /* 131, 21dB */ |
| 137 | 0x064B6CAE, /* 132, 22dB */ 0x07100C4D, /* 133, 23dB */ |
| 138 | 0x07ECA9CD, /* 134, 24dB */ 0x08E43299, /* 135, 25dB */ |
| 139 | 0x09F9EF8E, /* 136, 26dB */ 0x0B319025, /* 137, 27dB */ |
| 140 | 0x0C8F36F2, /* 138, 28dB */ 0x0E1787B8, /* 139, 29dB */ |
| 141 | 0x0FCFB725, /* 140, 30dB */ 0x11BD9C84, /* 141, 31dB */ |
| 142 | 0x13E7C594, /* 142, 32dB */ 0x16558CCB, /* 143, 33dB */ |
| 143 | 0x190F3254, /* 144, 34dB */ 0x1C1DF80E, /* 145, 35dB */ |
| 144 | 0x1F8C4107, /* 146, 36dB */ 0x2365B4BF, /* 147, 37dB */ |
| 145 | 0x27B766C2, /* 148, 38dB */ 0x2C900313, /* 149, 39dB */ |
| 146 | 0x32000000, /* 150, 40dB */ 0x3819D612, /* 151, 41dB */ |
| 147 | 0x3EF23ECA, /* 152, 42dB */ 0x46A07B07, /* 153, 43dB */ |
| 148 | 0x4F3EA203, /* 154, 44dB */ 0x58E9F9F9, /* 155, 45dB */ |
| 149 | 0x63C35B8E, /* 156, 46dB */ 0x6FEFA16D, /* 157, 47dB */ |
| 150 | 0x7D982575, /* 158, 48dB */ |
| 151 | }; |
| 152 | |
| 153 | #define TAS5805M_VOLUME_MAX ((int)ARRAY_SIZE(tas5805m_volume) - 1) |
| 154 | #define TAS5805M_VOLUME_MIN 0 |
| 155 | |
| 156 | struct tas5805m_priv { |
| 157 | struct i2c_client *i2c; |
| 158 | struct regulator *pvdd; |
| 159 | struct gpio_desc *gpio_pdn_n; |
| 160 | |
| 161 | uint8_t *dsp_cfg_data; |
| 162 | int dsp_cfg_len; |
| 163 | |
| 164 | struct regmap *regmap; |
| 165 | |
| 166 | int vol[2]; |
| 167 | bool is_powered; |
| 168 | bool is_muted; |
| 169 | |
| 170 | struct work_struct work; |
| 171 | struct mutex lock; |
| 172 | }; |
| 173 | |
| 174 | static void set_dsp_scale(struct regmap *rm, int offset, int vol) |
| 175 | { |
| 176 | uint8_t v[4]; |
| 177 | uint32_t x = tas5805m_volume[vol]; |
| 178 | int i; |
| 179 | |
| 180 | for (i = 0; i < 4; i++) { |
| 181 | v[3 - i] = x; |
| 182 | x >>= 8; |
| 183 | } |
| 184 | |
| 185 | regmap_bulk_write(map: rm, reg: offset, val: v, ARRAY_SIZE(v)); |
| 186 | } |
| 187 | |
| 188 | static void tas5805m_refresh(struct tas5805m_priv *tas5805m) |
| 189 | { |
| 190 | struct regmap *rm = tas5805m->regmap; |
| 191 | |
| 192 | dev_dbg(&tas5805m->i2c->dev, "refresh: is_muted=%d, vol=%d/%d\n" , |
| 193 | tas5805m->is_muted, tas5805m->vol[0], tas5805m->vol[1]); |
| 194 | |
| 195 | regmap_write(map: rm, REG_PAGE, val: 0x00); |
| 196 | regmap_write(map: rm, REG_BOOK, val: 0x8c); |
| 197 | regmap_write(map: rm, REG_PAGE, val: 0x2a); |
| 198 | |
| 199 | /* Refresh volume. The actual volume control documented in the |
| 200 | * datasheet doesn't seem to work correctly. This is a pair of |
| 201 | * DSP registers which are *not* documented in the datasheet. |
| 202 | */ |
| 203 | set_dsp_scale(rm, offset: 0x24, vol: tas5805m->vol[0]); |
| 204 | set_dsp_scale(rm, offset: 0x28, vol: tas5805m->vol[1]); |
| 205 | |
| 206 | regmap_write(map: rm, REG_PAGE, val: 0x00); |
| 207 | regmap_write(map: rm, REG_BOOK, val: 0x00); |
| 208 | |
| 209 | /* Set/clear digital soft-mute */ |
| 210 | regmap_write(map: rm, REG_DEVICE_CTRL_2, |
| 211 | val: (tas5805m->is_muted ? DCTRL2_MUTE : 0) | |
| 212 | DCTRL2_MODE_PLAY); |
| 213 | } |
| 214 | |
| 215 | static int tas5805m_vol_info(struct snd_kcontrol *kcontrol, |
| 216 | struct snd_ctl_elem_info *uinfo) |
| 217 | { |
| 218 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; |
| 219 | uinfo->count = 2; |
| 220 | |
| 221 | uinfo->value.integer.min = TAS5805M_VOLUME_MIN; |
| 222 | uinfo->value.integer.max = TAS5805M_VOLUME_MAX; |
| 223 | return 0; |
| 224 | } |
| 225 | |
| 226 | static int tas5805m_vol_get(struct snd_kcontrol *kcontrol, |
| 227 | struct snd_ctl_elem_value *ucontrol) |
| 228 | { |
| 229 | struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); |
| 230 | struct tas5805m_priv *tas5805m = |
| 231 | snd_soc_component_get_drvdata(c: component); |
| 232 | |
| 233 | mutex_lock(&tas5805m->lock); |
| 234 | ucontrol->value.integer.value[0] = tas5805m->vol[0]; |
| 235 | ucontrol->value.integer.value[1] = tas5805m->vol[1]; |
| 236 | mutex_unlock(lock: &tas5805m->lock); |
| 237 | |
| 238 | return 0; |
| 239 | } |
| 240 | |
| 241 | static inline int volume_is_valid(int v) |
| 242 | { |
| 243 | return (v >= TAS5805M_VOLUME_MIN) && (v <= TAS5805M_VOLUME_MAX); |
| 244 | } |
| 245 | |
| 246 | static int tas5805m_vol_put(struct snd_kcontrol *kcontrol, |
| 247 | struct snd_ctl_elem_value *ucontrol) |
| 248 | { |
| 249 | struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); |
| 250 | struct tas5805m_priv *tas5805m = |
| 251 | snd_soc_component_get_drvdata(c: component); |
| 252 | int ret = 0; |
| 253 | |
| 254 | if (!(volume_is_valid(v: ucontrol->value.integer.value[0]) && |
| 255 | volume_is_valid(v: ucontrol->value.integer.value[1]))) |
| 256 | return -EINVAL; |
| 257 | |
| 258 | mutex_lock(&tas5805m->lock); |
| 259 | if (tas5805m->vol[0] != ucontrol->value.integer.value[0] || |
| 260 | tas5805m->vol[1] != ucontrol->value.integer.value[1]) { |
| 261 | tas5805m->vol[0] = ucontrol->value.integer.value[0]; |
| 262 | tas5805m->vol[1] = ucontrol->value.integer.value[1]; |
| 263 | dev_dbg(component->dev, "set vol=%d/%d (is_powered=%d)\n" , |
| 264 | tas5805m->vol[0], tas5805m->vol[1], |
| 265 | tas5805m->is_powered); |
| 266 | if (tas5805m->is_powered) |
| 267 | tas5805m_refresh(tas5805m); |
| 268 | ret = 1; |
| 269 | } |
| 270 | mutex_unlock(lock: &tas5805m->lock); |
| 271 | |
| 272 | return ret; |
| 273 | } |
| 274 | |
| 275 | static const struct snd_kcontrol_new tas5805m_snd_controls[] = { |
| 276 | { |
| 277 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 278 | .name = "Master Playback Volume" , |
| 279 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | |
| 280 | SNDRV_CTL_ELEM_ACCESS_READWRITE, |
| 281 | .info = tas5805m_vol_info, |
| 282 | .get = tas5805m_vol_get, |
| 283 | .put = tas5805m_vol_put, |
| 284 | }, |
| 285 | }; |
| 286 | |
| 287 | static void send_cfg(struct regmap *rm, |
| 288 | const uint8_t *s, unsigned int len) |
| 289 | { |
| 290 | unsigned int i; |
| 291 | |
| 292 | for (i = 0; i + 1 < len; i += 2) |
| 293 | regmap_write(map: rm, reg: s[i], val: s[i + 1]); |
| 294 | } |
| 295 | |
| 296 | /* The TAS5805M DSP can't be configured until the I2S clock has been |
| 297 | * present and stable for 5ms, or else it won't boot and we get no |
| 298 | * sound. |
| 299 | */ |
| 300 | static int tas5805m_trigger(struct snd_pcm_substream *substream, int cmd, |
| 301 | struct snd_soc_dai *dai) |
| 302 | { |
| 303 | struct snd_soc_component *component = dai->component; |
| 304 | struct tas5805m_priv *tas5805m = |
| 305 | snd_soc_component_get_drvdata(c: component); |
| 306 | |
| 307 | switch (cmd) { |
| 308 | case SNDRV_PCM_TRIGGER_START: |
| 309 | case SNDRV_PCM_TRIGGER_RESUME: |
| 310 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 311 | dev_dbg(component->dev, "clock start\n" ); |
| 312 | schedule_work(work: &tas5805m->work); |
| 313 | break; |
| 314 | |
| 315 | case SNDRV_PCM_TRIGGER_STOP: |
| 316 | case SNDRV_PCM_TRIGGER_SUSPEND: |
| 317 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
| 318 | break; |
| 319 | |
| 320 | default: |
| 321 | return -EINVAL; |
| 322 | } |
| 323 | |
| 324 | return 0; |
| 325 | } |
| 326 | |
| 327 | static void do_work(struct work_struct *work) |
| 328 | { |
| 329 | struct tas5805m_priv *tas5805m = |
| 330 | container_of(work, struct tas5805m_priv, work); |
| 331 | struct regmap *rm = tas5805m->regmap; |
| 332 | |
| 333 | dev_dbg(&tas5805m->i2c->dev, "DSP startup\n" ); |
| 334 | |
| 335 | mutex_lock(&tas5805m->lock); |
| 336 | /* We mustn't issue any I2C transactions until the I2S |
| 337 | * clock is stable. Furthermore, we must allow a 5ms |
| 338 | * delay after the first set of register writes to |
| 339 | * allow the DSP to boot before configuring it. |
| 340 | */ |
| 341 | usleep_range(min: 5000, max: 10000); |
| 342 | send_cfg(rm, s: dsp_cfg_preboot, ARRAY_SIZE(dsp_cfg_preboot)); |
| 343 | usleep_range(min: 5000, max: 15000); |
| 344 | send_cfg(rm, s: tas5805m->dsp_cfg_data, len: tas5805m->dsp_cfg_len); |
| 345 | |
| 346 | tas5805m->is_powered = true; |
| 347 | tas5805m_refresh(tas5805m); |
| 348 | mutex_unlock(lock: &tas5805m->lock); |
| 349 | } |
| 350 | |
| 351 | static int tas5805m_dac_event(struct snd_soc_dapm_widget *w, |
| 352 | struct snd_kcontrol *kcontrol, int event) |
| 353 | { |
| 354 | struct snd_soc_component *component = snd_soc_dapm_to_component(dapm: w->dapm); |
| 355 | struct tas5805m_priv *tas5805m = |
| 356 | snd_soc_component_get_drvdata(c: component); |
| 357 | struct regmap *rm = tas5805m->regmap; |
| 358 | |
| 359 | if (event & SND_SOC_DAPM_PRE_PMD) { |
| 360 | unsigned int chan, global1, global2; |
| 361 | |
| 362 | dev_dbg(component->dev, "DSP shutdown\n" ); |
| 363 | cancel_work_sync(work: &tas5805m->work); |
| 364 | |
| 365 | mutex_lock(&tas5805m->lock); |
| 366 | if (tas5805m->is_powered) { |
| 367 | tas5805m->is_powered = false; |
| 368 | |
| 369 | regmap_write(map: rm, REG_PAGE, val: 0x00); |
| 370 | regmap_write(map: rm, REG_BOOK, val: 0x00); |
| 371 | |
| 372 | regmap_read(map: rm, REG_CHAN_FAULT, val: &chan); |
| 373 | regmap_read(map: rm, REG_GLOBAL_FAULT1, val: &global1); |
| 374 | regmap_read(map: rm, REG_GLOBAL_FAULT2, val: &global2); |
| 375 | |
| 376 | dev_dbg(component->dev, "fault regs: CHAN=%02x, " |
| 377 | "GLOBAL1=%02x, GLOBAL2=%02x\n" , |
| 378 | chan, global1, global2); |
| 379 | |
| 380 | regmap_write(map: rm, REG_DEVICE_CTRL_2, DCTRL2_MODE_HIZ); |
| 381 | } |
| 382 | mutex_unlock(lock: &tas5805m->lock); |
| 383 | } |
| 384 | |
| 385 | return 0; |
| 386 | } |
| 387 | |
| 388 | static const struct snd_soc_dapm_route tas5805m_audio_map[] = { |
| 389 | { "DAC" , NULL, "DAC IN" }, |
| 390 | { "OUT" , NULL, "DAC" }, |
| 391 | }; |
| 392 | |
| 393 | static const struct snd_soc_dapm_widget tas5805m_dapm_widgets[] = { |
| 394 | SND_SOC_DAPM_AIF_IN("DAC IN" , "Playback" , 0, SND_SOC_NOPM, 0, 0), |
| 395 | SND_SOC_DAPM_DAC_E("DAC" , NULL, SND_SOC_NOPM, 0, 0, |
| 396 | tas5805m_dac_event, SND_SOC_DAPM_PRE_PMD), |
| 397 | SND_SOC_DAPM_OUTPUT("OUT" ) |
| 398 | }; |
| 399 | |
| 400 | static const struct snd_soc_component_driver soc_codec_dev_tas5805m = { |
| 401 | .controls = tas5805m_snd_controls, |
| 402 | .num_controls = ARRAY_SIZE(tas5805m_snd_controls), |
| 403 | .dapm_widgets = tas5805m_dapm_widgets, |
| 404 | .num_dapm_widgets = ARRAY_SIZE(tas5805m_dapm_widgets), |
| 405 | .dapm_routes = tas5805m_audio_map, |
| 406 | .num_dapm_routes = ARRAY_SIZE(tas5805m_audio_map), |
| 407 | .use_pmdown_time = 1, |
| 408 | .endianness = 1, |
| 409 | }; |
| 410 | |
| 411 | static int tas5805m_mute(struct snd_soc_dai *dai, int mute, int direction) |
| 412 | { |
| 413 | struct snd_soc_component *component = dai->component; |
| 414 | struct tas5805m_priv *tas5805m = |
| 415 | snd_soc_component_get_drvdata(c: component); |
| 416 | |
| 417 | mutex_lock(&tas5805m->lock); |
| 418 | dev_dbg(component->dev, "set mute=%d (is_powered=%d)\n" , |
| 419 | mute, tas5805m->is_powered); |
| 420 | |
| 421 | tas5805m->is_muted = mute; |
| 422 | if (tas5805m->is_powered) |
| 423 | tas5805m_refresh(tas5805m); |
| 424 | mutex_unlock(lock: &tas5805m->lock); |
| 425 | |
| 426 | return 0; |
| 427 | } |
| 428 | |
| 429 | static const struct snd_soc_dai_ops tas5805m_dai_ops = { |
| 430 | .trigger = tas5805m_trigger, |
| 431 | .mute_stream = tas5805m_mute, |
| 432 | .no_capture_mute = 1, |
| 433 | }; |
| 434 | |
| 435 | static struct snd_soc_dai_driver tas5805m_dai = { |
| 436 | .name = "tas5805m-amplifier" , |
| 437 | .playback = { |
| 438 | .stream_name = "Playback" , |
| 439 | .channels_min = 2, |
| 440 | .channels_max = 2, |
| 441 | .rates = SNDRV_PCM_RATE_48000, |
| 442 | .formats = SNDRV_PCM_FMTBIT_S32_LE, |
| 443 | }, |
| 444 | .ops = &tas5805m_dai_ops, |
| 445 | }; |
| 446 | |
| 447 | static const struct regmap_config tas5805m_regmap = { |
| 448 | .reg_bits = 8, |
| 449 | .val_bits = 8, |
| 450 | |
| 451 | /* We have quite a lot of multi-level bank switching and a |
| 452 | * relatively small number of register writes between bank |
| 453 | * switches. |
| 454 | */ |
| 455 | .cache_type = REGCACHE_NONE, |
| 456 | }; |
| 457 | |
| 458 | static int tas5805m_i2c_probe(struct i2c_client *i2c) |
| 459 | { |
| 460 | struct device *dev = &i2c->dev; |
| 461 | struct regmap *regmap; |
| 462 | struct tas5805m_priv *tas5805m; |
| 463 | char filename[128]; |
| 464 | const char *config_name; |
| 465 | const struct firmware *fw; |
| 466 | int ret; |
| 467 | |
| 468 | regmap = devm_regmap_init_i2c(i2c, &tas5805m_regmap); |
| 469 | if (IS_ERR(ptr: regmap)) { |
| 470 | ret = PTR_ERR(ptr: regmap); |
| 471 | dev_err(dev, "unable to allocate register map: %d\n" , ret); |
| 472 | return ret; |
| 473 | } |
| 474 | |
| 475 | tas5805m = devm_kzalloc(dev, size: sizeof(*tas5805m), GFP_KERNEL); |
| 476 | if (!tas5805m) |
| 477 | return -ENOMEM; |
| 478 | |
| 479 | tas5805m->i2c = i2c; |
| 480 | tas5805m->pvdd = devm_regulator_get(dev, id: "pvdd" ); |
| 481 | if (IS_ERR(ptr: tas5805m->pvdd)) { |
| 482 | dev_err(dev, "failed to get pvdd supply: %ld\n" , |
| 483 | PTR_ERR(tas5805m->pvdd)); |
| 484 | return PTR_ERR(ptr: tas5805m->pvdd); |
| 485 | } |
| 486 | |
| 487 | dev_set_drvdata(dev, data: tas5805m); |
| 488 | tas5805m->regmap = regmap; |
| 489 | tas5805m->gpio_pdn_n = devm_gpiod_get(dev, con_id: "pdn" , flags: GPIOD_OUT_LOW); |
| 490 | if (IS_ERR(ptr: tas5805m->gpio_pdn_n)) { |
| 491 | dev_err(dev, "error requesting PDN gpio: %ld\n" , |
| 492 | PTR_ERR(tas5805m->gpio_pdn_n)); |
| 493 | return PTR_ERR(ptr: tas5805m->gpio_pdn_n); |
| 494 | } |
| 495 | |
| 496 | /* This configuration must be generated by PPC3. The file loaded |
| 497 | * consists of a sequence of register writes, where bytes at |
| 498 | * even indices are register addresses and those at odd indices |
| 499 | * are register values. |
| 500 | * |
| 501 | * The fixed portion of PPC3's output prior to the 5ms delay |
| 502 | * should be omitted. |
| 503 | */ |
| 504 | if (device_property_read_string(dev, propname: "ti,dsp-config-name" , |
| 505 | val: &config_name)) |
| 506 | config_name = "default" ; |
| 507 | |
| 508 | snprintf(buf: filename, size: sizeof(filename), fmt: "tas5805m_dsp_%s.bin" , |
| 509 | config_name); |
| 510 | ret = request_firmware(fw: &fw, name: filename, device: dev); |
| 511 | if (ret) |
| 512 | return ret; |
| 513 | |
| 514 | if ((fw->size < 2) || (fw->size & 1)) { |
| 515 | dev_err(dev, "firmware is invalid\n" ); |
| 516 | release_firmware(fw); |
| 517 | return -EINVAL; |
| 518 | } |
| 519 | |
| 520 | tas5805m->dsp_cfg_len = fw->size; |
| 521 | tas5805m->dsp_cfg_data = devm_kmemdup(dev, src: fw->data, len: fw->size, GFP_KERNEL); |
| 522 | if (!tas5805m->dsp_cfg_data) { |
| 523 | release_firmware(fw); |
| 524 | return -ENOMEM; |
| 525 | } |
| 526 | |
| 527 | release_firmware(fw); |
| 528 | |
| 529 | /* Do the first part of the power-on here, while we can expect |
| 530 | * the I2S interface to be quiet. We must raise PDN# and then |
| 531 | * wait 5ms before any I2S clock is sent, or else the internal |
| 532 | * regulator apparently won't come on. |
| 533 | * |
| 534 | * Also, we must keep the device in power down for 100ms or so |
| 535 | * after PVDD is applied, or else the ADR pin is sampled |
| 536 | * incorrectly and the device comes up with an unpredictable I2C |
| 537 | * address. |
| 538 | */ |
| 539 | tas5805m->vol[0] = TAS5805M_VOLUME_MIN; |
| 540 | tas5805m->vol[1] = TAS5805M_VOLUME_MIN; |
| 541 | |
| 542 | ret = regulator_enable(regulator: tas5805m->pvdd); |
| 543 | if (ret < 0) { |
| 544 | dev_err(dev, "failed to enable pvdd: %d\n" , ret); |
| 545 | return ret; |
| 546 | } |
| 547 | |
| 548 | usleep_range(min: 100000, max: 150000); |
| 549 | gpiod_set_value(desc: tas5805m->gpio_pdn_n, value: 1); |
| 550 | usleep_range(min: 10000, max: 15000); |
| 551 | |
| 552 | INIT_WORK(&tas5805m->work, do_work); |
| 553 | mutex_init(&tas5805m->lock); |
| 554 | |
| 555 | /* Don't register through devm. We need to be able to unregister |
| 556 | * the component prior to deasserting PDN# |
| 557 | */ |
| 558 | ret = snd_soc_register_component(dev, component_driver: &soc_codec_dev_tas5805m, |
| 559 | dai_drv: &tas5805m_dai, num_dai: 1); |
| 560 | if (ret < 0) { |
| 561 | dev_err(dev, "unable to register codec: %d\n" , ret); |
| 562 | gpiod_set_value(desc: tas5805m->gpio_pdn_n, value: 0); |
| 563 | regulator_disable(regulator: tas5805m->pvdd); |
| 564 | return ret; |
| 565 | } |
| 566 | |
| 567 | return 0; |
| 568 | } |
| 569 | |
| 570 | static void tas5805m_i2c_remove(struct i2c_client *i2c) |
| 571 | { |
| 572 | struct device *dev = &i2c->dev; |
| 573 | struct tas5805m_priv *tas5805m = dev_get_drvdata(dev); |
| 574 | |
| 575 | cancel_work_sync(work: &tas5805m->work); |
| 576 | snd_soc_unregister_component(dev); |
| 577 | gpiod_set_value(desc: tas5805m->gpio_pdn_n, value: 0); |
| 578 | usleep_range(min: 10000, max: 15000); |
| 579 | regulator_disable(regulator: tas5805m->pvdd); |
| 580 | } |
| 581 | |
| 582 | static const struct i2c_device_id tas5805m_i2c_id[] = { |
| 583 | { "tas5805m" , }, |
| 584 | { } |
| 585 | }; |
| 586 | MODULE_DEVICE_TABLE(i2c, tas5805m_i2c_id); |
| 587 | |
| 588 | #if IS_ENABLED(CONFIG_OF) |
| 589 | static const struct of_device_id tas5805m_of_match[] = { |
| 590 | { .compatible = "ti,tas5805m" , }, |
| 591 | { } |
| 592 | }; |
| 593 | MODULE_DEVICE_TABLE(of, tas5805m_of_match); |
| 594 | #endif |
| 595 | |
| 596 | static struct i2c_driver tas5805m_i2c_driver = { |
| 597 | .probe = tas5805m_i2c_probe, |
| 598 | .remove = tas5805m_i2c_remove, |
| 599 | .id_table = tas5805m_i2c_id, |
| 600 | .driver = { |
| 601 | .name = "tas5805m" , |
| 602 | .of_match_table = of_match_ptr(tas5805m_of_match), |
| 603 | }, |
| 604 | }; |
| 605 | |
| 606 | module_i2c_driver(tas5805m_i2c_driver); |
| 607 | |
| 608 | MODULE_AUTHOR("Andy Liu <andy-liu@ti.com>" ); |
| 609 | MODULE_AUTHOR("Daniel Beer <daniel.beer@igorinstitute.com>" ); |
| 610 | MODULE_DESCRIPTION("TAS5805M Audio Amplifier Driver" ); |
| 611 | MODULE_LICENSE("GPL v2" ); |
| 612 | |