1//===--- AVR.cpp - Implement AVR target feature support -------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements AVR TargetInfo objects.
10//
11//===----------------------------------------------------------------------===//
12
13#include "AVR.h"
14#include "clang/Basic/MacroBuilder.h"
15#include "llvm/ADT/StringSwitch.h"
16
17using namespace clang;
18using namespace clang::targets;
19
20namespace clang {
21namespace targets {
22
23/// Information about a specific microcontroller.
24struct LLVM_LIBRARY_VISIBILITY MCUInfo {
25 const char *Name;
26 const char *DefineName;
27 StringRef Arch; // The __AVR_ARCH__ value.
28 const int NumFlashBanks; // Set to 0 for the devices do not support LPM/ELPM.
29};
30
31// NOTE: This list has been synchronized with gcc-avr 5.4.0 and avr-libc 2.0.0.
32static MCUInfo AVRMcus[] = {
33 {.Name: "avr1", NULL, .Arch: "1", .NumFlashBanks: 0},
34 {.Name: "at90s1200", .DefineName: "__AVR_AT90S1200__", .Arch: "1", .NumFlashBanks: 0},
35 {.Name: "attiny11", .DefineName: "__AVR_ATtiny11__", .Arch: "1", .NumFlashBanks: 0},
36 {.Name: "attiny12", .DefineName: "__AVR_ATtiny12__", .Arch: "1", .NumFlashBanks: 0},
37 {.Name: "attiny15", .DefineName: "__AVR_ATtiny15__", .Arch: "1", .NumFlashBanks: 0},
38 {.Name: "attiny28", .DefineName: "__AVR_ATtiny28__", .Arch: "1", .NumFlashBanks: 0},
39 {.Name: "avr2", NULL, .Arch: "2", .NumFlashBanks: 1},
40 {.Name: "at90s2313", .DefineName: "__AVR_AT90S2313__", .Arch: "2", .NumFlashBanks: 1},
41 {.Name: "at90s2323", .DefineName: "__AVR_AT90S2323__", .Arch: "2", .NumFlashBanks: 1},
42 {.Name: "at90s2333", .DefineName: "__AVR_AT90S2333__", .Arch: "2", .NumFlashBanks: 1},
43 {.Name: "at90s2343", .DefineName: "__AVR_AT90S2343__", .Arch: "2", .NumFlashBanks: 1},
44 {.Name: "attiny22", .DefineName: "__AVR_ATtiny22__", .Arch: "2", .NumFlashBanks: 1},
45 {.Name: "attiny26", .DefineName: "__AVR_ATtiny26__", .Arch: "2", .NumFlashBanks: 1},
46 {.Name: "at86rf401", .DefineName: "__AVR_AT86RF401__", .Arch: "25", .NumFlashBanks: 1},
47 {.Name: "at90s4414", .DefineName: "__AVR_AT90S4414__", .Arch: "2", .NumFlashBanks: 1},
48 {.Name: "at90s4433", .DefineName: "__AVR_AT90S4433__", .Arch: "2", .NumFlashBanks: 1},
49 {.Name: "at90s4434", .DefineName: "__AVR_AT90S4434__", .Arch: "2", .NumFlashBanks: 1},
50 {.Name: "at90s8515", .DefineName: "__AVR_AT90S8515__", .Arch: "2", .NumFlashBanks: 1},
51 {.Name: "at90c8534", .DefineName: "__AVR_AT90c8534__", .Arch: "2", .NumFlashBanks: 1},
52 {.Name: "at90s8535", .DefineName: "__AVR_AT90S8535__", .Arch: "2", .NumFlashBanks: 1},
53 {.Name: "avr25", NULL, .Arch: "25", .NumFlashBanks: 1},
54 {.Name: "ata5272", .DefineName: "__AVR_ATA5272__", .Arch: "25", .NumFlashBanks: 1},
55 {.Name: "ata6616c", .DefineName: "__AVR_ATA6616c__", .Arch: "25", .NumFlashBanks: 1},
56 {.Name: "attiny13", .DefineName: "__AVR_ATtiny13__", .Arch: "25", .NumFlashBanks: 1},
57 {.Name: "attiny13a", .DefineName: "__AVR_ATtiny13A__", .Arch: "25", .NumFlashBanks: 1},
58 {.Name: "attiny2313", .DefineName: "__AVR_ATtiny2313__", .Arch: "25", .NumFlashBanks: 1},
59 {.Name: "attiny2313a", .DefineName: "__AVR_ATtiny2313A__", .Arch: "25", .NumFlashBanks: 1},
60 {.Name: "attiny24", .DefineName: "__AVR_ATtiny24__", .Arch: "25", .NumFlashBanks: 1},
61 {.Name: "attiny24a", .DefineName: "__AVR_ATtiny24A__", .Arch: "25", .NumFlashBanks: 1},
62 {.Name: "attiny4313", .DefineName: "__AVR_ATtiny4313__", .Arch: "25", .NumFlashBanks: 1},
63 {.Name: "attiny44", .DefineName: "__AVR_ATtiny44__", .Arch: "25", .NumFlashBanks: 1},
64 {.Name: "attiny44a", .DefineName: "__AVR_ATtiny44A__", .Arch: "25", .NumFlashBanks: 1},
65 {.Name: "attiny84", .DefineName: "__AVR_ATtiny84__", .Arch: "25", .NumFlashBanks: 1},
66 {.Name: "attiny84a", .DefineName: "__AVR_ATtiny84A__", .Arch: "25", .NumFlashBanks: 1},
67 {.Name: "attiny25", .DefineName: "__AVR_ATtiny25__", .Arch: "25", .NumFlashBanks: 1},
68 {.Name: "attiny45", .DefineName: "__AVR_ATtiny45__", .Arch: "25", .NumFlashBanks: 1},
69 {.Name: "attiny85", .DefineName: "__AVR_ATtiny85__", .Arch: "25", .NumFlashBanks: 1},
70 {.Name: "attiny261", .DefineName: "__AVR_ATtiny261__", .Arch: "25", .NumFlashBanks: 1},
71 {.Name: "attiny261a", .DefineName: "__AVR_ATtiny261A__", .Arch: "25", .NumFlashBanks: 1},
72 {.Name: "attiny441", .DefineName: "__AVR_ATtiny441__", .Arch: "25", .NumFlashBanks: 1},
73 {.Name: "attiny461", .DefineName: "__AVR_ATtiny461__", .Arch: "25", .NumFlashBanks: 1},
74 {.Name: "attiny461a", .DefineName: "__AVR_ATtiny461A__", .Arch: "25", .NumFlashBanks: 1},
75 {.Name: "attiny841", .DefineName: "__AVR_ATtiny841__", .Arch: "25", .NumFlashBanks: 1},
76 {.Name: "attiny861", .DefineName: "__AVR_ATtiny861__", .Arch: "25", .NumFlashBanks: 1},
77 {.Name: "attiny861a", .DefineName: "__AVR_ATtiny861A__", .Arch: "25", .NumFlashBanks: 1},
78 {.Name: "attiny87", .DefineName: "__AVR_ATtiny87__", .Arch: "25", .NumFlashBanks: 1},
79 {.Name: "attiny43u", .DefineName: "__AVR_ATtiny43U__", .Arch: "25", .NumFlashBanks: 1},
80 {.Name: "attiny48", .DefineName: "__AVR_ATtiny48__", .Arch: "25", .NumFlashBanks: 1},
81 {.Name: "attiny88", .DefineName: "__AVR_ATtiny88__", .Arch: "25", .NumFlashBanks: 1},
82 {.Name: "attiny828", .DefineName: "__AVR_ATtiny828__", .Arch: "25", .NumFlashBanks: 1},
83 {.Name: "avr3", NULL, .Arch: "3", .NumFlashBanks: 1},
84 {.Name: "at43usb355", .DefineName: "__AVR_AT43USB355__", .Arch: "3", .NumFlashBanks: 1},
85 {.Name: "at76c711", .DefineName: "__AVR_AT76C711__", .Arch: "3", .NumFlashBanks: 1},
86 {.Name: "avr31", NULL, .Arch: "31", .NumFlashBanks: 1},
87 {.Name: "atmega103", .DefineName: "__AVR_ATmega103__", .Arch: "31", .NumFlashBanks: 1},
88 {.Name: "at43usb320", .DefineName: "__AVR_AT43USB320__", .Arch: "31", .NumFlashBanks: 1},
89 {.Name: "avr35", NULL, .Arch: "35", .NumFlashBanks: 1},
90 {.Name: "attiny167", .DefineName: "__AVR_ATtiny167__", .Arch: "35", .NumFlashBanks: 1},
91 {.Name: "at90usb82", .DefineName: "__AVR_AT90USB82__", .Arch: "35", .NumFlashBanks: 1},
92 {.Name: "at90usb162", .DefineName: "__AVR_AT90USB162__", .Arch: "35", .NumFlashBanks: 1},
93 {.Name: "ata5505", .DefineName: "__AVR_ATA5505__", .Arch: "35", .NumFlashBanks: 1},
94 {.Name: "ata6617c", .DefineName: "__AVR_ATA6617C__", .Arch: "35", .NumFlashBanks: 1},
95 {.Name: "ata664251", .DefineName: "__AVR_ATA664251__", .Arch: "35", .NumFlashBanks: 1},
96 {.Name: "atmega8u2", .DefineName: "__AVR_ATmega8U2__", .Arch: "35", .NumFlashBanks: 1},
97 {.Name: "atmega16u2", .DefineName: "__AVR_ATmega16U2__", .Arch: "35", .NumFlashBanks: 1},
98 {.Name: "atmega32u2", .DefineName: "__AVR_ATmega32U2__", .Arch: "35", .NumFlashBanks: 1},
99 {.Name: "attiny1634", .DefineName: "__AVR_ATtiny1634__", .Arch: "35", .NumFlashBanks: 1},
100 {.Name: "avr4", NULL, .Arch: "4", .NumFlashBanks: 1},
101 {.Name: "atmega8", .DefineName: "__AVR_ATmega8__", .Arch: "4", .NumFlashBanks: 1},
102 {.Name: "ata6289", .DefineName: "__AVR_ATA6289__", .Arch: "4", .NumFlashBanks: 1},
103 {.Name: "atmega8a", .DefineName: "__AVR_ATmega8A__", .Arch: "4", .NumFlashBanks: 1},
104 {.Name: "ata6285", .DefineName: "__AVR_ATA6285__", .Arch: "4", .NumFlashBanks: 1},
105 {.Name: "ata6286", .DefineName: "__AVR_ATA6286__", .Arch: "4", .NumFlashBanks: 1},
106 {.Name: "ata6612c", .DefineName: "__AVR_ATA6612C__", .Arch: "4", .NumFlashBanks: 1},
107 {.Name: "atmega48", .DefineName: "__AVR_ATmega48__", .Arch: "4", .NumFlashBanks: 1},
108 {.Name: "atmega48a", .DefineName: "__AVR_ATmega48A__", .Arch: "4", .NumFlashBanks: 1},
109 {.Name: "atmega48pa", .DefineName: "__AVR_ATmega48PA__", .Arch: "4", .NumFlashBanks: 1},
110 {.Name: "atmega48pb", .DefineName: "__AVR_ATmega48PB__", .Arch: "4", .NumFlashBanks: 1},
111 {.Name: "atmega48p", .DefineName: "__AVR_ATmega48P__", .Arch: "4", .NumFlashBanks: 1},
112 {.Name: "atmega88", .DefineName: "__AVR_ATmega88__", .Arch: "4", .NumFlashBanks: 1},
113 {.Name: "atmega88a", .DefineName: "__AVR_ATmega88A__", .Arch: "4", .NumFlashBanks: 1},
114 {.Name: "atmega88p", .DefineName: "__AVR_ATmega88P__", .Arch: "4", .NumFlashBanks: 1},
115 {.Name: "atmega88pa", .DefineName: "__AVR_ATmega88PA__", .Arch: "4", .NumFlashBanks: 1},
116 {.Name: "atmega88pb", .DefineName: "__AVR_ATmega88PB__", .Arch: "4", .NumFlashBanks: 1},
117 {.Name: "atmega8515", .DefineName: "__AVR_ATmega8515__", .Arch: "4", .NumFlashBanks: 1},
118 {.Name: "atmega8535", .DefineName: "__AVR_ATmega8535__", .Arch: "4", .NumFlashBanks: 1},
119 {.Name: "atmega8hva", .DefineName: "__AVR_ATmega8HVA__", .Arch: "4", .NumFlashBanks: 1},
120 {.Name: "at90pwm1", .DefineName: "__AVR_AT90PWM1__", .Arch: "4", .NumFlashBanks: 1},
121 {.Name: "at90pwm2", .DefineName: "__AVR_AT90PWM2__", .Arch: "4", .NumFlashBanks: 1},
122 {.Name: "at90pwm2b", .DefineName: "__AVR_AT90PWM2B__", .Arch: "4", .NumFlashBanks: 1},
123 {.Name: "at90pwm3", .DefineName: "__AVR_AT90PWM3__", .Arch: "4", .NumFlashBanks: 1},
124 {.Name: "at90pwm3b", .DefineName: "__AVR_AT90PWM3B__", .Arch: "4", .NumFlashBanks: 1},
125 {.Name: "at90pwm81", .DefineName: "__AVR_AT90PWM81__", .Arch: "4", .NumFlashBanks: 1},
126 {.Name: "avr5", NULL, .Arch: "5", .NumFlashBanks: 1},
127 {.Name: "ata5702m322", .DefineName: "__AVR_ATA5702M322__", .Arch: "5", .NumFlashBanks: 1},
128 {.Name: "ata5782", .DefineName: "__AVR_ATA5782__", .Arch: "5", .NumFlashBanks: 1},
129 {.Name: "ata5790", .DefineName: "__AVR_ATA5790__", .Arch: "5", .NumFlashBanks: 1},
130 {.Name: "ata5790n", .DefineName: "__AVR_ATA5790N__", .Arch: "5", .NumFlashBanks: 1},
131 {.Name: "ata5791", .DefineName: "__AVR_ATA5791__", .Arch: "5", .NumFlashBanks: 1},
132 {.Name: "ata5795", .DefineName: "__AVR_ATA5795__", .Arch: "5", .NumFlashBanks: 1},
133 {.Name: "ata5831", .DefineName: "__AVR_ATA5831__", .Arch: "5", .NumFlashBanks: 1},
134 {.Name: "ata6613c", .DefineName: "__AVR_ATA6613C__", .Arch: "5", .NumFlashBanks: 1},
135 {.Name: "ata6614q", .DefineName: "__AVR_ATA6614Q__", .Arch: "5", .NumFlashBanks: 1},
136 {.Name: "ata8210", .DefineName: "__AVR_ATA8210__", .Arch: "5", .NumFlashBanks: 1},
137 {.Name: "ata8510", .DefineName: "__AVR_ATA8510__", .Arch: "5", .NumFlashBanks: 1},
138 {.Name: "atmega16", .DefineName: "__AVR_ATmega16__", .Arch: "5", .NumFlashBanks: 1},
139 {.Name: "atmega16a", .DefineName: "__AVR_ATmega16A__", .Arch: "5", .NumFlashBanks: 1},
140 {.Name: "atmega161", .DefineName: "__AVR_ATmega161__", .Arch: "5", .NumFlashBanks: 1},
141 {.Name: "atmega162", .DefineName: "__AVR_ATmega162__", .Arch: "5", .NumFlashBanks: 1},
142 {.Name: "atmega163", .DefineName: "__AVR_ATmega163__", .Arch: "5", .NumFlashBanks: 1},
143 {.Name: "atmega164a", .DefineName: "__AVR_ATmega164A__", .Arch: "5", .NumFlashBanks: 1},
144 {.Name: "atmega164p", .DefineName: "__AVR_ATmega164P__", .Arch: "5", .NumFlashBanks: 1},
145 {.Name: "atmega164pa", .DefineName: "__AVR_ATmega164PA__", .Arch: "5", .NumFlashBanks: 1},
146 {.Name: "atmega165", .DefineName: "__AVR_ATmega165__", .Arch: "5", .NumFlashBanks: 1},
147 {.Name: "atmega165a", .DefineName: "__AVR_ATmega165A__", .Arch: "5", .NumFlashBanks: 1},
148 {.Name: "atmega165p", .DefineName: "__AVR_ATmega165P__", .Arch: "5", .NumFlashBanks: 1},
149 {.Name: "atmega165pa", .DefineName: "__AVR_ATmega165PA__", .Arch: "5", .NumFlashBanks: 1},
150 {.Name: "atmega168", .DefineName: "__AVR_ATmega168__", .Arch: "5", .NumFlashBanks: 1},
151 {.Name: "atmega168a", .DefineName: "__AVR_ATmega168A__", .Arch: "5", .NumFlashBanks: 1},
152 {.Name: "atmega168p", .DefineName: "__AVR_ATmega168P__", .Arch: "5", .NumFlashBanks: 1},
153 {.Name: "atmega168pa", .DefineName: "__AVR_ATmega168PA__", .Arch: "5", .NumFlashBanks: 1},
154 {.Name: "atmega168pb", .DefineName: "__AVR_ATmega168PB__", .Arch: "5", .NumFlashBanks: 1},
155 {.Name: "atmega169", .DefineName: "__AVR_ATmega169__", .Arch: "5", .NumFlashBanks: 1},
156 {.Name: "atmega169a", .DefineName: "__AVR_ATmega169A__", .Arch: "5", .NumFlashBanks: 1},
157 {.Name: "atmega169p", .DefineName: "__AVR_ATmega169P__", .Arch: "5", .NumFlashBanks: 1},
158 {.Name: "atmega169pa", .DefineName: "__AVR_ATmega169PA__", .Arch: "5", .NumFlashBanks: 1},
159 {.Name: "atmega32", .DefineName: "__AVR_ATmega32__", .Arch: "5", .NumFlashBanks: 1},
160 {.Name: "atmega32a", .DefineName: "__AVR_ATmega32A__", .Arch: "5", .NumFlashBanks: 1},
161 {.Name: "atmega323", .DefineName: "__AVR_ATmega323__", .Arch: "5", .NumFlashBanks: 1},
162 {.Name: "atmega324a", .DefineName: "__AVR_ATmega324A__", .Arch: "5", .NumFlashBanks: 1},
163 {.Name: "atmega324p", .DefineName: "__AVR_ATmega324P__", .Arch: "5", .NumFlashBanks: 1},
164 {.Name: "atmega324pa", .DefineName: "__AVR_ATmega324PA__", .Arch: "5", .NumFlashBanks: 1},
165 {.Name: "atmega324pb", .DefineName: "__AVR_ATmega324PB__", .Arch: "5", .NumFlashBanks: 1},
166 {.Name: "atmega325", .DefineName: "__AVR_ATmega325__", .Arch: "5", .NumFlashBanks: 1},
167 {.Name: "atmega325a", .DefineName: "__AVR_ATmega325A__", .Arch: "5", .NumFlashBanks: 1},
168 {.Name: "atmega325p", .DefineName: "__AVR_ATmega325P__", .Arch: "5", .NumFlashBanks: 1},
169 {.Name: "atmega325pa", .DefineName: "__AVR_ATmega325PA__", .Arch: "5", .NumFlashBanks: 1},
170 {.Name: "atmega3250", .DefineName: "__AVR_ATmega3250__", .Arch: "5", .NumFlashBanks: 1},
171 {.Name: "atmega3250a", .DefineName: "__AVR_ATmega3250A__", .Arch: "5", .NumFlashBanks: 1},
172 {.Name: "atmega3250p", .DefineName: "__AVR_ATmega3250P__", .Arch: "5", .NumFlashBanks: 1},
173 {.Name: "atmega3250pa", .DefineName: "__AVR_ATmega3250PA__", .Arch: "5", .NumFlashBanks: 1},
174 {.Name: "atmega328", .DefineName: "__AVR_ATmega328__", .Arch: "5", .NumFlashBanks: 1},
175 {.Name: "atmega328p", .DefineName: "__AVR_ATmega328P__", .Arch: "5", .NumFlashBanks: 1},
176 {.Name: "atmega328pb", .DefineName: "__AVR_ATmega328PB__", .Arch: "5", .NumFlashBanks: 1},
177 {.Name: "atmega329", .DefineName: "__AVR_ATmega329__", .Arch: "5", .NumFlashBanks: 1},
178 {.Name: "atmega329a", .DefineName: "__AVR_ATmega329A__", .Arch: "5", .NumFlashBanks: 1},
179 {.Name: "atmega329p", .DefineName: "__AVR_ATmega329P__", .Arch: "5", .NumFlashBanks: 1},
180 {.Name: "atmega329pa", .DefineName: "__AVR_ATmega329PA__", .Arch: "5", .NumFlashBanks: 1},
181 {.Name: "atmega3290", .DefineName: "__AVR_ATmega3290__", .Arch: "5", .NumFlashBanks: 1},
182 {.Name: "atmega3290a", .DefineName: "__AVR_ATmega3290A__", .Arch: "5", .NumFlashBanks: 1},
183 {.Name: "atmega3290p", .DefineName: "__AVR_ATmega3290P__", .Arch: "5", .NumFlashBanks: 1},
184 {.Name: "atmega3290pa", .DefineName: "__AVR_ATmega3290PA__", .Arch: "5", .NumFlashBanks: 1},
185 {.Name: "atmega406", .DefineName: "__AVR_ATmega406__", .Arch: "5", .NumFlashBanks: 1},
186 {.Name: "atmega64", .DefineName: "__AVR_ATmega64__", .Arch: "5", .NumFlashBanks: 1},
187 {.Name: "atmega64a", .DefineName: "__AVR_ATmega64A__", .Arch: "5", .NumFlashBanks: 1},
188 {.Name: "atmega640", .DefineName: "__AVR_ATmega640__", .Arch: "5", .NumFlashBanks: 1},
189 {.Name: "atmega644", .DefineName: "__AVR_ATmega644__", .Arch: "5", .NumFlashBanks: 1},
190 {.Name: "atmega644a", .DefineName: "__AVR_ATmega644A__", .Arch: "5", .NumFlashBanks: 1},
191 {.Name: "atmega644p", .DefineName: "__AVR_ATmega644P__", .Arch: "5", .NumFlashBanks: 1},
192 {.Name: "atmega644pa", .DefineName: "__AVR_ATmega644PA__", .Arch: "5", .NumFlashBanks: 1},
193 {.Name: "atmega645", .DefineName: "__AVR_ATmega645__", .Arch: "5", .NumFlashBanks: 1},
194 {.Name: "atmega645a", .DefineName: "__AVR_ATmega645A__", .Arch: "5", .NumFlashBanks: 1},
195 {.Name: "atmega645p", .DefineName: "__AVR_ATmega645P__", .Arch: "5", .NumFlashBanks: 1},
196 {.Name: "atmega649", .DefineName: "__AVR_ATmega649__", .Arch: "5", .NumFlashBanks: 1},
197 {.Name: "atmega649a", .DefineName: "__AVR_ATmega649A__", .Arch: "5", .NumFlashBanks: 1},
198 {.Name: "atmega649p", .DefineName: "__AVR_ATmega649P__", .Arch: "5", .NumFlashBanks: 1},
199 {.Name: "atmega6450", .DefineName: "__AVR_ATmega6450__", .Arch: "5", .NumFlashBanks: 1},
200 {.Name: "atmega6450a", .DefineName: "__AVR_ATmega6450A__", .Arch: "5", .NumFlashBanks: 1},
201 {.Name: "atmega6450p", .DefineName: "__AVR_ATmega6450P__", .Arch: "5", .NumFlashBanks: 1},
202 {.Name: "atmega6490", .DefineName: "__AVR_ATmega6490__", .Arch: "5", .NumFlashBanks: 1},
203 {.Name: "atmega6490a", .DefineName: "__AVR_ATmega6490A__", .Arch: "5", .NumFlashBanks: 1},
204 {.Name: "atmega6490p", .DefineName: "__AVR_ATmega6490P__", .Arch: "5", .NumFlashBanks: 1},
205 {.Name: "atmega64rfr2", .DefineName: "__AVR_ATmega64RFR2__", .Arch: "5", .NumFlashBanks: 1},
206 {.Name: "atmega644rfr2", .DefineName: "__AVR_ATmega644RFR2__", .Arch: "5", .NumFlashBanks: 1},
207 {.Name: "atmega16hva", .DefineName: "__AVR_ATmega16HVA__", .Arch: "5", .NumFlashBanks: 1},
208 {.Name: "atmega16hva2", .DefineName: "__AVR_ATmega16HVA2__", .Arch: "5", .NumFlashBanks: 1},
209 {.Name: "atmega16hvb", .DefineName: "__AVR_ATmega16HVB__", .Arch: "5", .NumFlashBanks: 1},
210 {.Name: "atmega16hvbrevb", .DefineName: "__AVR_ATmega16HVBREVB__", .Arch: "5", .NumFlashBanks: 1},
211 {.Name: "atmega32hvb", .DefineName: "__AVR_ATmega32HVB__", .Arch: "5", .NumFlashBanks: 1},
212 {.Name: "atmega32hvbrevb", .DefineName: "__AVR_ATmega32HVBREVB__", .Arch: "5", .NumFlashBanks: 1},
213 {.Name: "atmega64hve", .DefineName: "__AVR_ATmega64HVE__", .Arch: "5", .NumFlashBanks: 1},
214 {.Name: "atmega64hve2", .DefineName: "__AVR_ATmega64HVE2__", .Arch: "5", .NumFlashBanks: 1},
215 {.Name: "at90can32", .DefineName: "__AVR_AT90CAN32__", .Arch: "5", .NumFlashBanks: 1},
216 {.Name: "at90can64", .DefineName: "__AVR_AT90CAN64__", .Arch: "5", .NumFlashBanks: 1},
217 {.Name: "at90pwm161", .DefineName: "__AVR_AT90PWM161__", .Arch: "5", .NumFlashBanks: 1},
218 {.Name: "at90pwm216", .DefineName: "__AVR_AT90PWM216__", .Arch: "5", .NumFlashBanks: 1},
219 {.Name: "at90pwm316", .DefineName: "__AVR_AT90PWM316__", .Arch: "5", .NumFlashBanks: 1},
220 {.Name: "atmega32c1", .DefineName: "__AVR_ATmega32C1__", .Arch: "5", .NumFlashBanks: 1},
221 {.Name: "atmega64c1", .DefineName: "__AVR_ATmega64C1__", .Arch: "5", .NumFlashBanks: 1},
222 {.Name: "atmega16m1", .DefineName: "__AVR_ATmega16M1__", .Arch: "5", .NumFlashBanks: 1},
223 {.Name: "atmega32m1", .DefineName: "__AVR_ATmega32M1__", .Arch: "5", .NumFlashBanks: 1},
224 {.Name: "atmega64m1", .DefineName: "__AVR_ATmega64M1__", .Arch: "5", .NumFlashBanks: 1},
225 {.Name: "atmega16u4", .DefineName: "__AVR_ATmega16U4__", .Arch: "5", .NumFlashBanks: 1},
226 {.Name: "atmega32u4", .DefineName: "__AVR_ATmega32U4__", .Arch: "5", .NumFlashBanks: 1},
227 {.Name: "atmega32u6", .DefineName: "__AVR_ATmega32U6__", .Arch: "5", .NumFlashBanks: 1},
228 {.Name: "at90usb646", .DefineName: "__AVR_AT90USB646__", .Arch: "5", .NumFlashBanks: 1},
229 {.Name: "at90usb647", .DefineName: "__AVR_AT90USB647__", .Arch: "5", .NumFlashBanks: 1},
230 {.Name: "at90scr100", .DefineName: "__AVR_AT90SCR100__", .Arch: "5", .NumFlashBanks: 1},
231 {.Name: "at94k", .DefineName: "__AVR_AT94K__", .Arch: "5", .NumFlashBanks: 1},
232 {.Name: "m3000", .DefineName: "__AVR_AT000__", .Arch: "5", .NumFlashBanks: 1},
233 {.Name: "avr51", NULL, .Arch: "51", .NumFlashBanks: 2},
234 {.Name: "atmega128", .DefineName: "__AVR_ATmega128__", .Arch: "51", .NumFlashBanks: 2},
235 {.Name: "atmega128a", .DefineName: "__AVR_ATmega128A__", .Arch: "51", .NumFlashBanks: 2},
236 {.Name: "atmega1280", .DefineName: "__AVR_ATmega1280__", .Arch: "51", .NumFlashBanks: 2},
237 {.Name: "atmega1281", .DefineName: "__AVR_ATmega1281__", .Arch: "51", .NumFlashBanks: 2},
238 {.Name: "atmega1284", .DefineName: "__AVR_ATmega1284__", .Arch: "51", .NumFlashBanks: 2},
239 {.Name: "atmega1284p", .DefineName: "__AVR_ATmega1284P__", .Arch: "51", .NumFlashBanks: 2},
240 {.Name: "atmega128rfa1", .DefineName: "__AVR_ATmega128RFA1__", .Arch: "51", .NumFlashBanks: 2},
241 {.Name: "atmega128rfr2", .DefineName: "__AVR_ATmega128RFR2__", .Arch: "51", .NumFlashBanks: 2},
242 {.Name: "atmega1284rfr2", .DefineName: "__AVR_ATmega1284RFR2__", .Arch: "51", .NumFlashBanks: 2},
243 {.Name: "at90can128", .DefineName: "__AVR_AT90CAN128__", .Arch: "51", .NumFlashBanks: 2},
244 {.Name: "at90usb1286", .DefineName: "__AVR_AT90USB1286__", .Arch: "51", .NumFlashBanks: 2},
245 {.Name: "at90usb1287", .DefineName: "__AVR_AT90USB1287__", .Arch: "51", .NumFlashBanks: 2},
246 {.Name: "avr6", NULL, .Arch: "6", .NumFlashBanks: 4},
247 {.Name: "atmega2560", .DefineName: "__AVR_ATmega2560__", .Arch: "6", .NumFlashBanks: 4},
248 {.Name: "atmega2561", .DefineName: "__AVR_ATmega2561__", .Arch: "6", .NumFlashBanks: 4},
249 {.Name: "atmega256rfr2", .DefineName: "__AVR_ATmega256RFR2__", .Arch: "6", .NumFlashBanks: 4},
250 {.Name: "atmega2564rfr2", .DefineName: "__AVR_ATmega2564RFR2__", .Arch: "6", .NumFlashBanks: 4},
251 {.Name: "avrxmega2", NULL, .Arch: "102", .NumFlashBanks: 1},
252 {.Name: "atxmega16a4", .DefineName: "__AVR_ATxmega16A4__", .Arch: "102", .NumFlashBanks: 1},
253 {.Name: "atxmega16a4u", .DefineName: "__AVR_ATxmega16A4U__", .Arch: "102", .NumFlashBanks: 1},
254 {.Name: "atxmega16c4", .DefineName: "__AVR_ATxmega16C4__", .Arch: "102", .NumFlashBanks: 1},
255 {.Name: "atxmega16d4", .DefineName: "__AVR_ATxmega16D4__", .Arch: "102", .NumFlashBanks: 1},
256 {.Name: "atxmega32a4", .DefineName: "__AVR_ATxmega32A4__", .Arch: "102", .NumFlashBanks: 1},
257 {.Name: "atxmega32a4u", .DefineName: "__AVR_ATxmega32A4U__", .Arch: "102", .NumFlashBanks: 1},
258 {.Name: "atxmega32c3", .DefineName: "__AVR_ATxmega32C3__", .Arch: "102", .NumFlashBanks: 1},
259 {.Name: "atxmega32c4", .DefineName: "__AVR_ATxmega32C4__", .Arch: "102", .NumFlashBanks: 1},
260 {.Name: "atxmega32d3", .DefineName: "__AVR_ATxmega32D3__", .Arch: "102", .NumFlashBanks: 1},
261 {.Name: "atxmega32d4", .DefineName: "__AVR_ATxmega32D4__", .Arch: "102", .NumFlashBanks: 1},
262 {.Name: "atxmega32e5", .DefineName: "__AVR_ATxmega32E5__", .Arch: "102", .NumFlashBanks: 1},
263 {.Name: "atxmega16e5", .DefineName: "__AVR_ATxmega16E5__", .Arch: "102", .NumFlashBanks: 1},
264 {.Name: "atxmega8e5", .DefineName: "__AVR_ATxmega8E5__", .Arch: "102", .NumFlashBanks: 1},
265 {.Name: "avrxmega4", NULL, .Arch: "104", .NumFlashBanks: 1},
266 {.Name: "atxmega64a3", .DefineName: "__AVR_ATxmega64A3__", .Arch: "104", .NumFlashBanks: 1},
267 {.Name: "atxmega64a3u", .DefineName: "__AVR_ATxmega64A3U__", .Arch: "104", .NumFlashBanks: 1},
268 {.Name: "atxmega64a4u", .DefineName: "__AVR_ATxmega64A4U__", .Arch: "104", .NumFlashBanks: 1},
269 {.Name: "atxmega64b1", .DefineName: "__AVR_ATxmega64B1__", .Arch: "104", .NumFlashBanks: 1},
270 {.Name: "atxmega64b3", .DefineName: "__AVR_ATxmega64B3__", .Arch: "104", .NumFlashBanks: 1},
271 {.Name: "atxmega64c3", .DefineName: "__AVR_ATxmega64C3__", .Arch: "104", .NumFlashBanks: 1},
272 {.Name: "atxmega64d3", .DefineName: "__AVR_ATxmega64D3__", .Arch: "104", .NumFlashBanks: 1},
273 {.Name: "atxmega64d4", .DefineName: "__AVR_ATxmega64D4__", .Arch: "104", .NumFlashBanks: 1},
274 {.Name: "avrxmega5", NULL, .Arch: "105", .NumFlashBanks: 1},
275 {.Name: "atxmega64a1", .DefineName: "__AVR_ATxmega64A1__", .Arch: "105", .NumFlashBanks: 1},
276 {.Name: "atxmega64a1u", .DefineName: "__AVR_ATxmega64A1U__", .Arch: "105", .NumFlashBanks: 1},
277 {.Name: "avrxmega6", NULL, .Arch: "106", .NumFlashBanks: 6},
278 {.Name: "atxmega128a3", .DefineName: "__AVR_ATxmega128A3__", .Arch: "106", .NumFlashBanks: 2},
279 {.Name: "atxmega128a3u", .DefineName: "__AVR_ATxmega128A3U__", .Arch: "106", .NumFlashBanks: 2},
280 {.Name: "atxmega128b1", .DefineName: "__AVR_ATxmega128B1__", .Arch: "106", .NumFlashBanks: 2},
281 {.Name: "atxmega128b3", .DefineName: "__AVR_ATxmega128B3__", .Arch: "106", .NumFlashBanks: 2},
282 {.Name: "atxmega128c3", .DefineName: "__AVR_ATxmega128C3__", .Arch: "106", .NumFlashBanks: 2},
283 {.Name: "atxmega128d3", .DefineName: "__AVR_ATxmega128D3__", .Arch: "106", .NumFlashBanks: 2},
284 {.Name: "atxmega128d4", .DefineName: "__AVR_ATxmega128D4__", .Arch: "106", .NumFlashBanks: 2},
285 {.Name: "atxmega192a3", .DefineName: "__AVR_ATxmega192A3__", .Arch: "106", .NumFlashBanks: 3},
286 {.Name: "atxmega192a3u", .DefineName: "__AVR_ATxmega192A3U__", .Arch: "106", .NumFlashBanks: 3},
287 {.Name: "atxmega192c3", .DefineName: "__AVR_ATxmega192C3__", .Arch: "106", .NumFlashBanks: 3},
288 {.Name: "atxmega192d3", .DefineName: "__AVR_ATxmega192D3__", .Arch: "106", .NumFlashBanks: 3},
289 {.Name: "atxmega256a3", .DefineName: "__AVR_ATxmega256A3__", .Arch: "106", .NumFlashBanks: 4},
290 {.Name: "atxmega256a3u", .DefineName: "__AVR_ATxmega256A3U__", .Arch: "106", .NumFlashBanks: 4},
291 {.Name: "atxmega256a3b", .DefineName: "__AVR_ATxmega256A3B__", .Arch: "106", .NumFlashBanks: 4},
292 {.Name: "atxmega256a3bu", .DefineName: "__AVR_ATxmega256A3BU__", .Arch: "106", .NumFlashBanks: 4},
293 {.Name: "atxmega256c3", .DefineName: "__AVR_ATxmega256C3__", .Arch: "106", .NumFlashBanks: 4},
294 {.Name: "atxmega256d3", .DefineName: "__AVR_ATxmega256D3__", .Arch: "106", .NumFlashBanks: 4},
295 {.Name: "atxmega384c3", .DefineName: "__AVR_ATxmega384C3__", .Arch: "106", .NumFlashBanks: 6},
296 {.Name: "atxmega384d3", .DefineName: "__AVR_ATxmega384D3__", .Arch: "106", .NumFlashBanks: 6},
297 {.Name: "avrxmega7", NULL, .Arch: "107", .NumFlashBanks: 2},
298 {.Name: "atxmega128a1", .DefineName: "__AVR_ATxmega128A1__", .Arch: "107", .NumFlashBanks: 2},
299 {.Name: "atxmega128a1u", .DefineName: "__AVR_ATxmega128A1U__", .Arch: "107", .NumFlashBanks: 2},
300 {.Name: "atxmega128a4u", .DefineName: "__AVR_ATxmega128A4U__", .Arch: "107", .NumFlashBanks: 2},
301 {.Name: "avrtiny", NULL, .Arch: "100", .NumFlashBanks: 0},
302 {.Name: "attiny4", .DefineName: "__AVR_ATtiny4__", .Arch: "100", .NumFlashBanks: 0},
303 {.Name: "attiny5", .DefineName: "__AVR_ATtiny5__", .Arch: "100", .NumFlashBanks: 0},
304 {.Name: "attiny9", .DefineName: "__AVR_ATtiny9__", .Arch: "100", .NumFlashBanks: 0},
305 {.Name: "attiny10", .DefineName: "__AVR_ATtiny10__", .Arch: "100", .NumFlashBanks: 0},
306 {.Name: "attiny20", .DefineName: "__AVR_ATtiny20__", .Arch: "100", .NumFlashBanks: 0},
307 {.Name: "attiny40", .DefineName: "__AVR_ATtiny40__", .Arch: "100", .NumFlashBanks: 0},
308 {.Name: "attiny102", .DefineName: "__AVR_ATtiny102__", .Arch: "100", .NumFlashBanks: 0},
309 {.Name: "attiny104", .DefineName: "__AVR_ATtiny104__", .Arch: "100", .NumFlashBanks: 0},
310 {.Name: "avrxmega3", NULL, .Arch: "103", .NumFlashBanks: 1},
311 {.Name: "attiny202", .DefineName: "__AVR_ATtiny202__", .Arch: "103", .NumFlashBanks: 1},
312 {.Name: "attiny402", .DefineName: "__AVR_ATtiny402__", .Arch: "103", .NumFlashBanks: 1},
313 {.Name: "attiny204", .DefineName: "__AVR_ATtiny204__", .Arch: "103", .NumFlashBanks: 1},
314 {.Name: "attiny404", .DefineName: "__AVR_ATtiny404__", .Arch: "103", .NumFlashBanks: 1},
315 {.Name: "attiny804", .DefineName: "__AVR_ATtiny804__", .Arch: "103", .NumFlashBanks: 1},
316 {.Name: "attiny1604", .DefineName: "__AVR_ATtiny1604__", .Arch: "103", .NumFlashBanks: 1},
317 {.Name: "attiny406", .DefineName: "__AVR_ATtiny406__", .Arch: "103", .NumFlashBanks: 1},
318 {.Name: "attiny806", .DefineName: "__AVR_ATtiny806__", .Arch: "103", .NumFlashBanks: 1},
319 {.Name: "attiny1606", .DefineName: "__AVR_ATtiny1606__", .Arch: "103", .NumFlashBanks: 1},
320 {.Name: "attiny807", .DefineName: "__AVR_ATtiny807__", .Arch: "103", .NumFlashBanks: 1},
321 {.Name: "attiny1607", .DefineName: "__AVR_ATtiny1607__", .Arch: "103", .NumFlashBanks: 1},
322 {.Name: "attiny212", .DefineName: "__AVR_ATtiny212__", .Arch: "103", .NumFlashBanks: 1},
323 {.Name: "attiny412", .DefineName: "__AVR_ATtiny412__", .Arch: "103", .NumFlashBanks: 1},
324 {.Name: "attiny214", .DefineName: "__AVR_ATtiny214__", .Arch: "103", .NumFlashBanks: 1},
325 {.Name: "attiny414", .DefineName: "__AVR_ATtiny414__", .Arch: "103", .NumFlashBanks: 1},
326 {.Name: "attiny814", .DefineName: "__AVR_ATtiny814__", .Arch: "103", .NumFlashBanks: 1},
327 {.Name: "attiny1614", .DefineName: "__AVR_ATtiny1614__", .Arch: "103", .NumFlashBanks: 1},
328 {.Name: "attiny416", .DefineName: "__AVR_ATtiny416__", .Arch: "103", .NumFlashBanks: 1},
329 {.Name: "attiny816", .DefineName: "__AVR_ATtiny816__", .Arch: "103", .NumFlashBanks: 1},
330 {.Name: "attiny1616", .DefineName: "__AVR_ATtiny1616__", .Arch: "103", .NumFlashBanks: 1},
331 {.Name: "attiny3216", .DefineName: "__AVR_ATtiny3216__", .Arch: "103", .NumFlashBanks: 1},
332 {.Name: "attiny417", .DefineName: "__AVR_ATtiny417__", .Arch: "103", .NumFlashBanks: 1},
333 {.Name: "attiny817", .DefineName: "__AVR_ATtiny817__", .Arch: "103", .NumFlashBanks: 1},
334 {.Name: "attiny1617", .DefineName: "__AVR_ATtiny1617__", .Arch: "103", .NumFlashBanks: 1},
335 {.Name: "attiny3217", .DefineName: "__AVR_ATtiny3217__", .Arch: "103", .NumFlashBanks: 1},
336 {.Name: "attiny1624", .DefineName: "__AVR_ATtiny1624__", .Arch: "103", .NumFlashBanks: 1},
337 {.Name: "attiny1626", .DefineName: "__AVR_ATtiny1626__", .Arch: "103", .NumFlashBanks: 1},
338 {.Name: "attiny1627", .DefineName: "__AVR_ATtiny1627__", .Arch: "103", .NumFlashBanks: 1},
339 {.Name: "atmega808", .DefineName: "__AVR_ATmega808__", .Arch: "103", .NumFlashBanks: 1},
340 {.Name: "atmega809", .DefineName: "__AVR_ATmega809__", .Arch: "103", .NumFlashBanks: 1},
341 {.Name: "atmega1608", .DefineName: "__AVR_ATmega1608__", .Arch: "103", .NumFlashBanks: 1},
342 {.Name: "atmega1609", .DefineName: "__AVR_ATmega1609__", .Arch: "103", .NumFlashBanks: 1},
343 {.Name: "atmega3208", .DefineName: "__AVR_ATmega3208__", .Arch: "103", .NumFlashBanks: 1},
344 {.Name: "atmega3209", .DefineName: "__AVR_ATmega3209__", .Arch: "103", .NumFlashBanks: 1},
345 {.Name: "atmega4808", .DefineName: "__AVR_ATmega4808__", .Arch: "103", .NumFlashBanks: 1},
346 {.Name: "atmega4809", .DefineName: "__AVR_ATmega4809__", .Arch: "103", .NumFlashBanks: 1},
347};
348
349} // namespace targets
350} // namespace clang
351
352static bool ArchHasELPM(StringRef Arch) {
353 return llvm::StringSwitch<bool>(Arch)
354 .Cases(S0: "31", S1: "51", S2: "6", Value: true)
355 .Cases(S0: "102", S1: "104", S2: "105", S3: "106", S4: "107", Value: true)
356 .Default(Value: false);
357}
358
359static bool ArchHasELPMX(StringRef Arch) {
360 return llvm::StringSwitch<bool>(Arch)
361 .Cases(S0: "51", S1: "6", Value: true)
362 .Cases(S0: "102", S1: "104", S2: "105", S3: "106", S4: "107", Value: true)
363 .Default(Value: false);
364}
365
366static bool ArchHasMOVW(StringRef Arch) {
367 return llvm::StringSwitch<bool>(Arch)
368 .Cases(S0: "25", S1: "35", S2: "4", S3: "5", S4: "51", S5: "6", Value: true)
369 .Cases(S0: "102", S1: "103", S2: "104", S3: "105", S4: "106", S5: "107", Value: true)
370 .Default(Value: false);
371}
372
373static bool ArchHasLPMX(StringRef Arch) {
374 return ArchHasMOVW(Arch); // same architectures
375}
376
377static bool ArchHasMUL(StringRef Arch) {
378 return llvm::StringSwitch<bool>(Arch)
379 .Cases(S0: "4", S1: "5", S2: "51", S3: "6", Value: true)
380 .Cases(S0: "102", S1: "103", S2: "104", S3: "105", S4: "106", S5: "107", Value: true)
381 .Default(Value: false);
382}
383
384static bool ArchHasJMPCALL(StringRef Arch) {
385 return llvm::StringSwitch<bool>(Arch)
386 .Cases(S0: "3", S1: "31", S2: "35", S3: "5", S4: "51", S5: "6", Value: true)
387 .Cases(S0: "102", S1: "103", S2: "104", S3: "105", S4: "106", S5: "107", Value: true)
388 .Default(Value: false);
389}
390
391static bool ArchHas3BytePC(StringRef Arch) {
392 // These devices have more than 128kB of program memory.
393 // Note:
394 // - Not fully correct for arch 106: only about half the chips have more
395 // than 128kB program memory and therefore a 3 byte PC.
396 // - Doesn't match GCC entirely: avr-gcc thinks arch 107 goes beyond 128kB
397 // but in fact it doesn't.
398 return llvm::StringSwitch<bool>(Arch)
399 .Case(S: "6", Value: true)
400 .Case(S: "106", Value: true)
401 .Default(Value: false);
402}
403
404bool AVRTargetInfo::isValidCPUName(StringRef Name) const {
405 return llvm::any_of(
406 Range&: AVRMcus, P: [&](const MCUInfo &Info) { return Info.Name == Name; });
407}
408
409void AVRTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
410 for (const MCUInfo &Info : AVRMcus)
411 Values.push_back(Elt: Info.Name);
412}
413
414bool AVRTargetInfo::setCPU(const std::string &Name) {
415 // Set the ABI field based on the device or family name.
416 auto It = llvm::find_if(
417 Range&: AVRMcus, P: [&](const MCUInfo &Info) { return Info.Name == Name; });
418 if (It != std::end(arr&: AVRMcus)) {
419 CPU = Name;
420 ABI = (It->Arch == "100") ? "avrtiny" : "avr";
421 DefineName = It->DefineName;
422 Arch = It->Arch;
423 NumFlashBanks = It->NumFlashBanks;
424 return true;
425 }
426
427 // Parameter Name is neither valid family name nor valid device name.
428 return false;
429}
430
431std::optional<std::string>
432AVRTargetInfo::handleAsmEscapedChar(char EscChar) const {
433 switch (EscChar) {
434 // "%~" represents for 'r' depends on the device has long jump/call.
435 case '~':
436 return ArchHasJMPCALL(Arch) ? std::string("") : std::string(1, 'r');
437
438 // "%!" represents for 'e' depends on the PC register size.
439 case '!':
440 return ArchHas3BytePC(Arch) ? std::string(1, 'e') : std::string("");
441
442 // This is an invalid escape character for AVR.
443 default:
444 return std::nullopt;
445 }
446}
447
448void AVRTargetInfo::getTargetDefines(const LangOptions &Opts,
449 MacroBuilder &Builder) const {
450 Builder.defineMacro(Name: "AVR");
451 Builder.defineMacro(Name: "__AVR");
452 Builder.defineMacro(Name: "__AVR__");
453
454 if (ABI == "avrtiny")
455 Builder.defineMacro(Name: "__AVR_TINY__", Value: "1");
456
457 if (DefineName.size() != 0)
458 Builder.defineMacro(Name: DefineName);
459
460 Builder.defineMacro(Name: "__AVR_ARCH__", Value: Arch);
461
462 // TODO: perhaps we should use the information from AVRDevices.td instead?
463 if (ArchHasELPM(Arch))
464 Builder.defineMacro(Name: "__AVR_HAVE_ELPM__");
465 if (ArchHasELPMX(Arch))
466 Builder.defineMacro(Name: "__AVR_HAVE_ELPMX__");
467 if (ArchHasMOVW(Arch))
468 Builder.defineMacro(Name: "__AVR_HAVE_MOVW__");
469 if (ArchHasLPMX(Arch))
470 Builder.defineMacro(Name: "__AVR_HAVE_LPMX__");
471 if (ArchHasMUL(Arch))
472 Builder.defineMacro(Name: "__AVR_HAVE_MUL__");
473 if (ArchHasJMPCALL(Arch))
474 Builder.defineMacro(Name: "__AVR_HAVE_JMP_CALL__");
475 if (ArchHas3BytePC(Arch)) {
476 // Note: some devices do support eijmp/eicall even though this macro isn't
477 // set. This is the case if they have less than 128kB flash and so
478 // eijmp/eicall isn't very useful anyway. (This matches gcc, although it's
479 // debatable whether we should be bug-compatible in this case).
480 Builder.defineMacro(Name: "__AVR_HAVE_EIJMP_EICALL__");
481 Builder.defineMacro(Name: "__AVR_3_BYTE_PC__");
482 } else {
483 Builder.defineMacro(Name: "__AVR_2_BYTE_PC__");
484 }
485
486 if (NumFlashBanks >= 1)
487 Builder.defineMacro(Name: "__flash", Value: "__attribute__((__address_space__(1)))");
488 if (NumFlashBanks >= 2)
489 Builder.defineMacro(Name: "__flash1", Value: "__attribute__((__address_space__(2)))");
490 if (NumFlashBanks >= 3)
491 Builder.defineMacro(Name: "__flash2", Value: "__attribute__((__address_space__(3)))");
492 if (NumFlashBanks >= 4)
493 Builder.defineMacro(Name: "__flash3", Value: "__attribute__((__address_space__(4)))");
494 if (NumFlashBanks >= 5)
495 Builder.defineMacro(Name: "__flash4", Value: "__attribute__((__address_space__(5)))");
496 if (NumFlashBanks >= 6)
497 Builder.defineMacro(Name: "__flash5", Value: "__attribute__((__address_space__(6)))");
498}
499

source code of clang/lib/Basic/Targets/AVR.cpp