1 | //===--- VE.h - Declare VE target feature support ---------------*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file declares VE TargetInfo objects. |
10 | // |
11 | //===----------------------------------------------------------------------===// |
12 | |
13 | #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_VE_H |
14 | #define LLVM_CLANG_LIB_BASIC_TARGETS_VE_H |
15 | |
16 | #include "clang/Basic/TargetInfo.h" |
17 | #include "clang/Basic/TargetOptions.h" |
18 | #include "llvm/Support/Compiler.h" |
19 | #include "llvm/TargetParser/Triple.h" |
20 | |
21 | namespace clang { |
22 | namespace targets { |
23 | |
24 | class LLVM_LIBRARY_VISIBILITY VETargetInfo : public TargetInfo { |
25 | |
26 | public: |
27 | VETargetInfo(const llvm::Triple &Triple, const TargetOptions &) |
28 | : TargetInfo(Triple) { |
29 | NoAsmVariants = true; |
30 | LongDoubleWidth = 128; |
31 | LongDoubleAlign = 128; |
32 | LongDoubleFormat = &llvm::APFloat::IEEEquad(); |
33 | DoubleAlign = LongLongAlign = 64; |
34 | SuitableAlign = 64; |
35 | LongWidth = LongAlign = PointerWidth = PointerAlign = 64; |
36 | SizeType = UnsignedLong; |
37 | PtrDiffType = SignedLong; |
38 | IntPtrType = SignedLong; |
39 | IntMaxType = SignedLong; |
40 | Int64Type = SignedLong; |
41 | RegParmMax = 8; |
42 | MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; |
43 | HasUnalignedAccess = true; |
44 | |
45 | WCharType = UnsignedInt; |
46 | WIntType = UnsignedInt; |
47 | UseZeroLengthBitfieldAlignment = true; |
48 | resetDataLayout( |
49 | DL: "e-m:e-i64:64-n32:64-S128-v64:64:64-v128:64:64-v256:64:64-v512:64:64-" |
50 | "v1024:64:64-v2048:64:64-v4096:64:64-v8192:64:64-v16384:64:64" ); |
51 | } |
52 | |
53 | void getTargetDefines(const LangOptions &Opts, |
54 | MacroBuilder &Builder) const override; |
55 | |
56 | bool hasSjLjLowering() const override { return true; } |
57 | |
58 | ArrayRef<Builtin::Info> getTargetBuiltins() const override; |
59 | |
60 | BuiltinVaListKind getBuiltinVaListKind() const override { |
61 | return TargetInfo::VoidPtrBuiltinVaList; |
62 | } |
63 | |
64 | CallingConvCheckResult checkCallingConvention(CallingConv CC) const override { |
65 | switch (CC) { |
66 | default: |
67 | return CCCR_Warning; |
68 | case CC_C: |
69 | return CCCR_OK; |
70 | } |
71 | } |
72 | |
73 | std::string_view getClobbers() const override { return "" ; } |
74 | |
75 | ArrayRef<const char *> getGCCRegNames() const override { |
76 | static const char *const GCCRegNames[] = { |
77 | // Regular registers |
78 | "sx0" , "sx1" , "sx2" , "sx3" , "sx4" , "sx5" , "sx6" , "sx7" , |
79 | "sx8" , "sx9" , "sx10" , "sx11" , "sx12" , "sx13" , "sx14" , "sx15" , |
80 | "sx16" , "sx17" , "sx18" , "sx19" , "sx20" , "sx21" , "sx22" , "sx23" , |
81 | "sx24" , "sx25" , "sx26" , "sx27" , "sx28" , "sx29" , "sx30" , "sx31" , |
82 | "sx32" , "sx33" , "sx34" , "sx35" , "sx36" , "sx37" , "sx38" , "sx39" , |
83 | "sx40" , "sx41" , "sx42" , "sx43" , "sx44" , "sx45" , "sx46" , "sx47" , |
84 | "sx48" , "sx49" , "sx50" , "sx51" , "sx52" , "sx53" , "sx54" , "sx55" , |
85 | "sx56" , "sx57" , "sx58" , "sx59" , "sx60" , "sx61" , "sx62" , "sx63" , |
86 | }; |
87 | return llvm::ArrayRef(GCCRegNames); |
88 | } |
89 | |
90 | ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override { |
91 | static const TargetInfo::GCCRegAlias GCCRegAliases[] = { |
92 | {.Aliases: {"s0" }, .Register: "sx0" }, |
93 | {.Aliases: {"s1" }, .Register: "sx1" }, |
94 | {.Aliases: {"s2" }, .Register: "sx2" }, |
95 | {.Aliases: {"s3" }, .Register: "sx3" }, |
96 | {.Aliases: {"s4" }, .Register: "sx4" }, |
97 | {.Aliases: {"s5" }, .Register: "sx5" }, |
98 | {.Aliases: {"s6" }, .Register: "sx6" }, |
99 | {.Aliases: {"s7" }, .Register: "sx7" }, |
100 | {.Aliases: {"s8" , "sl" }, .Register: "sx8" }, |
101 | {.Aliases: {"s9" , "fp" }, .Register: "sx9" }, |
102 | {.Aliases: {"s10" , "lr" }, .Register: "sx10" }, |
103 | {.Aliases: {"s11" , "sp" }, .Register: "sx11" }, |
104 | {.Aliases: {"s12" , "outer" }, .Register: "sx12" }, |
105 | {.Aliases: {"s13" }, .Register: "sx13" }, |
106 | {.Aliases: {"s14" , "tp" }, .Register: "sx14" }, |
107 | {.Aliases: {"s15" , "got" }, .Register: "sx15" }, |
108 | {.Aliases: {"s16" , "plt" }, .Register: "sx16" }, |
109 | {.Aliases: {"s17" , "info" }, .Register: "sx17" }, |
110 | {.Aliases: {"s18" }, .Register: "sx18" }, |
111 | {.Aliases: {"s19" }, .Register: "sx19" }, |
112 | {.Aliases: {"s20" }, .Register: "sx20" }, |
113 | {.Aliases: {"s21" }, .Register: "sx21" }, |
114 | {.Aliases: {"s22" }, .Register: "sx22" }, |
115 | {.Aliases: {"s23" }, .Register: "sx23" }, |
116 | {.Aliases: {"s24" }, .Register: "sx24" }, |
117 | {.Aliases: {"s25" }, .Register: "sx25" }, |
118 | {.Aliases: {"s26" }, .Register: "sx26" }, |
119 | {.Aliases: {"s27" }, .Register: "sx27" }, |
120 | {.Aliases: {"s28" }, .Register: "sx28" }, |
121 | {.Aliases: {"s29" }, .Register: "sx29" }, |
122 | {.Aliases: {"s30" }, .Register: "sx30" }, |
123 | {.Aliases: {"s31" }, .Register: "sx31" }, |
124 | {.Aliases: {"s32" }, .Register: "sx32" }, |
125 | {.Aliases: {"s33" }, .Register: "sx33" }, |
126 | {.Aliases: {"s34" }, .Register: "sx34" }, |
127 | {.Aliases: {"s35" }, .Register: "sx35" }, |
128 | {.Aliases: {"s36" }, .Register: "sx36" }, |
129 | {.Aliases: {"s37" }, .Register: "sx37" }, |
130 | {.Aliases: {"s38" }, .Register: "sx38" }, |
131 | {.Aliases: {"s39" }, .Register: "sx39" }, |
132 | {.Aliases: {"s40" }, .Register: "sx40" }, |
133 | {.Aliases: {"s41" }, .Register: "sx41" }, |
134 | {.Aliases: {"s42" }, .Register: "sx42" }, |
135 | {.Aliases: {"s43" }, .Register: "sx43" }, |
136 | {.Aliases: {"s44" }, .Register: "sx44" }, |
137 | {.Aliases: {"s45" }, .Register: "sx45" }, |
138 | {.Aliases: {"s46" }, .Register: "sx46" }, |
139 | {.Aliases: {"s47" }, .Register: "sx47" }, |
140 | {.Aliases: {"s48" }, .Register: "sx48" }, |
141 | {.Aliases: {"s49" }, .Register: "sx49" }, |
142 | {.Aliases: {"s50" }, .Register: "sx50" }, |
143 | {.Aliases: {"s51" }, .Register: "sx51" }, |
144 | {.Aliases: {"s52" }, .Register: "sx52" }, |
145 | {.Aliases: {"s53" }, .Register: "sx53" }, |
146 | {.Aliases: {"s54" }, .Register: "sx54" }, |
147 | {.Aliases: {"s55" }, .Register: "sx55" }, |
148 | {.Aliases: {"s56" }, .Register: "sx56" }, |
149 | {.Aliases: {"s57" }, .Register: "sx57" }, |
150 | {.Aliases: {"s58" }, .Register: "sx58" }, |
151 | {.Aliases: {"s59" }, .Register: "sx59" }, |
152 | {.Aliases: {"s60" }, .Register: "sx60" }, |
153 | {.Aliases: {"s61" }, .Register: "sx61" }, |
154 | {.Aliases: {"s62" }, .Register: "sx62" }, |
155 | {.Aliases: {"s63" }, .Register: "sx63" }, |
156 | }; |
157 | return llvm::ArrayRef(GCCRegAliases); |
158 | } |
159 | |
160 | bool validateAsmConstraint(const char *&Name, |
161 | TargetInfo::ConstraintInfo &Info) const override { |
162 | switch (*Name) { |
163 | default: |
164 | return false; |
165 | case 'v': |
166 | Info.setAllowsRegister(); |
167 | return true; |
168 | } |
169 | return false; |
170 | } |
171 | |
172 | bool allowsLargerPreferedTypeAlignment() const override { return false; } |
173 | }; |
174 | } // namespace targets |
175 | } // namespace clang |
176 | #endif // LLVM_CLANG_LIB_BASIC_TARGETS_VE_H |
177 | |