1//===--- AArch64.cpp - AArch64 (not ARM) Helpers for Tools ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "AArch64.h"
10#include "../CommonArgs.h"
11#include "clang/Driver/Driver.h"
12#include "clang/Driver/DriverDiagnostic.h"
13#include "clang/Driver/Options.h"
14#include "llvm/Option/ArgList.h"
15#include "llvm/TargetParser/AArch64TargetParser.h"
16#include "llvm/TargetParser/Host.h"
17
18using namespace clang::driver;
19using namespace clang::driver::tools;
20using namespace clang;
21using namespace llvm::opt;
22
23/// \returns true if the given triple can determine the default CPU type even
24/// if -arch is not specified.
25static bool isCPUDeterminedByTriple(const llvm::Triple &Triple) {
26 return Triple.isOSDarwin();
27}
28
29/// getAArch64TargetCPU - Get the (LLVM) name of the AArch64 cpu we are
30/// targeting. Set \p A to the Arg corresponding to the -mcpu argument if it is
31/// provided, or to nullptr otherwise.
32std::string aarch64::getAArch64TargetCPU(const ArgList &Args,
33 const llvm::Triple &Triple, Arg *&A) {
34 std::string CPU;
35 // If we have -mcpu, use that.
36 if ((A = Args.getLastArg(options::OPT_mcpu_EQ))) {
37 StringRef Mcpu = A->getValue();
38 CPU = Mcpu.split(Separator: "+").first.lower();
39 }
40
41 CPU = llvm::AArch64::resolveCPUAlias(CPU);
42
43 // Handle CPU name is 'native'.
44 if (CPU == "native")
45 return std::string(llvm::sys::getHostCPUName());
46
47 if (CPU.size())
48 return CPU;
49
50 if (Triple.isTargetMachineMac() &&
51 Triple.getArch() == llvm::Triple::aarch64) {
52 // Apple Silicon macs default to M1 CPUs.
53 return "apple-m1";
54 }
55
56 if (Triple.isXROS()) {
57 // The xrOS simulator runs on M1 as well, it should have been covered above.
58 assert(!Triple.isSimulatorEnvironment() && "xrossim should be mac-like");
59 return "apple-a12";
60 }
61 // arm64e requires v8.3a and only runs on apple-a12 and later CPUs.
62 if (Triple.isArm64e())
63 return "apple-a12";
64
65 // Make sure we pick the appropriate Apple CPU when targetting a Darwin OS.
66 if (Triple.isOSDarwin())
67 return Triple.getArch() == llvm::Triple::aarch64_32 ? "apple-s4"
68 : "apple-a7";
69
70 return "generic";
71}
72
73// Decode AArch64 features from string like +[no]featureA+[no]featureB+...
74static bool DecodeAArch64Features(const Driver &D, StringRef text,
75 llvm::AArch64::ExtensionSet &Extensions) {
76 SmallVector<StringRef, 8> Split;
77 text.split(A&: Split, Separator: StringRef("+"), MaxSplit: -1, KeepEmpty: false);
78
79 for (StringRef Feature : Split) {
80 if (Feature == "neon" || Feature == "noneon") {
81 D.Diag(clang::diag::DiagID: err_drv_no_neon_modifier);
82 continue;
83 }
84 if (!Extensions.parseModifier(Modifier: Feature))
85 return false;
86 }
87
88 return true;
89}
90
91// Check if the CPU name and feature modifiers in -mcpu are legal. If yes,
92// decode CPU and feature.
93static bool DecodeAArch64Mcpu(const Driver &D, StringRef Mcpu, StringRef &CPU,
94 llvm::AArch64::ExtensionSet &Extensions) {
95 std::pair<StringRef, StringRef> Split = Mcpu.split(Separator: "+");
96 CPU = Split.first;
97
98 if (CPU == "native")
99 CPU = llvm::sys::getHostCPUName();
100
101 if (CPU == "generic") {
102 Extensions.enable(E: llvm::AArch64::AEK_SIMD);
103 } else {
104 const std::optional<llvm::AArch64::CpuInfo> CpuInfo =
105 llvm::AArch64::parseCpu(Name: CPU);
106 if (!CpuInfo)
107 return false;
108
109 Extensions.addCPUDefaults(CPU: *CpuInfo);
110 }
111
112 if (Split.second.size() &&
113 !DecodeAArch64Features(D, text: Split.second, Extensions))
114 return false;
115
116 return true;
117}
118
119static bool
120getAArch64ArchFeaturesFromMarch(const Driver &D, StringRef March,
121 const ArgList &Args,
122 llvm::AArch64::ExtensionSet &Extensions) {
123 std::string MarchLowerCase = March.lower();
124 std::pair<StringRef, StringRef> Split = StringRef(MarchLowerCase).split(Separator: "+");
125
126 const llvm::AArch64::ArchInfo *ArchInfo =
127 llvm::AArch64::parseArch(Arch: Split.first);
128 if (Split.first == "native")
129 ArchInfo = llvm::AArch64::getArchForCpu(CPU: llvm::sys::getHostCPUName().str());
130 if (!ArchInfo)
131 return false;
132
133 Extensions.addArchDefaults(Arch: *ArchInfo);
134
135 if ((Split.second.size() &&
136 !DecodeAArch64Features(D, text: Split.second, Extensions)))
137 return false;
138
139 return true;
140}
141
142static bool
143getAArch64ArchFeaturesFromMcpu(const Driver &D, StringRef Mcpu,
144 const ArgList &Args,
145 llvm::AArch64::ExtensionSet &Extensions) {
146 StringRef CPU;
147 std::string McpuLowerCase = Mcpu.lower();
148 if (!DecodeAArch64Mcpu(D, Mcpu: McpuLowerCase, CPU, Extensions))
149 return false;
150
151 return true;
152}
153
154static bool
155getAArch64MicroArchFeaturesFromMtune(const Driver &D, StringRef Mtune,
156 const ArgList &Args,
157 std::vector<StringRef> &Features) {
158 std::string MtuneLowerCase = Mtune.lower();
159 // Check CPU name is valid, but ignore any extensions on it.
160 llvm::AArch64::ExtensionSet Extensions;
161 StringRef Tune;
162 if (!DecodeAArch64Mcpu(D, Mcpu: MtuneLowerCase, CPU&: Tune, Extensions))
163 return false;
164
165 // Handle CPU name is 'native'.
166 if (MtuneLowerCase == "native")
167 MtuneLowerCase = std::string(llvm::sys::getHostCPUName());
168
169 // 'cyclone' and later have zero-cycle register moves and zeroing.
170 if (MtuneLowerCase == "cyclone" ||
171 StringRef(MtuneLowerCase).starts_with(Prefix: "apple")) {
172 Features.push_back(x: "+zcm");
173 Features.push_back(x: "+zcz");
174 }
175
176 return true;
177}
178
179static bool
180getAArch64MicroArchFeaturesFromMcpu(const Driver &D, StringRef Mcpu,
181 const ArgList &Args,
182 std::vector<StringRef> &Features) {
183 StringRef CPU;
184 // Check CPU name is valid, but ignore any extensions on it.
185 llvm::AArch64::ExtensionSet DecodedFeature;
186 std::string McpuLowerCase = Mcpu.lower();
187 if (!DecodeAArch64Mcpu(D, Mcpu: McpuLowerCase, CPU, Extensions&: DecodedFeature))
188 return false;
189
190 return getAArch64MicroArchFeaturesFromMtune(D, Mtune: CPU, Args, Features);
191}
192
193void aarch64::getAArch64TargetFeatures(const Driver &D,
194 const llvm::Triple &Triple,
195 const ArgList &Args,
196 std::vector<StringRef> &Features,
197 bool ForAS) {
198 Arg *A;
199 bool success = true;
200 llvm::StringRef WaMArch;
201 llvm::AArch64::ExtensionSet Extensions;
202 if (ForAS)
203 for (const auto *A :
204 Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler))
205 for (StringRef Value : A->getValues())
206 if (Value.starts_with("-march="))
207 WaMArch = Value.substr(7);
208 // Call getAArch64ArchFeaturesFromMarch only if "-Wa,-march=" or
209 // "-Xassembler -march" is detected. Otherwise it may return false
210 // and causes Clang to error out.
211 if (!WaMArch.empty())
212 success = getAArch64ArchFeaturesFromMarch(D, March: WaMArch, Args, Extensions);
213 else if ((A = Args.getLastArg(options::OPT_march_EQ)))
214 success =
215 getAArch64ArchFeaturesFromMarch(D, March: A->getValue(), Args, Extensions);
216 else if ((A = Args.getLastArg(options::OPT_mcpu_EQ)))
217 success =
218 getAArch64ArchFeaturesFromMcpu(D, Mcpu: A->getValue(), Args, Extensions);
219 else if (isCPUDeterminedByTriple(Triple))
220 success = getAArch64ArchFeaturesFromMcpu(
221 D, Mcpu: getAArch64TargetCPU(Args, Triple, A), Args, Extensions);
222 else
223 // Default to 'A' profile if the architecture is not specified.
224 success = getAArch64ArchFeaturesFromMarch(D, March: "armv8-a", Args, Extensions);
225
226 if (success && (A = Args.getLastArg(clang::driver::options::OPT_mtune_EQ)))
227 success =
228 getAArch64MicroArchFeaturesFromMtune(D, Mtune: A->getValue(), Args, Features);
229 else if (success && (A = Args.getLastArg(options::OPT_mcpu_EQ)))
230 success =
231 getAArch64MicroArchFeaturesFromMcpu(D, Mcpu: A->getValue(), Args, Features);
232 else if (success && isCPUDeterminedByTriple(Triple))
233 success = getAArch64MicroArchFeaturesFromMcpu(
234 D, Mcpu: getAArch64TargetCPU(Args, Triple, A), Args, Features);
235
236 if (!success) {
237 auto Diag = D.Diag(diag::err_drv_unsupported_option_argument);
238 // If "-Wa,-march=" is used, 'WaMArch' will contain the argument's value,
239 // while 'A' is uninitialized. Only dereference 'A' in the other case.
240 if (!WaMArch.empty())
241 Diag << "-march=" << WaMArch;
242 else
243 Diag << A->getSpelling() << A->getValue();
244 }
245
246 // -mgeneral-regs-only disables all floating-point features.
247 if (Args.getLastArg(options::OPT_mgeneral_regs_only)) {
248 Extensions.disable(E: llvm::AArch64::AEK_FP);
249 }
250
251 // En/disable crc
252 if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) {
253 if (A->getOption().matches(options::ID: OPT_mcrc))
254 Extensions.enable(E: llvm::AArch64::AEK_CRC);
255 else
256 Extensions.disable(E: llvm::AArch64::AEK_CRC);
257 }
258
259 // At this point all hardware features are decided, so convert the extensions
260 // set to a feature list.
261 Extensions.toLLVMFeatureList(Features);
262
263 if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) {
264 StringRef Mtp = A->getValue();
265 if (Mtp == "el3" || Mtp == "tpidr_el3")
266 Features.push_back(x: "+tpidr-el3");
267 else if (Mtp == "el2" || Mtp == "tpidr_el2")
268 Features.push_back(x: "+tpidr-el2");
269 else if (Mtp == "el1" || Mtp == "tpidr_el1")
270 Features.push_back(x: "+tpidr-el1");
271 else if (Mtp == "tpidrro_el0")
272 Features.push_back(x: "+tpidrro-el0");
273 else if (Mtp != "el0" && Mtp != "tpidr_el0")
274 D.Diag(diag::DiagID: err_drv_invalid_mtp) << A->getAsString(Args);
275 }
276
277 // Enable/disable straight line speculation hardening.
278 if (Arg *A = Args.getLastArg(options::OPT_mharden_sls_EQ)) {
279 StringRef Scope = A->getValue();
280 bool EnableRetBr = false;
281 bool EnableBlr = false;
282 bool DisableComdat = false;
283 if (Scope != "none") {
284 SmallVector<StringRef, 4> Opts;
285 Scope.split(A&: Opts, Separator: ",");
286 for (auto Opt : Opts) {
287 Opt = Opt.trim();
288 if (Opt == "all") {
289 EnableBlr = true;
290 EnableRetBr = true;
291 continue;
292 }
293 if (Opt == "retbr") {
294 EnableRetBr = true;
295 continue;
296 }
297 if (Opt == "blr") {
298 EnableBlr = true;
299 continue;
300 }
301 if (Opt == "comdat") {
302 DisableComdat = false;
303 continue;
304 }
305 if (Opt == "nocomdat") {
306 DisableComdat = true;
307 continue;
308 }
309 D.Diag(diag::DiagID: err_drv_unsupported_option_argument)
310 << A->getSpelling() << Scope;
311 break;
312 }
313 }
314
315 if (EnableRetBr)
316 Features.push_back(x: "+harden-sls-retbr");
317 if (EnableBlr)
318 Features.push_back(x: "+harden-sls-blr");
319 if (DisableComdat) {
320 Features.push_back(x: "+harden-sls-nocomdat");
321 }
322 }
323
324 if (Arg *A = Args.getLastArg(
325 options::OPT_mstrict_align, options::OPT_mno_strict_align,
326 options::OPT_mno_unaligned_access, options::OPT_munaligned_access)) {
327 if (A->getOption().matches(options::ID: OPT_mstrict_align) ||
328 A->getOption().matches(options::ID: OPT_mno_unaligned_access))
329 Features.push_back(x: "+strict-align");
330 } else if (Triple.isOSOpenBSD())
331 Features.push_back(x: "+strict-align");
332
333 if (Args.hasArg(options::OPT_ffixed_x1))
334 Features.push_back(x: "+reserve-x1");
335
336 if (Args.hasArg(options::OPT_ffixed_x2))
337 Features.push_back(x: "+reserve-x2");
338
339 if (Args.hasArg(options::OPT_ffixed_x3))
340 Features.push_back(x: "+reserve-x3");
341
342 if (Args.hasArg(options::OPT_ffixed_x4))
343 Features.push_back(x: "+reserve-x4");
344
345 if (Args.hasArg(options::OPT_ffixed_x5))
346 Features.push_back(x: "+reserve-x5");
347
348 if (Args.hasArg(options::OPT_ffixed_x6))
349 Features.push_back(x: "+reserve-x6");
350
351 if (Args.hasArg(options::OPT_ffixed_x7))
352 Features.push_back(x: "+reserve-x7");
353
354 if (Args.hasArg(options::OPT_ffixed_x9))
355 Features.push_back(x: "+reserve-x9");
356
357 if (Args.hasArg(options::OPT_ffixed_x10))
358 Features.push_back(x: "+reserve-x10");
359
360 if (Args.hasArg(options::OPT_ffixed_x11))
361 Features.push_back(x: "+reserve-x11");
362
363 if (Args.hasArg(options::OPT_ffixed_x12))
364 Features.push_back(x: "+reserve-x12");
365
366 if (Args.hasArg(options::OPT_ffixed_x13))
367 Features.push_back(x: "+reserve-x13");
368
369 if (Args.hasArg(options::OPT_ffixed_x14))
370 Features.push_back(x: "+reserve-x14");
371
372 if (Args.hasArg(options::OPT_ffixed_x15))
373 Features.push_back(x: "+reserve-x15");
374
375 if (Args.hasArg(options::OPT_ffixed_x18))
376 Features.push_back(x: "+reserve-x18");
377
378 if (Args.hasArg(options::OPT_ffixed_x20))
379 Features.push_back(x: "+reserve-x20");
380
381 if (Args.hasArg(options::OPT_ffixed_x21))
382 Features.push_back(x: "+reserve-x21");
383
384 if (Args.hasArg(options::OPT_ffixed_x22))
385 Features.push_back(x: "+reserve-x22");
386
387 if (Args.hasArg(options::OPT_ffixed_x23))
388 Features.push_back(x: "+reserve-x23");
389
390 if (Args.hasArg(options::OPT_ffixed_x24))
391 Features.push_back(x: "+reserve-x24");
392
393 if (Args.hasArg(options::OPT_ffixed_x25))
394 Features.push_back(x: "+reserve-x25");
395
396 if (Args.hasArg(options::OPT_ffixed_x26))
397 Features.push_back(x: "+reserve-x26");
398
399 if (Args.hasArg(options::OPT_ffixed_x27))
400 Features.push_back(x: "+reserve-x27");
401
402 if (Args.hasArg(options::OPT_ffixed_x28))
403 Features.push_back(x: "+reserve-x28");
404
405 if (Args.hasArg(options::OPT_fcall_saved_x8))
406 Features.push_back(x: "+call-saved-x8");
407
408 if (Args.hasArg(options::OPT_fcall_saved_x9))
409 Features.push_back(x: "+call-saved-x9");
410
411 if (Args.hasArg(options::OPT_fcall_saved_x10))
412 Features.push_back(x: "+call-saved-x10");
413
414 if (Args.hasArg(options::OPT_fcall_saved_x11))
415 Features.push_back(x: "+call-saved-x11");
416
417 if (Args.hasArg(options::OPT_fcall_saved_x12))
418 Features.push_back(x: "+call-saved-x12");
419
420 if (Args.hasArg(options::OPT_fcall_saved_x13))
421 Features.push_back(x: "+call-saved-x13");
422
423 if (Args.hasArg(options::OPT_fcall_saved_x14))
424 Features.push_back(x: "+call-saved-x14");
425
426 if (Args.hasArg(options::OPT_fcall_saved_x15))
427 Features.push_back(x: "+call-saved-x15");
428
429 if (Args.hasArg(options::OPT_fcall_saved_x18))
430 Features.push_back(x: "+call-saved-x18");
431
432 if (Args.hasArg(options::OPT_mno_neg_immediates))
433 Features.push_back(x: "+no-neg-immediates");
434
435 if (Arg *A = Args.getLastArg(options::OPT_mfix_cortex_a53_835769,
436 options::OPT_mno_fix_cortex_a53_835769)) {
437 if (A->getOption().matches(options::OPT_mfix_cortex_a53_835769))
438 Features.push_back(x: "+fix-cortex-a53-835769");
439 else
440 Features.push_back(x: "-fix-cortex-a53-835769");
441 } else if (Triple.isAndroid() || Triple.isOHOSFamily()) {
442 // Enabled A53 errata (835769) workaround by default on android
443 Features.push_back(x: "+fix-cortex-a53-835769");
444 } else if (Triple.isOSFuchsia()) {
445 std::string CPU = getCPUName(D, Args, T: Triple);
446 if (CPU.empty() || CPU == "generic" || CPU == "cortex-a53")
447 Features.push_back(x: "+fix-cortex-a53-835769");
448 }
449
450 if (Args.getLastArg(options::OPT_mno_bti_at_return_twice))
451 Features.push_back(x: "+no-bti-at-return-twice");
452}
453

source code of clang/lib/Driver/ToolChains/Arch/AArch64.cpp