| 1 | //===-- RegisterContextFreeBSD_x86_64.cpp ---------------------------------===// |
|---|---|
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===---------------------------------------------------------------------===// |
| 8 | |
| 9 | #include "RegisterContextFreeBSD_x86_64.h" |
| 10 | #include "RegisterContextFreeBSD_i386.h" |
| 11 | #include "RegisterContextPOSIX_x86.h" |
| 12 | #include <vector> |
| 13 | |
| 14 | using namespace lldb_private; |
| 15 | using namespace lldb; |
| 16 | |
| 17 | // http://svnweb.freebsd.org/base/head/sys/x86/include/reg.h |
| 18 | typedef struct _GPR { |
| 19 | uint64_t r15; |
| 20 | uint64_t r14; |
| 21 | uint64_t r13; |
| 22 | uint64_t r12; |
| 23 | uint64_t r11; |
| 24 | uint64_t r10; |
| 25 | uint64_t r9; |
| 26 | uint64_t r8; |
| 27 | uint64_t rdi; |
| 28 | uint64_t rsi; |
| 29 | uint64_t rbp; |
| 30 | uint64_t rbx; |
| 31 | uint64_t rdx; |
| 32 | uint64_t rcx; |
| 33 | uint64_t rax; |
| 34 | uint32_t trapno; |
| 35 | uint16_t fs; |
| 36 | uint16_t gs; |
| 37 | uint32_t err; |
| 38 | uint16_t es; |
| 39 | uint16_t ds; |
| 40 | uint64_t rip; |
| 41 | uint64_t cs; |
| 42 | uint64_t rflags; |
| 43 | uint64_t rsp; |
| 44 | uint64_t ss; |
| 45 | } GPR; |
| 46 | |
| 47 | struct DBG { |
| 48 | uint64_t dr[16]; /* debug registers */ |
| 49 | /* Index 0-3: debug address registers */ |
| 50 | /* Index 4-5: reserved */ |
| 51 | /* Index 6: debug status */ |
| 52 | /* Index 7: debug control */ |
| 53 | /* Index 8-15: reserved */ |
| 54 | }; |
| 55 | |
| 56 | struct UserArea { |
| 57 | GPR gpr; |
| 58 | FPR fpr; |
| 59 | DBG dbg; |
| 60 | }; |
| 61 | |
| 62 | #define DR_OFFSET(reg_index) \ |
| 63 | (LLVM_EXTENSION offsetof(UserArea, dbg) + \ |
| 64 | LLVM_EXTENSION offsetof(DBG, dr[reg_index])) |
| 65 | |
| 66 | // Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64 |
| 67 | // structure. |
| 68 | #define DECLARE_REGISTER_INFOS_X86_64_STRUCT |
| 69 | #include "RegisterInfos_x86_64.h" |
| 70 | #undef DECLARE_REGISTER_INFOS_X86_64_STRUCT |
| 71 | |
| 72 | static std::vector<lldb_private::RegisterInfo> &GetSharedRegisterInfoVector() { |
| 73 | static std::vector<lldb_private::RegisterInfo> register_infos; |
| 74 | return register_infos; |
| 75 | } |
| 76 | |
| 77 | static const RegisterInfo * |
| 78 | GetRegisterInfo_i386(const lldb_private::ArchSpec &arch) { |
| 79 | static std::vector<lldb_private::RegisterInfo> g_register_infos( |
| 80 | GetSharedRegisterInfoVector()); |
| 81 | |
| 82 | // Allocate RegisterInfo only once |
| 83 | if (g_register_infos.empty()) { |
| 84 | // Copy the register information from base class |
| 85 | std::unique_ptr<RegisterContextFreeBSD_i386> reg_interface( |
| 86 | new RegisterContextFreeBSD_i386(arch)); |
| 87 | const RegisterInfo *base_info = reg_interface->GetRegisterInfo(); |
| 88 | g_register_infos.insert(position: g_register_infos.end(), first: &base_info[0], |
| 89 | last: &base_info[k_num_registers_i386]); |
| 90 | |
| 91 | // Include RegisterInfos_x86_64 to update the g_register_infos structure |
| 92 | // with x86_64 offsets. |
| 93 | #define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS |
| 94 | #include "RegisterInfos_x86_64.h" |
| 95 | #undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS |
| 96 | } |
| 97 | |
| 98 | return &g_register_infos[0]; |
| 99 | } |
| 100 | |
| 101 | static const RegisterInfo * |
| 102 | PrivateGetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) { |
| 103 | switch (target_arch.GetMachine()) { |
| 104 | case llvm::Triple::x86: |
| 105 | return GetRegisterInfo_i386(arch: target_arch); |
| 106 | case llvm::Triple::x86_64: |
| 107 | return g_register_infos_x86_64; |
| 108 | default: |
| 109 | assert(false && "Unhandled target architecture."); |
| 110 | return nullptr; |
| 111 | } |
| 112 | } |
| 113 | |
| 114 | static uint32_t |
| 115 | PrivateGetRegisterCount(const lldb_private::ArchSpec &target_arch) { |
| 116 | switch (target_arch.GetMachine()) { |
| 117 | case llvm::Triple::x86: |
| 118 | // This vector should have already been filled. |
| 119 | assert(!GetSharedRegisterInfoVector().empty() && |
| 120 | "i386 register info vector not filled."); |
| 121 | return static_cast<uint32_t>(GetSharedRegisterInfoVector().size()); |
| 122 | case llvm::Triple::x86_64: |
| 123 | return static_cast<uint32_t>(sizeof(g_register_infos_x86_64) / |
| 124 | sizeof(g_register_infos_x86_64[0])); |
| 125 | default: |
| 126 | assert(false && "Unhandled target architecture."); |
| 127 | return 0; |
| 128 | } |
| 129 | } |
| 130 | |
| 131 | RegisterContextFreeBSD_x86_64::RegisterContextFreeBSD_x86_64( |
| 132 | const ArchSpec &target_arch) |
| 133 | : lldb_private::RegisterInfoInterface(target_arch), |
| 134 | m_register_info_p(PrivateGetRegisterInfoPtr(target_arch)), |
| 135 | m_register_count(PrivateGetRegisterCount(target_arch)) {} |
| 136 | |
| 137 | size_t RegisterContextFreeBSD_x86_64::GetGPRSize() const { return sizeof(GPR); } |
| 138 | |
| 139 | const RegisterInfo *RegisterContextFreeBSD_x86_64::GetRegisterInfo() const { |
| 140 | return m_register_info_p; |
| 141 | } |
| 142 | |
| 143 | uint32_t RegisterContextFreeBSD_x86_64::GetRegisterCount() const { |
| 144 | return m_register_count; |
| 145 | } |
| 146 |
