| 1 | //===-- RegisterContextNetBSD_i386.cpp --------------------------*- C++ -*-===// |
|---|---|
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | |
| 9 | #include "RegisterContextNetBSD_i386.h" |
| 10 | #include "RegisterContextPOSIX_x86.h" |
| 11 | |
| 12 | using namespace lldb_private; |
| 13 | using namespace lldb; |
| 14 | |
| 15 | // this needs to match 'struct reg' |
| 16 | struct GPR { |
| 17 | uint32_t eax; |
| 18 | uint32_t ecx; |
| 19 | uint32_t edx; |
| 20 | uint32_t ebx; |
| 21 | uint32_t esp; |
| 22 | uint32_t ebp; |
| 23 | uint32_t esi; |
| 24 | uint32_t edi; |
| 25 | uint32_t eip; |
| 26 | uint32_t eflags; |
| 27 | uint32_t cs; |
| 28 | uint32_t ss; |
| 29 | uint32_t ds; |
| 30 | uint32_t es; |
| 31 | uint32_t fs; |
| 32 | uint32_t gs; |
| 33 | }; |
| 34 | |
| 35 | struct FPR_i386 { |
| 36 | uint16_t fctrl; // FPU Control Word (fcw) |
| 37 | uint16_t fstat; // FPU Status Word (fsw) |
| 38 | uint16_t ftag; // FPU Tag Word (ftw) |
| 39 | uint16_t fop; // Last Instruction Opcode (fop) |
| 40 | union { |
| 41 | struct { |
| 42 | uint64_t fip; // Instruction Pointer |
| 43 | uint64_t fdp; // Data Pointer |
| 44 | } x86_64; |
| 45 | struct { |
| 46 | uint32_t fioff; // FPU IP Offset (fip) |
| 47 | uint32_t fiseg; // FPU IP Selector (fcs) |
| 48 | uint32_t fooff; // FPU Operand Pointer Offset (foo) |
| 49 | uint32_t foseg; // FPU Operand Pointer Selector (fos) |
| 50 | } i386_; // Added _ in the end to avoid error with gcc defining i386 in some |
| 51 | // cases |
| 52 | } ptr; |
| 53 | uint32_t mxcsr; // MXCSR Register State |
| 54 | uint32_t mxcsrmask; // MXCSR Mask |
| 55 | MMSReg stmm[8]; // 8*16 bytes for each FP-reg = 128 bytes |
| 56 | XMMReg xmm[8]; // 8*16 bytes for each XMM-reg = 128 bytes |
| 57 | uint32_t padding[56]; |
| 58 | }; |
| 59 | |
| 60 | struct UserArea { |
| 61 | GPR gpr; |
| 62 | FPR_i386 i387; |
| 63 | uint32_t u_debugreg[8]; // Debug registers (DR0 - DR7). |
| 64 | uint32_t tlsbase; |
| 65 | }; |
| 66 | |
| 67 | #define DR_SIZE sizeof(((UserArea *)NULL)->u_debugreg[0]) |
| 68 | #define DR_OFFSET(reg_index) \ |
| 69 | (LLVM_EXTENSION offsetof(UserArea, u_debugreg[reg_index])) |
| 70 | |
| 71 | // Include RegisterInfos_i386 to declare our g_register_infos_i386 structure. |
| 72 | #define DECLARE_REGISTER_INFOS_I386_STRUCT |
| 73 | #include "RegisterInfos_i386.h" |
| 74 | #undef DECLARE_REGISTER_INFOS_I386_STRUCT |
| 75 | |
| 76 | RegisterContextNetBSD_i386::RegisterContextNetBSD_i386( |
| 77 | const ArchSpec &target_arch) |
| 78 | : RegisterInfoInterface(target_arch) {} |
| 79 | |
| 80 | size_t RegisterContextNetBSD_i386::GetGPRSize() const { return sizeof(GPR); } |
| 81 | |
| 82 | const RegisterInfo *RegisterContextNetBSD_i386::GetRegisterInfo() const { |
| 83 | switch (GetTargetArchitecture().GetMachine()) { |
| 84 | case llvm::Triple::x86: |
| 85 | case llvm::Triple::x86_64: |
| 86 | return g_register_infos_i386; |
| 87 | default: |
| 88 | assert(false && "Unhandled target architecture."); |
| 89 | return nullptr; |
| 90 | } |
| 91 | } |
| 92 | |
| 93 | uint32_t RegisterContextNetBSD_i386::GetRegisterCount() const { |
| 94 | return static_cast<uint32_t>(sizeof(g_register_infos_i386) / |
| 95 | sizeof(g_register_infos_i386[0])); |
| 96 | } |
| 97 |