1 | //===-- RegisterContextOpenBSD_x86_64.cpp ---------------------------------===// |
---|---|
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===---------------------------------------------------------------------===// |
8 | |
9 | #include "RegisterContextOpenBSD_x86_64.h" |
10 | #include "RegisterContextPOSIX_x86.h" |
11 | #include <vector> |
12 | |
13 | using namespace lldb_private; |
14 | using namespace lldb; |
15 | |
16 | // /usr/include/machine/reg.h |
17 | typedef struct _GPR { |
18 | uint64_t rdi; |
19 | uint64_t rsi; |
20 | uint64_t rdx; |
21 | uint64_t rcx; |
22 | uint64_t r8; |
23 | uint64_t r9; |
24 | uint64_t r10; |
25 | uint64_t r11; |
26 | uint64_t r12; |
27 | uint64_t r13; |
28 | uint64_t r14; |
29 | uint64_t r15; |
30 | uint64_t rbp; |
31 | uint64_t rbx; |
32 | uint64_t rax; |
33 | uint64_t rsp; |
34 | uint64_t rip; |
35 | uint64_t rflags; |
36 | uint64_t cs; |
37 | uint64_t ss; |
38 | uint64_t ds; |
39 | uint64_t es; |
40 | uint64_t fs; |
41 | uint64_t gs; |
42 | } GPR; |
43 | |
44 | struct DBG { |
45 | uint64_t dr[16]; /* debug registers */ |
46 | /* Index 0-3: debug address registers */ |
47 | /* Index 4-5: reserved */ |
48 | /* Index 6: debug status */ |
49 | /* Index 7: debug control */ |
50 | /* Index 8-15: reserved */ |
51 | }; |
52 | |
53 | struct UserArea { |
54 | GPR gpr; |
55 | FPR fpr; |
56 | DBG dbg; |
57 | }; |
58 | |
59 | #define DR_OFFSET(reg_index) (LLVM_EXTENSION offsetof(DBG, dr[reg_index])) |
60 | |
61 | // Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64 |
62 | // structure. |
63 | #define DECLARE_REGISTER_INFOS_X86_64_STRUCT |
64 | #include "RegisterInfos_x86_64.h" |
65 | #undef DECLARE_REGISTER_INFOS_X86_64_STRUCT |
66 | |
67 | static const RegisterInfo * |
68 | PrivateGetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) { |
69 | switch (target_arch.GetMachine()) { |
70 | case llvm::Triple::x86_64: |
71 | return g_register_infos_x86_64; |
72 | default: |
73 | assert(false && "Unhandled target architecture."); |
74 | return nullptr; |
75 | } |
76 | } |
77 | |
78 | static uint32_t |
79 | PrivateGetRegisterCount(const lldb_private::ArchSpec &target_arch) { |
80 | switch (target_arch.GetMachine()) { |
81 | case llvm::Triple::x86_64: |
82 | return static_cast<uint32_t>(sizeof(g_register_infos_x86_64) / |
83 | sizeof(g_register_infos_x86_64[0])); |
84 | default: |
85 | assert(false && "Unhandled target architecture."); |
86 | return 0; |
87 | } |
88 | } |
89 | |
90 | RegisterContextOpenBSD_x86_64::RegisterContextOpenBSD_x86_64( |
91 | const ArchSpec &target_arch) |
92 | : lldb_private::RegisterInfoInterface(target_arch), |
93 | m_register_info_p(PrivateGetRegisterInfoPtr(target_arch)), |
94 | m_register_count(PrivateGetRegisterCount(target_arch)) {} |
95 | |
96 | size_t RegisterContextOpenBSD_x86_64::GetGPRSize() const { return sizeof(GPR); } |
97 | |
98 | const RegisterInfo *RegisterContextOpenBSD_x86_64::GetRegisterInfo() const { |
99 | return m_register_info_p; |
100 | } |
101 | |
102 | uint32_t RegisterContextOpenBSD_x86_64::GetRegisterCount() const { |
103 | return m_register_count; |
104 | } |
105 |