1//===-- RegisterInfos_riscv32.h ---------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifdef DECLARE_REGISTER_INFOS_RISCV32_STRUCT
10
11#include "Utility/RISCV_DWARF_Registers.h"
12#include "lldb-riscv-register-enums.h"
13#include "lldb/lldb-defines.h"
14#include "lldb/lldb-enumerations.h"
15#include "lldb/lldb-private.h"
16
17#include <stddef.h>
18
19#ifndef GPR_OFFSET
20#error GPR_OFFSET must be defined before including this header file
21#endif
22
23#ifndef FPR_OFFSET
24#error FPR_OFFSET must be defined before including this header file
25#endif
26
27using namespace riscv_dwarf;
28
29// clang-format off
30
31// I suppose EHFrame and DWARF are the same.
32#define KIND_HELPER(reg, generic_kind) \
33 { \
34 riscv_dwarf::dwarf_##reg, riscv_dwarf::dwarf_##reg, generic_kind, \
35 LLDB_INVALID_REGNUM, reg##_riscv \
36 }
37
38// Generates register kinds array for vector registers
39#define GPR32_KIND(reg, generic_kind) KIND_HELPER(reg, generic_kind)
40
41// FPR register kinds array for vector registers
42#define FPR32_KIND(reg, generic_kind) KIND_HELPER(reg, generic_kind)
43
44// VPR register kinds array for vector registers
45#define VPR_KIND(reg, generic_kind) KIND_HELPER(reg, generic_kind)
46
47// Defines a 32-bit general purpose register
48#define DEFINE_GPR32(reg, generic_kind) DEFINE_GPR32_ALT(reg, reg, generic_kind)
49
50// Defines a 32-bit general purpose register
51#define DEFINE_GPR32_ALT(reg, alt, generic_kind) \
52 { \
53 #reg, #alt, 4, GPR_OFFSET(gpr_##reg##_riscv - gpr_first_riscv), \
54 lldb::eEncodingUint, lldb::eFormatHex, \
55 GPR32_KIND(gpr_##reg, generic_kind), nullptr, nullptr, nullptr, \
56 }
57
58#define DEFINE_FPR32(reg, generic_kind) DEFINE_FPR32_ALT(reg, reg, generic_kind)
59
60#define DEFINE_FPR32_ALT(reg, alt, generic_kind) DEFINE_FPR_ALT(reg, alt, 4, generic_kind)
61
62#define DEFINE_FPR_ALT(reg, alt, size, generic_kind) \
63 { \
64 #reg, #alt, size, FPR_OFFSET(fpr_##reg##_riscv - fpr_first_riscv), \
65 lldb::eEncodingUint, lldb::eFormatHex, \
66 FPR32_KIND(fpr_##reg, generic_kind), nullptr, nullptr, nullptr, \
67 }
68
69#define DEFINE_VPR(reg, generic_kind) DEFINE_VPR_ALT(reg, reg, generic_kind)
70
71// Defines a scalable vector register, with default size 128 bits
72// The byte offset 0 is a placeholder, which should be corrected at runtime.
73#define DEFINE_VPR_ALT(reg, alt, generic_kind) \
74 { \
75 #reg, #alt, 16, 0, lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, \
76 VPR_KIND(vpr_##reg, generic_kind), nullptr, nullptr, nullptr \
77 }
78
79// clang-format on
80
81static lldb_private::RegisterInfo g_register_infos_riscv32_le[] = {
82 // DEFINE_GPR32(name, GENERIC KIND)
83 DEFINE_GPR32(pc, LLDB_REGNUM_GENERIC_PC),
84 DEFINE_GPR32_ALT(ra, x1, LLDB_REGNUM_GENERIC_RA),
85 DEFINE_GPR32_ALT(sp, x2, LLDB_REGNUM_GENERIC_SP),
86 DEFINE_GPR32_ALT(gp, x3, LLDB_INVALID_REGNUM),
87 DEFINE_GPR32_ALT(tp, x4, LLDB_INVALID_REGNUM),
88 DEFINE_GPR32_ALT(t0, x5, LLDB_INVALID_REGNUM),
89 DEFINE_GPR32_ALT(t1, x6, LLDB_INVALID_REGNUM),
90 DEFINE_GPR32_ALT(t2, x7, LLDB_INVALID_REGNUM),
91 DEFINE_GPR32_ALT(fp, x8, LLDB_REGNUM_GENERIC_FP),
92 DEFINE_GPR32_ALT(s1, x9, LLDB_INVALID_REGNUM),
93 DEFINE_GPR32_ALT(a0, x10, LLDB_REGNUM_GENERIC_ARG1),
94 DEFINE_GPR32_ALT(a1, x11, LLDB_REGNUM_GENERIC_ARG2),
95 DEFINE_GPR32_ALT(a2, x12, LLDB_REGNUM_GENERIC_ARG3),
96 DEFINE_GPR32_ALT(a3, x13, LLDB_REGNUM_GENERIC_ARG4),
97 DEFINE_GPR32_ALT(a4, x14, LLDB_REGNUM_GENERIC_ARG5),
98 DEFINE_GPR32_ALT(a5, x15, LLDB_REGNUM_GENERIC_ARG6),
99 DEFINE_GPR32_ALT(a6, x16, LLDB_REGNUM_GENERIC_ARG7),
100 DEFINE_GPR32_ALT(a7, x17, LLDB_REGNUM_GENERIC_ARG8),
101 DEFINE_GPR32_ALT(s2, x18, LLDB_INVALID_REGNUM),
102 DEFINE_GPR32_ALT(s3, x19, LLDB_INVALID_REGNUM),
103 DEFINE_GPR32_ALT(s4, x20, LLDB_INVALID_REGNUM),
104 DEFINE_GPR32_ALT(s5, x21, LLDB_INVALID_REGNUM),
105 DEFINE_GPR32_ALT(s6, x22, LLDB_INVALID_REGNUM),
106 DEFINE_GPR32_ALT(s7, x23, LLDB_INVALID_REGNUM),
107 DEFINE_GPR32_ALT(s8, x24, LLDB_INVALID_REGNUM),
108 DEFINE_GPR32_ALT(s9, x25, LLDB_INVALID_REGNUM),
109 DEFINE_GPR32_ALT(s10, x26, LLDB_INVALID_REGNUM),
110 DEFINE_GPR32_ALT(s11, x27, LLDB_INVALID_REGNUM),
111 DEFINE_GPR32_ALT(t3, x28, LLDB_INVALID_REGNUM),
112 DEFINE_GPR32_ALT(t4, x29, LLDB_INVALID_REGNUM),
113 DEFINE_GPR32_ALT(t5, x30, LLDB_INVALID_REGNUM),
114 DEFINE_GPR32_ALT(t6, x31, LLDB_INVALID_REGNUM),
115 DEFINE_GPR32_ALT(zero, x0, LLDB_INVALID_REGNUM),
116
117 DEFINE_FPR32_ALT(ft0, f0, LLDB_INVALID_REGNUM),
118 DEFINE_FPR32_ALT(ft1, f1, LLDB_INVALID_REGNUM),
119 DEFINE_FPR32_ALT(ft2, f2, LLDB_INVALID_REGNUM),
120 DEFINE_FPR32_ALT(ft3, f3, LLDB_INVALID_REGNUM),
121 DEFINE_FPR32_ALT(ft4, f4, LLDB_INVALID_REGNUM),
122 DEFINE_FPR32_ALT(ft5, f5, LLDB_INVALID_REGNUM),
123 DEFINE_FPR32_ALT(ft6, f6, LLDB_INVALID_REGNUM),
124 DEFINE_FPR32_ALT(ft7, f7, LLDB_INVALID_REGNUM),
125 DEFINE_FPR32_ALT(fs0, f8, LLDB_INVALID_REGNUM),
126 DEFINE_FPR32_ALT(fs1, f9, LLDB_INVALID_REGNUM),
127 DEFINE_FPR32_ALT(fa0, f10, LLDB_INVALID_REGNUM),
128 DEFINE_FPR32_ALT(fa1, f11, LLDB_INVALID_REGNUM),
129 DEFINE_FPR32_ALT(fa2, f12, LLDB_INVALID_REGNUM),
130 DEFINE_FPR32_ALT(fa3, f13, LLDB_INVALID_REGNUM),
131 DEFINE_FPR32_ALT(fa4, f14, LLDB_INVALID_REGNUM),
132 DEFINE_FPR32_ALT(fa5, f15, LLDB_INVALID_REGNUM),
133 DEFINE_FPR32_ALT(fa6, f16, LLDB_INVALID_REGNUM),
134 DEFINE_FPR32_ALT(fa7, f17, LLDB_INVALID_REGNUM),
135 DEFINE_FPR32_ALT(fs2, f18, LLDB_INVALID_REGNUM),
136 DEFINE_FPR32_ALT(fs3, f19, LLDB_INVALID_REGNUM),
137 DEFINE_FPR32_ALT(fs4, f20, LLDB_INVALID_REGNUM),
138 DEFINE_FPR32_ALT(fs5, f21, LLDB_INVALID_REGNUM),
139 DEFINE_FPR32_ALT(fs6, f22, LLDB_INVALID_REGNUM),
140 DEFINE_FPR32_ALT(fs7, f23, LLDB_INVALID_REGNUM),
141 DEFINE_FPR32_ALT(fs8, f24, LLDB_INVALID_REGNUM),
142 DEFINE_FPR32_ALT(fs9, f25, LLDB_INVALID_REGNUM),
143 DEFINE_FPR32_ALT(fs10, f26, LLDB_INVALID_REGNUM),
144 DEFINE_FPR32_ALT(fs11, f27, LLDB_INVALID_REGNUM),
145 DEFINE_FPR32_ALT(ft8, f28, LLDB_INVALID_REGNUM),
146 DEFINE_FPR32_ALT(ft9, f29, LLDB_INVALID_REGNUM),
147 DEFINE_FPR32_ALT(ft10, f30, LLDB_INVALID_REGNUM),
148 DEFINE_FPR32_ALT(ft11, f31, LLDB_INVALID_REGNUM),
149 DEFINE_FPR_ALT(fcsr, nullptr, 4, LLDB_INVALID_REGNUM),
150
151 DEFINE_VPR(v0, LLDB_INVALID_REGNUM),
152 DEFINE_VPR(v1, LLDB_INVALID_REGNUM),
153 DEFINE_VPR(v2, LLDB_INVALID_REGNUM),
154 DEFINE_VPR(v3, LLDB_INVALID_REGNUM),
155 DEFINE_VPR(v4, LLDB_INVALID_REGNUM),
156 DEFINE_VPR(v5, LLDB_INVALID_REGNUM),
157 DEFINE_VPR(v6, LLDB_INVALID_REGNUM),
158 DEFINE_VPR(v7, LLDB_INVALID_REGNUM),
159 DEFINE_VPR(v8, LLDB_INVALID_REGNUM),
160 DEFINE_VPR(v9, LLDB_INVALID_REGNUM),
161 DEFINE_VPR(v10, LLDB_INVALID_REGNUM),
162 DEFINE_VPR(v11, LLDB_INVALID_REGNUM),
163 DEFINE_VPR(v12, LLDB_INVALID_REGNUM),
164 DEFINE_VPR(v13, LLDB_INVALID_REGNUM),
165 DEFINE_VPR(v14, LLDB_INVALID_REGNUM),
166 DEFINE_VPR(v15, LLDB_INVALID_REGNUM),
167 DEFINE_VPR(v16, LLDB_INVALID_REGNUM),
168 DEFINE_VPR(v17, LLDB_INVALID_REGNUM),
169 DEFINE_VPR(v18, LLDB_INVALID_REGNUM),
170 DEFINE_VPR(v19, LLDB_INVALID_REGNUM),
171 DEFINE_VPR(v20, LLDB_INVALID_REGNUM),
172 DEFINE_VPR(v21, LLDB_INVALID_REGNUM),
173 DEFINE_VPR(v22, LLDB_INVALID_REGNUM),
174 DEFINE_VPR(v23, LLDB_INVALID_REGNUM),
175 DEFINE_VPR(v24, LLDB_INVALID_REGNUM),
176 DEFINE_VPR(v25, LLDB_INVALID_REGNUM),
177 DEFINE_VPR(v26, LLDB_INVALID_REGNUM),
178 DEFINE_VPR(v27, LLDB_INVALID_REGNUM),
179 DEFINE_VPR(v28, LLDB_INVALID_REGNUM),
180 DEFINE_VPR(v29, LLDB_INVALID_REGNUM),
181 DEFINE_VPR(v30, LLDB_INVALID_REGNUM),
182 DEFINE_VPR(v31, LLDB_INVALID_REGNUM),
183};
184
185#endif // DECLARE_REGISTER_INFOS_RISCV32_STRUCT
186

source code of lldb/source/Plugins/Process/Utility/RegisterInfos_riscv32.h