| 1 | //==- AArch64PBQPRegAlloc.h - AArch64 specific PBQP constraints --*- C++ -*-==// |
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| 2 | // |
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| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
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| 4 | // See https://llvm.org/LICENSE.txt for license information. |
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| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
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| 6 | // |
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| 7 | //===----------------------------------------------------------------------===// |
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| 8 | |
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| 9 | #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64PBQPREGALOC_H |
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| 10 | #define LLVM_LIB_TARGET_AARCH64_AARCH64PBQPREGALOC_H |
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| 11 | |
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| 12 | #include "llvm/ADT/SetVector.h" |
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| 13 | #include "llvm/CodeGen/PBQPRAConstraint.h" |
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| 14 | |
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| 15 | namespace llvm { |
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| 16 | |
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| 17 | class TargetRegisterInfo; |
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| 18 | |
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| 19 | /// Add the accumulator chaining constraint to a PBQP graph |
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| 20 | class A57ChainingConstraint : public PBQPRAConstraint { |
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| 21 | public: |
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| 22 | // Add A57 specific constraints to the PBQP graph. |
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| 23 | void apply(PBQPRAGraph &G) override; |
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| 24 | |
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| 25 | private: |
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| 26 | SmallSetVector<unsigned, 32> Chains; |
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| 27 | const TargetRegisterInfo *TRI; |
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| 28 | |
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| 29 | // Add the accumulator chaining constraint, inside the chain, i.e. so that |
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| 30 | // parity(Rd) == parity(Ra). |
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| 31 | // \return true if a constraint was added |
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| 32 | bool addIntraChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra); |
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| 33 | |
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| 34 | // Add constraints between existing chains |
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| 35 | void addInterChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra); |
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| 36 | }; |
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| 37 | |
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| 38 | } // end namespace llvm |
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| 39 | |
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| 40 | #endif // LLVM_LIB_TARGET_AARCH64_AARCH64PBQPREGALOC_H |
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| 41 | |
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