| 1 | //===- AMDGPUGlobalISelUtils -------------------------------------*- C++ -*-==// |
|---|---|
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | |
| 9 | #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H |
| 10 | #define LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H |
| 11 | |
| 12 | #include "llvm/CodeGen/Register.h" |
| 13 | #include <utility> |
| 14 | |
| 15 | namespace llvm { |
| 16 | |
| 17 | class MachineRegisterInfo; |
| 18 | class GCNSubtarget; |
| 19 | class GISelKnownBits; |
| 20 | class LLT; |
| 21 | |
| 22 | namespace AMDGPU { |
| 23 | |
| 24 | /// Returns base register and constant offset. |
| 25 | std::pair<Register, unsigned> |
| 26 | getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg, |
| 27 | GISelKnownBits *KnownBits = nullptr, |
| 28 | bool CheckNUW = false); |
| 29 | } |
| 30 | } |
| 31 | |
| 32 | #endif |
| 33 |