1//===----------------------- R600FrameLowering.cpp ------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//==-----------------------------------------------------------------------===//
8
9#include "R600FrameLowering.h"
10#include "R600Subtarget.h"
11#include "llvm/CodeGen/MachineFrameInfo.h"
12
13using namespace llvm;
14
15R600FrameLowering::~R600FrameLowering() = default;
16
17/// \returns The number of registers allocated for \p FI.
18StackOffset
19R600FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
20 Register &FrameReg) const {
21 const MachineFrameInfo &MFI = MF.getFrameInfo();
22 const R600RegisterInfo *RI
23 = MF.getSubtarget<R600Subtarget>().getRegisterInfo();
24
25 // Fill in FrameReg output argument.
26 FrameReg = RI->getFrameRegister(MF);
27
28 // Start the offset at 2 so we don't overwrite work group information.
29 // FIXME: We should only do this when the shader actually uses this
30 // information.
31 unsigned OffsetBytes = 2 * (getStackWidth(MF) * 4);
32 int UpperBound = FI == -1 ? MFI.getNumObjects() : FI;
33
34 for (int i = MFI.getObjectIndexBegin(); i < UpperBound; ++i) {
35 OffsetBytes = alignTo(Size: OffsetBytes, A: MFI.getObjectAlign(ObjectIdx: i));
36 OffsetBytes += MFI.getObjectSize(ObjectIdx: i);
37 // Each register holds 4 bytes, so we must always align the offset to at
38 // least 4 bytes, so that 2 frame objects won't share the same register.
39 OffsetBytes = alignTo(Size: OffsetBytes, A: Align(4));
40 }
41
42 if (FI != -1)
43 OffsetBytes = alignTo(Size: OffsetBytes, A: MFI.getObjectAlign(ObjectIdx: FI));
44
45 return StackOffset::getFixed(Fixed: OffsetBytes / (getStackWidth(MF) * 4));
46}
47

source code of llvm/lib/Target/AMDGPU/R600FrameLowering.cpp