1//===- ARCTargetMachine.cpp - Define TargetMachine for ARC ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9//
10//===----------------------------------------------------------------------===//
11
12#include "ARCTargetMachine.h"
13#include "ARC.h"
14#include "ARCMachineFunctionInfo.h"
15#include "ARCTargetTransformInfo.h"
16#include "TargetInfo/ARCTargetInfo.h"
17#include "llvm/CodeGen/Passes.h"
18#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
19#include "llvm/CodeGen/TargetPassConfig.h"
20#include "llvm/MC/TargetRegistry.h"
21#include <optional>
22
23using namespace llvm;
24
25static Reloc::Model getRelocModel(std::optional<Reloc::Model> RM) {
26 return RM.value_or(u: Reloc::Static);
27}
28
29/// ARCTargetMachine ctor - Create an ILP32 architecture model
30ARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT,
31 StringRef CPU, StringRef FS,
32 const TargetOptions &Options,
33 std::optional<Reloc::Model> RM,
34 std::optional<CodeModel::Model> CM,
35 CodeGenOptLevel OL, bool JIT)
36 : LLVMTargetMachine(T,
37 "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
38 "f32:32:32-i64:32-f64:32-a:0:32-n32",
39 TT, CPU, FS, Options, getRelocModel(RM),
40 getEffectiveCodeModel(CM, Default: CodeModel::Small), OL),
41 TLOF(std::make_unique<TargetLoweringObjectFileELF>()),
42 Subtarget(TT, std::string(CPU), std::string(FS), *this) {
43 initAsmInfo();
44}
45
46ARCTargetMachine::~ARCTargetMachine() = default;
47
48namespace {
49
50/// ARC Code Generator Pass Configuration Options.
51class ARCPassConfig : public TargetPassConfig {
52public:
53 ARCPassConfig(ARCTargetMachine &TM, PassManagerBase &PM)
54 : TargetPassConfig(TM, PM) {}
55
56 ARCTargetMachine &getARCTargetMachine() const {
57 return getTM<ARCTargetMachine>();
58 }
59
60 void addIRPasses() override;
61 bool addInstSelector() override;
62 void addPreEmitPass() override;
63 void addPreRegAlloc() override;
64};
65
66} // end anonymous namespace
67
68TargetPassConfig *ARCTargetMachine::createPassConfig(PassManagerBase &PM) {
69 return new ARCPassConfig(*this, PM);
70}
71
72void ARCPassConfig::addIRPasses() {
73 addPass(P: createAtomicExpandLegacyPass());
74
75 TargetPassConfig::addIRPasses();
76}
77
78bool ARCPassConfig::addInstSelector() {
79 addPass(P: createARCISelDag(TM&: getARCTargetMachine(), OptLevel: getOptLevel()));
80 return false;
81}
82
83void ARCPassConfig::addPreEmitPass() { addPass(P: createARCBranchFinalizePass()); }
84
85void ARCPassConfig::addPreRegAlloc() {
86 addPass(P: createARCExpandPseudosPass());
87 addPass(P: createARCOptAddrMode());
88}
89
90MachineFunctionInfo *ARCTargetMachine::createMachineFunctionInfo(
91 BumpPtrAllocator &Allocator, const Function &F,
92 const TargetSubtargetInfo *STI) const {
93 return ARCFunctionInfo::create<ARCFunctionInfo>(Allocator, F, STI);
94}
95
96// Force static initialization.
97extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCTarget() {
98 RegisterTargetMachine<ARCTargetMachine> X(getTheARCTarget());
99 PassRegistry &PR = *PassRegistry::getPassRegistry();
100 initializeARCDAGToDAGISelPass(PR);
101}
102
103TargetTransformInfo
104ARCTargetMachine::getTargetTransformInfo(const Function &F) const {
105 return TargetTransformInfo(ARCTTIImpl(this, F));
106}
107

source code of llvm/lib/Target/ARC/ARCTargetMachine.cpp