1 | //===-- SPIRVISelLowering.h - SPIR-V DAG Lowering Interface -----*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file defines the interfaces that SPIR-V uses to lower LLVM code into a |
10 | // selection DAG. |
11 | // |
12 | //===----------------------------------------------------------------------===// |
13 | |
14 | #ifndef LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H |
15 | #define LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H |
16 | |
17 | #include "SPIRVGlobalRegistry.h" |
18 | #include "llvm/CodeGen/TargetLowering.h" |
19 | #include <set> |
20 | |
21 | namespace llvm { |
22 | class SPIRVSubtarget; |
23 | |
24 | class SPIRVTargetLowering : public TargetLowering { |
25 | const SPIRVSubtarget &STI; |
26 | |
27 | // Record of already processed machine functions |
28 | mutable std::set<const MachineFunction *> ProcessedMF; |
29 | |
30 | public: |
31 | explicit SPIRVTargetLowering(const TargetMachine &TM, |
32 | const SPIRVSubtarget &ST) |
33 | : TargetLowering(TM), STI(ST) {} |
34 | |
35 | // Stop IRTranslator breaking up FMA instrs to preserve types information. |
36 | bool isFMAFasterThanFMulAndFAdd(const MachineFunction &MF, |
37 | EVT) const override { |
38 | return true; |
39 | } |
40 | |
41 | // prevent creation of jump tables |
42 | bool areJTsAllowed(const Function *) const override { return false; } |
43 | |
44 | // This is to prevent sexts of non-i64 vector indices which are generated |
45 | // within general IRTranslator hence type generation for it is omitted. |
46 | MVT getVectorIdxTy(const DataLayout &DL) const override { |
47 | return MVT::getIntegerVT(BitWidth: 32); |
48 | } |
49 | unsigned getNumRegistersForCallingConv(LLVMContext &Context, |
50 | CallingConv::ID CC, |
51 | EVT VT) const override; |
52 | MVT getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC, |
53 | EVT VT) const override; |
54 | bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I, |
55 | MachineFunction &MF, |
56 | unsigned Intrinsic) const override; |
57 | |
58 | // Call the default implementation and finalize target lowering by inserting |
59 | // extra instructions required to preserve validity of SPIR-V code imposed by |
60 | // the standard. |
61 | void finalizeLowering(MachineFunction &MF) const override; |
62 | }; |
63 | } // namespace llvm |
64 | |
65 | #endif // LLVM_LIB_TARGET_SPIRV_SPIRVISELLOWERING_H |
66 | |