1//===-- VEMCInstLower.cpp - Convert VE MachineInstr to MCInst -------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains code to lower VE MachineInstrs to their corresponding
10// MCInst records.
11//
12//===----------------------------------------------------------------------===//
13
14#include "MCTargetDesc/VEMCExpr.h"
15#include "VE.h"
16#include "llvm/CodeGen/AsmPrinter.h"
17#include "llvm/CodeGen/MachineFunction.h"
18#include "llvm/CodeGen/MachineInstr.h"
19#include "llvm/CodeGen/MachineOperand.h"
20#include "llvm/IR/Mangler.h"
21#include "llvm/MC/MCAsmInfo.h"
22#include "llvm/MC/MCContext.h"
23#include "llvm/MC/MCExpr.h"
24#include "llvm/MC/MCInst.h"
25
26using namespace llvm;
27
28static MCOperand LowerSymbolOperand(const MachineInstr *MI,
29 const MachineOperand &MO,
30 const MCSymbol *Symbol, AsmPrinter &AP) {
31 VEMCExpr::VariantKind Kind = (VEMCExpr::VariantKind)MO.getTargetFlags();
32
33 const MCExpr *Expr = MCSymbolRefExpr::create(Symbol, Ctx&: AP.OutContext);
34 // Add offset iff MO is not jump table info or machine basic block.
35 if (!MO.isJTI() && !MO.isMBB() && MO.getOffset())
36 Expr = MCBinaryExpr::createAdd(
37 LHS: Expr, RHS: MCConstantExpr::create(Value: MO.getOffset(), Ctx&: AP.OutContext),
38 Ctx&: AP.OutContext);
39 Expr = VEMCExpr::create(Kind, Expr, Ctx&: AP.OutContext);
40 return MCOperand::createExpr(Val: Expr);
41}
42
43static MCOperand LowerOperand(const MachineInstr *MI, const MachineOperand &MO,
44 AsmPrinter &AP) {
45 switch (MO.getType()) {
46 default:
47 report_fatal_error(reason: "unsupported operand type");
48
49 case MachineOperand::MO_Register:
50 if (MO.isImplicit())
51 break;
52 return MCOperand::createReg(Reg: MO.getReg());
53
54 case MachineOperand::MO_BlockAddress:
55 return LowerSymbolOperand(
56 MI, MO, Symbol: AP.GetBlockAddressSymbol(BA: MO.getBlockAddress()), AP);
57 case MachineOperand::MO_ConstantPoolIndex:
58 return LowerSymbolOperand(MI, MO, Symbol: AP.GetCPISymbol(CPID: MO.getIndex()), AP);
59 case MachineOperand::MO_ExternalSymbol:
60 return LowerSymbolOperand(
61 MI, MO, Symbol: AP.GetExternalSymbolSymbol(Sym: MO.getSymbolName()), AP);
62 case MachineOperand::MO_GlobalAddress:
63 return LowerSymbolOperand(MI, MO, Symbol: AP.getSymbol(GV: MO.getGlobal()), AP);
64 case MachineOperand::MO_Immediate:
65 return MCOperand::createImm(Val: MO.getImm());
66 case MachineOperand::MO_JumpTableIndex:
67 return LowerSymbolOperand(MI, MO, Symbol: AP.GetJTISymbol(JTID: MO.getIndex()), AP);
68 case MachineOperand::MO_MachineBasicBlock:
69 return LowerSymbolOperand(MI, MO, Symbol: MO.getMBB()->getSymbol(), AP);
70
71 case MachineOperand::MO_RegisterMask:
72 break;
73 }
74 return MCOperand();
75}
76
77void llvm::LowerVEMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
78 AsmPrinter &AP) {
79 OutMI.setOpcode(MI->getOpcode());
80
81 for (const MachineOperand &MO : MI->operands()) {
82 MCOperand MCOp = LowerOperand(MI, MO, AP);
83
84 if (MCOp.isValid())
85 OutMI.addOperand(Op: MCOp);
86 }
87}
88

source code of llvm/lib/Target/VE/VEMCInstLower.cpp