1/*
2 * Copyright (c) 2007-2014 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25/**
26 * \file va_enc_hevc.h
27 * \brief The HEVC encoding API
28 *
29 * This file contains the \ref api_enc_hevc "HEVC encoding API".
30 *
31 */
32
33#ifndef VA_ENC_HEVC_H
34#define VA_ENC_HEVC_H
35
36#ifdef __cplusplus
37extern "C" {
38#endif
39
40#include <stdint.h>
41
42/**
43 * \defgroup api_enc_hevc HEVC encoding API
44 *
45 * @{
46 */
47
48/** Attribute value for VAConfigAttribEncHEVCFeatures.
49 *
50 * This attribute decribes the supported features of an HEVC/H.265
51 * encoder configuration.
52 *
53 * All of the field values in this attribute are VA_FEATURE_* values,
54 * indicating support for the corresponding feature.
55 */
56typedef union VAConfigAttribValEncHEVCFeatures {
57 struct {
58 /** Separate colour planes.
59 *
60 * Allows setting separate_colour_plane_flag in the SPS.
61 */
62 uint32_t separate_colour_planes : 2;
63 /** Scaling lists.
64 *
65 * Allows scaling_list() elements to be present in both the SPS
66 * and the PPS. The decoded form of the scaling lists must also
67 * be supplied in a VAQMatrixBufferHEVC buffer when scaling lists
68 * are enabled.
69 */
70 uint32_t scaling_lists : 2;
71 /** Asymmetric motion partitions.
72 *
73 * Allows setting amp_enabled_flag in the SPS.
74 */
75 uint32_t amp : 2;
76 /** Sample adaptive offset filter.
77 *
78 * Allows setting slice_sao_luma_flag and slice_sao_chroma_flag
79 * in slice headers.
80 */
81 uint32_t sao : 2;
82 /** PCM sample blocks.
83 *
84 * Allows setting pcm_enabled_flag in the SPS. When enabled
85 * PCM parameters must be supplied with the sequence parameters,
86 * including block sizes which may be further constrained as
87 * noted in the VAConfigAttribEncHEVCBlockSizes attribute.
88 */
89 uint32_t pcm : 2;
90 /** Temporal motion vector Prediction.
91 *
92 * Allows setting slice_temporal_mvp_enabled_flag in slice
93 * headers.
94 */
95 uint32_t temporal_mvp : 2;
96 /** Strong intra smoothing.
97 *
98 * Allows setting strong_intra_smoothing_enabled_flag in the SPS.
99 */
100 uint32_t strong_intra_smoothing : 2;
101 /** Dependent slices.
102 *
103 * Allows setting dependent_slice_segment_flag in slice headers.
104 */
105 uint32_t dependent_slices : 2;
106 /** Sign data hiding.
107 *
108 * Allows setting sign_data_hiding_enable_flag in the PPS.
109 */
110 uint32_t sign_data_hiding : 2;
111 /** Constrained intra prediction.
112 *
113 * Allows setting constrained_intra_pred_flag in the PPS.
114 */
115 uint32_t constrained_intra_pred : 2;
116 /** Transform skipping.
117 *
118 * Allows setting transform_skip_enabled_flag in the PPS.
119 */
120 uint32_t transform_skip : 2;
121 /** QP delta within coding units.
122 *
123 * Allows setting cu_qp_delta_enabled_flag in the PPS.
124 */
125 uint32_t cu_qp_delta : 2;
126 /** Weighted prediction.
127 *
128 * Allows setting weighted_pred_flag and weighted_bipred_flag in
129 * the PPS. The pred_weight_table() data must be supplied with
130 * every slice header when weighted prediction is enabled.
131 */
132 uint32_t weighted_prediction : 2;
133 /** Transform and quantisation bypass.
134 *
135 * Allows setting transquant_bypass_enabled_flag in the PPS.
136 */
137 uint32_t transquant_bypass : 2;
138 /** Deblocking filter disable.
139 *
140 * Allows setting slice_deblocking_filter_disabled_flag.
141 */
142 uint32_t deblocking_filter_disable : 2;
143 /* Reserved,should not be used, avoid conflict with VA_ATTRIB_NOT_SUPPORTED. */
144 uint32_t reserved : 2;
145 } bits;
146 uint32_t value;
147} VAConfigAttribValEncHEVCFeatures;
148
149/** Attribute value for VAConfigAttribEncHEVCBlockSizes.
150 *
151 * This attribute describes the supported coding tree and transform block
152 * sizes of an HEVC/H.265 encoder configuration
153 */
154typedef union VAConfigAttribValEncHEVCBlockSizes {
155 struct {
156 /** Largest supported size of coding tree blocks.
157 *
158 * CtbLog2SizeY must not be larger than this.
159 */
160 uint32_t log2_max_coding_tree_block_size_minus3 : 2;
161 /** Smallest supported size of coding tree blocks.
162 *
163 * CtbLog2SizeY must not be smaller than this.
164 *
165 * This may be the same as the maximum size, indicating that only
166 * one CTB size is supported.
167 */
168 uint32_t log2_min_coding_tree_block_size_minus3 : 2;
169
170 /** Smallest supported size of luma coding blocks.
171 *
172 * MinCbLog2SizeY must not be smaller than this.
173 */
174 uint32_t log2_min_luma_coding_block_size_minus3 : 2;
175
176 /** Largest supported size of luma transform blocks.
177 *
178 * MaxTbLog2SizeY must not be larger than this.
179 */
180 uint32_t log2_max_luma_transform_block_size_minus2 : 2;
181 /** Smallest supported size of luma transform blocks.
182 *
183 * MinTbLog2SizeY must not be smaller than this.
184 */
185 uint32_t log2_min_luma_transform_block_size_minus2 : 2;
186
187 /** Largest supported transform hierarchy depth in inter
188 * coding units.
189 *
190 * max_transform_hierarchy_depth_inter must not be larger
191 * than this.
192 */
193 uint32_t max_max_transform_hierarchy_depth_inter : 2;
194 /** Smallest supported transform hierarchy depth in inter
195 * coding units.
196 *
197 * max_transform_hierarchy_depth_inter must not be smaller
198 * than this.
199 */
200 uint32_t min_max_transform_hierarchy_depth_inter : 2;
201
202 /** Largest supported transform hierarchy depth in intra
203 * coding units.
204 *
205 * max_transform_hierarchy_depth_intra must not be larger
206 * than this.
207 */
208 uint32_t max_max_transform_hierarchy_depth_intra : 2;
209 /** Smallest supported transform hierarchy depth in intra
210 * coding units.
211 *
212 * max_transform_hierarchy_depth_intra must not be smaller
213 * than this.
214 */
215 uint32_t min_max_transform_hierarchy_depth_intra : 2;
216
217 /** Largest supported size of PCM coding blocks.
218 *
219 * Log2MaxIpcmCbSizeY must not be larger than this.
220 */
221 uint32_t log2_max_pcm_coding_block_size_minus3 : 2;
222 /** Smallest supported size of PCM coding blocks.
223 *
224 * Log2MinIpcmCbSizeY must not be smaller than this.
225 */
226 uint32_t log2_min_pcm_coding_block_size_minus3 : 2;
227
228 /** Reserved for future use. */
229 uint32_t reserved : 10;
230 } bits;
231 uint32_t value;
232} VAConfigAttribValEncHEVCBlockSizes;
233
234/**
235 * @name Picture flags
236 *
237 * Those flags flags are meant to signal when a picture marks the end
238 * of a sequence, a stream, or even both at once.
239 *
240 * @{
241 */
242/**
243 * \brief Marks the last picture in the sequence.
244 *
245 * i.e. the driver appends \c end_of_seq() NAL unit to the encoded frame.
246 */
247#define HEVC_LAST_PICTURE_EOSEQ 0x01
248/**
249 * \brief Marks the last picture in the stream.
250 *
251 * i.e. the driver appends \c end_of_stream() NAL unit to the encoded frame.
252 */
253#define HEVC_LAST_PICTURE_EOSTREAM 0x02
254/**@}*/
255
256/**
257 * \brief Packed header types specific to HEVC encoding.
258 *
259 * Types of packed headers generally used for HEVC encoding. Each
260 * associated packed header data buffer shall contain the start code
261 * prefix 0x000001 followed by the complete NAL unit, thus also
262 * including the \c nal_unit_type.
263 *
264 * Note: the start code prefix can contain an arbitrary number of leading
265 * zeros. The driver will skip them for emulation prevention bytes insertion,
266 * if necessary.
267 */
268typedef enum {
269 /**
270 * \brief Packed Video Parameter Set (VPS).
271 *
272 * The corresponding packed header data buffer shall contain the
273 * complete video_parameter_set_rbsp() syntax element.
274 *
275 * Note: packed \c nal_unit_type shall be equal to 32.
276 */
277 VAEncPackedHeaderHEVC_VPS = VAEncPackedHeaderSequence,
278 /**
279 * \brief Packed Sequence Parameter Set (SPS).
280 *
281 * The corresponding packed header data buffer shall contain the
282 * complete seq_parameter_set_rbsp() syntax element.
283 *
284 * Note: packed \c nal_unit_type shall be equal to 33.
285 */
286 VAEncPackedHeaderHEVC_SPS = VAEncPackedHeaderSequence,
287 /**
288 * \brief Packed Picture Parameter Set (PPS).
289 *
290 * The corresponding packed header data buffer shall contain the
291 * complete pic_parameter_set_rbsp() syntax element.
292 *
293 * Note: packed \c nal_unit_type shall be equal to 34.
294 */
295 VAEncPackedHeaderHEVC_PPS = VAEncPackedHeaderPicture,
296 /**
297 * \brief Packed slice header.
298 *
299 * The corresponding packed header data buffer shall contain the
300 * \c slice_header() syntax element only, along with any start
301 * code prefix and NAL unit type preceeding it. i.e. this means
302 * that the buffer does not contain any of the \c slice_data() or
303 * the \c rbsp_slice_trailing_bits().
304 *
305 * Note: packed \c nal_unit_type shall be equal to 0 to 9 (non-IRAP
306 * picture), or 16 to 21 (IRAP picture).
307 */
308 VAEncPackedHeaderHEVC_Slice = VAEncPackedHeaderSlice,
309 /**
310 * \brief Packed Supplemental Enhancement Information (SEI).
311 *
312 * The corresponding packed header data buffer shall contain the
313 * complete sei_rbsp() syntax element, thus including several
314 * sei_message() elements if necessary.
315 *
316 * Note: packed \c nal_unit_type shall be equal to 39 or 40.
317 *
318 * @deprecated
319 * This is a deprecated packed header flag, All applications can use
320 * \c VA_ENC_PACKED_HEADER_RAW_DATA to pass the corresponding packed
321 * SEI header data buffer to the driver
322 */
323 VAEncPackedHeaderHEVC_SEI va_deprecated_enum = (0x80000000 | 1),
324} VAEncPackedHeaderTypeHEVC;
325
326/**
327 * \brief Sequence parameter for HEVC encoding in main & main 10
328 * profiles.
329 *
330 * This structure holds information for \c seq_parameter_set_data() as
331 * defined by the HEVC specification.
332 *
333 * If packed sequence headers mode is used, i.e. if the encoding
334 * pipeline was configured with the #VA_ENC_PACKED_HEADER_SEQUENCE
335 * flag, then the driver expects two more buffers to be provided to
336 * the same \c vaRenderPicture() as this buffer:
337 * - a #VAEncPackedHeaderParameterBuffer with type set to
338 * VAEncPackedHeaderType::VAEncPackedHeaderSequence ;
339 * - a #VAEncPackedHeaderDataBuffer which holds the actual packed
340 * header data.
341 *
342 * If \c seq_scaling_matrix_present_flag is set to \c 1, then a
343 * #VAQMatrixBufferHEVC buffer shall also be provided within the same
344 * \c vaRenderPicture() call as this sequence parameter buffer.
345 */
346typedef struct _VAEncSequenceParameterBufferHEVC {
347 /** \brief Same as the HEVC bitstream syntax element.
348 * value range [1..2].
349 */
350 uint8_t general_profile_idc;
351 /** \brief Same as the HEVC bitstream syntax element.
352 * general_level_idc shall be set equal to a value of 30 times the level
353 * numbers allowed [1, 2, 2.1, 3, 3.1, 4, 4.1, 5, 5.1, 5.2, 6, 6.1, 6.2]
354 */
355 uint8_t general_level_idc;
356 /** \brief Same as the HEVC bitstream syntax element.
357 * Only value 0 is allowed for level value below 4, exclusive.
358 */
359 uint8_t general_tier_flag;
360 /** \brief Period between I frames. */
361 uint32_t intra_period;
362 /** \brief Period between IDR frames. */
363 uint32_t intra_idr_period;
364 /** \brief Period between I/P frames. */
365 uint32_t ip_period;
366 /**
367 * \brief Initial bitrate set for this sequence in CBR or VBR modes.
368 *
369 * This field represents the initial bitrate value for this
370 * sequence if CBR or VBR mode is used, i.e. if the encoder
371 * pipeline was created with a #VAConfigAttribRateControl
372 * attribute set to either \ref VA_RC_CBR or \ref VA_RC_VBR.
373 *
374 * The bitrate can be modified later on through
375 * #VAEncMiscParameterRateControl buffers.
376 */
377 uint32_t bits_per_second;
378 /** \brief Picture width in pixel samples.
379 * Its value must be multiple of min CU size.
380 */
381 uint16_t pic_width_in_luma_samples;
382 /** \brief Picture height in pixel samples.
383 * Its value must be multiple of min CU size.
384 */
385 uint16_t pic_height_in_luma_samples;
386
387 union {
388 struct {
389 /** \brief Same as the HEVC bitstream syntax element. */
390 uint32_t chroma_format_idc : 2;
391 /** \brief Same as the HEVC bitstream syntax element. */
392 uint32_t separate_colour_plane_flag : 1;
393 /** \brief Same as the HEVC bitstream syntax element. */
394 uint32_t bit_depth_luma_minus8 : 3;
395 /** \brief Same as the HEVC bitstream syntax element. */
396 uint32_t bit_depth_chroma_minus8 : 3;
397 /** \brief Same as the HEVC bitstream syntax element. */
398 uint32_t scaling_list_enabled_flag : 1;
399 /** \brief Same as the HEVC bitstream syntax element. */
400 uint32_t strong_intra_smoothing_enabled_flag : 1;
401 /** \brief Same as the HEVC bitstream syntax element. */
402 uint32_t amp_enabled_flag : 1;
403 /** \brief Same as the HEVC bitstream syntax element. */
404 uint32_t sample_adaptive_offset_enabled_flag : 1;
405 /** \brief Same as the HEVC bitstream syntax element. */
406 uint32_t pcm_enabled_flag : 1;
407 /** \brief Same as the HEVC bitstream syntax element. */
408 uint32_t pcm_loop_filter_disabled_flag : 1;
409 /** \brief Same as the HEVC bitstream syntax element. */
410 uint32_t sps_temporal_mvp_enabled_flag : 1;
411 /** \brief Indicates whether or not the encoding is in low delay mode.
412 * 0 normal sequence
413 * 1 no random access B will be coded . and the coding type could be only I, P or LDB
414 * this flag only indicates the frame coding type of the sequence.
415 */
416 uint32_t low_delay_seq : 1;
417 /** \brief Indicates whether or not the encoding is in dyadic hierarchical GOP structure
418 * the default value 0, BRC would treat is as flat structure. if HierachicalFlag == 1,
419 * application would enable Qp Modulation
420 */
421 uint32_t hierachical_flag : 1;
422 /** \brief keep for future , should be set to 0 */
423 uint32_t reserved_bits : 14;
424 } bits;
425 uint32_t value;
426 } seq_fields;
427
428 /** \brief Same as the HEVC bitstream syntax element.
429 * value range [0..3]
430 */
431 uint8_t log2_min_luma_coding_block_size_minus3;
432
433 /** \brief Same as the HEVC bitstream syntax element.
434 */
435 uint8_t log2_diff_max_min_luma_coding_block_size;
436
437 /** \brief Same as the HEVC bitstream syntax element.
438 * value range [0..3]
439 */
440 uint8_t log2_min_transform_block_size_minus2;
441
442 /** \brief Same as the HEVC bitstream syntax element.
443 */
444 uint8_t log2_diff_max_min_transform_block_size;
445
446 /** \brief Same as the HEVC bitstream syntax element.
447 * value range [2]
448 */
449 uint8_t max_transform_hierarchy_depth_inter;
450
451 /** \brief Same as the HEVC bitstream syntax element.
452 * value range [2]
453 */
454 uint8_t max_transform_hierarchy_depth_intra;
455
456 /** \brief Same as the HEVC bitstream syntax element. */
457 uint32_t pcm_sample_bit_depth_luma_minus1;
458
459 /** \brief Same as the HEVC bitstream syntax element. */
460 uint32_t pcm_sample_bit_depth_chroma_minus1;
461
462 /** \brief Same as the HEVC bitstream syntax element. */
463 uint32_t log2_min_pcm_luma_coding_block_size_minus3;
464
465 /** \brief Derived from the HEVC bitstream syntax element.
466 * log2_min_pcm_luma_coding_block_size_minus3 +
467 * log2_diff_max_min_pcm_luma_coding_block_size
468 */
469 uint32_t log2_max_pcm_luma_coding_block_size_minus3;
470
471 /** @name VUI parameters (optional) */
472 /**@{*/
473 /** \brief Same as the HEVC bitstream syntax element. */
474 uint8_t vui_parameters_present_flag;
475 union {
476 struct {
477 /** \brief Same as the HEVC bitstream syntax element. */
478 uint32_t aspect_ratio_info_present_flag : 1;
479 /** \brief Same as the HEVC bitstream syntax element. */
480 uint32_t neutral_chroma_indication_flag : 1;
481 /** \brief Same as the HEVC bitstream syntax element. */
482 uint32_t field_seq_flag : 1;
483 /** \brief Same as the HEVC bitstream syntax element. */
484 uint32_t vui_timing_info_present_flag : 1;
485 /** \brief Same as the HEVC bitstream syntax element. */
486 uint32_t bitstream_restriction_flag : 1;
487 /** \brief Same as the HEVC bitstream syntax element. */
488 uint32_t tiles_fixed_structure_flag : 1;
489 /** \brief Same as the HEVC bitstream syntax element. */
490 uint32_t motion_vectors_over_pic_boundaries_flag : 1;
491 /** \brief Same as the HEVC bitstream syntax element. */
492 uint32_t restricted_ref_pic_lists_flag : 1;
493 /** \brief Range: 0 to 16, inclusive. */
494 uint32_t log2_max_mv_length_horizontal : 5;
495 /** \brief Range: 0 to 16, inclusive. */
496 uint32_t log2_max_mv_length_vertical : 5;
497 } bits;
498 uint32_t value;
499 } vui_fields;
500 /** \brief Same as the HEVC bitstream syntax element. */
501 uint8_t aspect_ratio_idc;
502 /** \brief Same as the HEVC bitstream syntax element. */
503 uint32_t sar_width;
504 /** \brief Same as the HEVC bitstream syntax element. */
505 uint32_t sar_height;
506 /** \brief Same as the HEVC bitstream syntax element. */
507 uint32_t vui_num_units_in_tick;
508 /** \brief Same as the HEVC bitstream syntax element. */
509 uint32_t vui_time_scale;
510 /** \brief Same as the HEVC bitstream syntax element. */
511 uint16_t min_spatial_segmentation_idc;
512 /** \brief Same as the HEVC bitstream syntax element. */
513 uint8_t max_bytes_per_pic_denom;
514 /** \brief Same as the HEVC bitstream syntax element. */
515 uint8_t max_bits_per_min_cu_denom;
516
517 /** \brief SCC flags to enable/disable features, including IBC and palette mode at present.*/
518 union {
519 struct {
520 /** \brief Same as the HEVC bitstream syntax element. */
521 uint32_t palette_mode_enabled_flag : 1;
522 /** \brief Reserved bits for future use, must be zero */
523 uint32_t reserved : 31;
524 } bits;
525 uint32_t value;
526 } scc_fields;
527 /** \brief Reserved bytes for future use, must be zero */
528 uint32_t va_reserved[VA_PADDING_MEDIUM - 1];
529 /**@}*/
530} VAEncSequenceParameterBufferHEVC;
531
532/****************************
533 * HEVC data structures
534 ****************************/
535/**
536 * \brief Picture parameter for HEVC encoding in main & main 10
537 * profiles.
538 *
539 * This structure holds information for \c pic_parameter_set_rbsp() as
540 * defined by the HEVC specification.
541 *
542 * If packed picture headers mode is used, i.e. if the encoding
543 * pipeline was configured with the #VA_ENC_PACKED_HEADER_PICTURE
544 * flag, then the driver expects two more buffers to be provided to
545 * the same \c vaRenderPicture() as this buffer:
546 * - a #VAEncPackedHeaderParameterBuffer with type set to
547 * VAEncPackedHeaderType::VAEncPackedHeaderPicture ;
548 * - a #VAEncPackedHeaderDataBuffer which holds the actual packed
549 * header data.
550 *
551 * If \c pic_scaling_matrix_present_flag is set to \c 1, then a
552 * #VAQMatrixBufferHEVC buffer shall also be provided within the same
553 * \c vaRenderPicture() call as this picture parameter buffer.
554 */
555typedef struct _VAEncPictureParameterBufferHEVC {
556 /**
557 * \brief Information about the picture to be encoded.
558 *
559 * See #VAPictureHEVC for further description of each field.
560 * Note that decoded_curr_pic.picture_id represents the reconstructed
561 * (decoded) picture. User provides a scratch VA surface ID here.
562 * Long term reference and RPS related fields should be set to 0
563 * and ignored.
564 */
565 VAPictureHEVC decoded_curr_pic;
566 /**
567 * \brief Decoded Picture Buffer (DPB).
568 *
569 * This array represents the list of reconstructed (decoded)
570 * frames used as reference. It is important to keep track of
571 * reconstructed frames so that they can be used later on as
572 * reference for P or B-frames encoding.
573 */
574 VAPictureHEVC reference_frames[15];
575 /**
576 * \brief Output encoded bitstream.
577 *
578 * \ref coded_buf has type #VAEncCodedBufferType. It should be
579 * large enough to hold the compressed NAL slice and possibly VPS, SPS
580 * and PPS NAL units, and other NAL units such as SEI.
581 */
582 VABufferID coded_buf;
583
584 /** \brief collocated reference picture buffer index of ReferenceFrames[].
585 * Please note it is different from HEVC syntac element collocated_ref_idx.
586 * When the HEVC syntax element slice_temporal_mvp_enable_flag takes value 0,
587 * collocated_ref_pic_index should take value 0xFF. .
588 * Range: [0..14, 0xFF]
589 */
590 uint8_t collocated_ref_pic_index;
591
592 /**
593 * \brief OR'd flags describing whether the picture is the last one or not.
594 *
595 * This fields holds 0 if the picture to be encoded is not the last
596 * one in the stream or sequence. Otherwise, it is a combination of
597 * \ref HEVC_LAST_PICTURE_EOSEQ or \ref HEVC_LAST_PICTURE_EOSTREAM.
598 */
599 uint8_t last_picture;
600
601 /** \brief \c init_qp_minus26 + 26. */
602 uint8_t pic_init_qp;
603
604 /** \brief Corresponds to HEVC syntax element of the same name. */
605 uint8_t diff_cu_qp_delta_depth;
606
607 /** \brief Corresponds to HEVC syntax element of the same name. */
608 int8_t pps_cb_qp_offset;
609
610 /** \brief Corresponds to HEVC syntax element of the same name. */
611 int8_t pps_cr_qp_offset;
612
613 /** \brief Corresponds to HEVC syntax element of the same name. */
614 uint8_t num_tile_columns_minus1;
615
616 /** \brief Corresponds to HEVC syntax element of the same name. */
617 uint8_t num_tile_rows_minus1;
618
619 /** \brief Corresponds to HEVC syntax element of the same name. */
620 uint8_t column_width_minus1[19];
621
622 /** \brief Corresponds to HEVC syntax element of the same name. */
623 uint8_t row_height_minus1[21];
624
625 /** \brief Corresponds to HEVC syntax element of the same name. */
626 uint8_t log2_parallel_merge_level_minus2;
627
628 /** \brief Application may set the CTU bit size limit based on
629 * spec requirement (A.3.2), or other value for special purpose.
630 * If the value is set 0, no bit size limit is checked.
631 */
632 uint8_t ctu_max_bitsize_allowed;
633
634 /** \brief Maximum reference index for reference picture list 0.
635 * value range: [0..14].
636 */
637 uint8_t num_ref_idx_l0_default_active_minus1;
638
639 /** \brief Maximum reference index for reference picture list 1.
640 * value range: [0..14].
641 */
642 uint8_t num_ref_idx_l1_default_active_minus1;
643
644 /** \brief PPS header
645 * Used by GPU to generate new slice headers in slice size control.
646 * value range: [0..63].
647 */
648 uint8_t slice_pic_parameter_set_id;
649
650 /** \brief NAL unit type
651 * Used by GPU to generate new slice headers in slice size control.
652 * value range: [0..63].
653 */
654 uint8_t nal_unit_type;
655
656 union {
657 struct {
658 /** \brief Is picture an IDR picture? */
659 uint32_t idr_pic_flag : 1;
660 /** \brief Picture type.
661 * I - 1;
662 * P - 2;
663 * B - 3;
664 * B1 - 4;
665 * B2 - 5;
666 * B1 and B2 are frame types for hierachical B, explanation
667 * can refer to num_b_in_gop[].
668 */
669 uint32_t coding_type : 3;
670 /** \brief Is picture a reference picture? */
671 uint32_t reference_pic_flag : 1;
672 /** \brief Corresponds to HEVC syntax element of the same name. */
673 uint32_t dependent_slice_segments_enabled_flag : 1;
674 /** \brief Corresponds to HEVC syntax element of the same name. */
675 uint32_t sign_data_hiding_enabled_flag : 1;
676 /** \brief Corresponds to HEVC syntax element of the same name. */
677 uint32_t constrained_intra_pred_flag : 1;
678 /** \brief Corresponds to HEVC syntax element of the same name. */
679 uint32_t transform_skip_enabled_flag : 1;
680 /** \brief Corresponds to HEVC syntax element of the same name. */
681 uint32_t cu_qp_delta_enabled_flag : 1;
682 /** \brief Corresponds to HEVC syntax element of the same name. */
683 uint32_t weighted_pred_flag : 1;
684 /** \brief Corresponds to HEVC syntax element of the same name. */
685 uint32_t weighted_bipred_flag : 1;
686 /** \brief Corresponds to HEVC syntax element of the same name. */
687 uint32_t transquant_bypass_enabled_flag : 1;
688 /** \brief Corresponds to HEVC syntax element of the same name. */
689 uint32_t tiles_enabled_flag : 1;
690 /** \brief Corresponds to HEVC syntax element of the same name. */
691 uint32_t entropy_coding_sync_enabled_flag : 1;
692 /** \brief Corresponds to HEVC syntax element of the same name. */
693 uint32_t loop_filter_across_tiles_enabled_flag : 1;
694 /** \brief Corresponds to HEVC syntax element of the same name. */
695 uint32_t pps_loop_filter_across_slices_enabled_flag : 1;
696 /** \brief A combination of HEVC syntax element of
697 * sps_scaling_list_data_present_flag and
698 * pps_scaling_list_data_present_flag
699 * when scaling_list_enable_flag is 0, it must be 0.
700 */
701 uint32_t scaling_list_data_present_flag : 1;
702 /** \brief indicate the current picture contains significant
703 * screen contents (text, characters, etc.) or animated image.
704 * GPU may want to treat them differently from normal video.
705 * For example, encoder may choose a small transform unit size
706 * and may use transform skip mode.
707 */
708 uint32_t screen_content_flag : 1;
709 /**
710 * When either weighted_pred_flag or weighted_bipred_flag is
711 * turned on, the flag enable_gpu_weighted_prediction requests
712 * GPU to determine weighted prediction factors. In this case,
713 * the following parameters in slice control data structure
714 * shall be ignored:
715 * luma_log2_weight_denom, delta_chroma_log2_weight_denom,
716 * luma_offset_l0[15], luma_offset_l1[15],
717 * delta_luma_weight_l0[15], delta_luma_weight_l1[15],
718 * chroma_offset_l0[15][2], chroma_offset_l1[15][2],
719 * and delta_chroma_weight_l0[15][2], delta_chroma_weight_l1[15][2].
720 */
721 uint32_t enable_gpu_weighted_prediction : 1;
722 /** \brief HEVC syntax element in slice segment header
723 * GPU uses it to generate new slice headers in slice size control.
724 */
725 uint32_t no_output_of_prior_pics_flag : 1;
726 uint32_t reserved : 11;
727 } bits;
728 uint32_t value;
729 } pic_fields;
730
731 /** \brief When hierachical_level_plus1 > 0, hierachical_level_plus1-1 indicates
732 *the current frame's level.when it > 0. B1, B2 setting in CodingType can be treated as B,
733 *hirachical level is determined by this variable.When hierachical_level_plus1 == 0,
734 *hierarchical level information still comes from coding_type.
735 */
736 uint8_t hierarchical_level_plus1;
737 /** \brief Reserved bytes for future use, must be zero */
738 uint8_t va_byte_reserved;
739 /** \brief SCC flags to enable/disable feature, only IBC at present.*/
740 union {
741 struct {
742 /** \brief Same as the HEVC bitstream syntax element. */
743 uint16_t pps_curr_pic_ref_enabled_flag : 1;
744 /** \brief Reserved bits for future use, must be zero */
745 uint16_t reserved : 15;
746 } bits;
747 uint16_t value;
748 } scc_fields;
749 /** \brief Reserved bytes for future use, must be zero */
750 uint32_t va_reserved[VA_PADDING_HIGH - 1];
751} VAEncPictureParameterBufferHEVC;
752
753/**
754 * \brief Slice parameter for HEVC encoding in main & main 10 profiles.
755 *
756 * This structure holds information for \c
757 * slice_segment_layer_rbsp() as defined by the HEVC
758 * specification.
759 *
760 * If packed slice headers mode is used, i.e. if the encoding
761 * pipeline was configured with the #VA_ENC_PACKED_HEADER_SLICE
762 * flag, then the driver expects two more buffers to be provided to
763 * the same \c vaRenderPicture() as this buffer:
764 * - a #VAEncPackedHeaderParameterBuffer with type set to
765 * VAEncPackedHeaderType::VAEncPackedHeaderSlice ;
766 * - a #VAEncPackedHeaderDataBuffer which holds the actual packed
767 * header data.
768 *
769 */
770typedef struct _VAEncSliceParameterBufferHEVC {
771 /** \brief Starting CTU address for this slice. */
772 uint32_t slice_segment_address;
773 /** \brief Number of CTUs in this slice. */
774 uint32_t num_ctu_in_slice;
775
776 /** \brief Slice type.
777 * Corresponds to HEVC syntax element of the same name.
778 */
779 uint8_t slice_type;
780 /** \brief Same as the HEVC bitstream syntax element. */
781 uint8_t slice_pic_parameter_set_id;
782
783 /** \brief Maximum reference index for reference picture list 0.
784 * Range: 0 to 14, inclusive.
785 */
786 uint8_t num_ref_idx_l0_active_minus1;
787 /** \brief Maximum reference index for reference picture list 1.
788 * Range: 0 to 14, inclusive.
789 */
790 uint8_t num_ref_idx_l1_active_minus1;
791 /** \brief Reference picture list 0 (for P slices). */
792 VAPictureHEVC ref_pic_list0[15];
793 /** \brief Reference picture list 1 (for B slices). */
794 VAPictureHEVC ref_pic_list1[15];
795 /**@}*/
796
797 /** @name pred_weight_table() */
798 /**@{*/
799 /** \brief Same as the HEVC bitstream syntax element. */
800 uint8_t luma_log2_weight_denom;
801 /** \brief Same as the HEVC bitstream syntax element. */
802 int8_t delta_chroma_log2_weight_denom;
803 /** \brief Same as the HEVC bitstream syntax element. */
804 int8_t delta_luma_weight_l0[15];
805 /** \brief Same as the HEVC bitstream syntax element. */
806 int8_t luma_offset_l0[15];
807 /** \brief Same as the HEVC bitstream syntax element. */
808 int8_t delta_chroma_weight_l0[15][2];
809 /** \brief Same as the HEVC spec variable ChromaOffsetL0[]. */
810 int8_t chroma_offset_l0[15][2];
811 /** \brief Same as the HEVC bitstream syntax element. */
812 int8_t delta_luma_weight_l1[15];
813 /** \brief Same as the HEVC bitstream syntax element. */
814 int8_t luma_offset_l1[15];
815 /** \brief Same as the HEVC bitstream syntax element. */
816 int8_t delta_chroma_weight_l1[15][2];
817 /** \brief Same as the HEVC spec variable ChromaOffsetL1[]. */
818 int8_t chroma_offset_l1[15][2];
819 /**@}*/
820
821 /** \brief Corresponds to HEVC spec variable MaxNumMergeCand.
822 * Range: [1..5].
823 */
824 uint8_t max_num_merge_cand;
825
826 /** \brief Same as the HEVC bitstream syntax element. */
827 int8_t slice_qp_delta;
828
829 /** \brief Same as the HEVC bitstream syntax element. */
830 int8_t slice_cb_qp_offset;
831
832 /** \brief Same as the HEVC bitstream syntax element. */
833 int8_t slice_cr_qp_offset;
834
835 /** \brief Same as the HEVC bitstream syntax element. */
836 int8_t slice_beta_offset_div2;
837
838 /** \brief Same as the HEVC bitstream syntax element. */
839 int8_t slice_tc_offset_div2;
840
841 union {
842 struct {
843 /** \brief Indicates if current slice is the last one in picture */
844 uint32_t last_slice_of_pic_flag : 1;
845 /** \brief Corresponds to HEVC syntax element of the same name */
846 uint32_t dependent_slice_segment_flag : 1;
847 /** \brief Corresponds to HEVC syntax element of the same name */
848 uint32_t colour_plane_id : 2;
849 /** \brief Corresponds to HEVC syntax element of the same name. */
850 uint32_t slice_temporal_mvp_enabled_flag : 1;
851 /** \brief Corresponds to HEVC syntax element of the same name. */
852 uint32_t slice_sao_luma_flag : 1;
853 /** \brief Corresponds to HEVC syntax element of the same name. */
854 uint32_t slice_sao_chroma_flag : 1;
855 /** \brief Corresponds to HEVC syntax element of the same name.
856 * if this flag is set to 0, num_ref_idx_l0_active_minus1 should be
857 * equal to num_ref_idx_l0_default_active_minus1
858 * as well as for that for l1.
859 */
860 uint32_t num_ref_idx_active_override_flag : 1;
861 /** \brief Corresponds to HEVC syntax element of the same name. */
862 uint32_t mvd_l1_zero_flag : 1;
863 /** \brief Corresponds to HEVC syntax element of the same name. */
864 uint32_t cabac_init_flag : 1;
865 /** \brief Corresponds to HEVC syntax element of the same name. */
866 uint32_t slice_deblocking_filter_disabled_flag : 2;
867 /** \brief Corresponds to HEVC syntax element of the same name. */
868 uint32_t slice_loop_filter_across_slices_enabled_flag : 1;
869 /** \brief Corresponds to HEVC syntax element of the same name. */
870 uint32_t collocated_from_l0_flag : 1;
871 } bits;
872 uint32_t value;
873 } slice_fields;
874
875
876 /**
877 * \brief bit offset of syntax element pred_weight_table() in slice segment header.
878 * It aligns with the starting position of the current packed slice header.
879 * It is used when encoder prefers to override the weighted prediction parameters passed in
880 * from application.
881 * Please refer to enable_gpu_weighted_prediction in VAEncPictureParameterBufferHEVC.
882 */
883 uint32_t pred_weight_table_bit_offset;
884 /**
885 * \brief bit length of syntax element pred_weight_table() in slice segment header.
886 * It is used when encoder prefers to override the weighted prediction parameters passed in
887 * from application.
888 * Please refer to enable_gpu_weighted_prediction in VAEncPictureParameterBufferHEVC.
889 */
890 uint32_t pred_weight_table_bit_length;
891 /** \brief Reserved bytes for future use, must be zero */
892 uint32_t va_reserved[VA_PADDING_MEDIUM - 2];
893 /**@}*/
894} VAEncSliceParameterBufferHEVC;
895
896/**
897 * \brief HEVC Quantization Matrix Buffer Structure
898 *
899 * This structure is sent once per frame,
900 * and only when scaling_list_enabled_flag = 1 and scaling_list_data_present_flag = 1.
901 * Only when scaling_list_data_present_flag = 1, app still
902 * needs to send in this structure. When scaling_list_enabled_flag = 1 and
903 * scaling_list_data_present_flag = 0, driver is responsible to generate
904 * the default scaling list values.
905 *
906 * Matrix entries are in raster scan order which follows HEVC spec.
907 */
908typedef struct _VAQMatrixBufferHEVC {
909 /**
910 * \brief scaling lists,
911 * corresponds to same HEVC spec syntax element
912 * ScalingList[ i ][ MatrixID ][ j ].
913 *
914 * \brief 4x4 scaling,
915 */
916 uint8_t scaling_lists_4x4[3][2][16];
917 /**
918 * \brief 8x8 scaling,
919 */
920 uint8_t scaling_lists_8x8[3][2][64];
921 /**
922 * \brief 16x16 scaling,
923 * correspongs i = 2, MatrixID is in the range of 0 to 5,
924 * inclusive. And j is in the range of 0 to 63, inclusive.
925 */
926 uint8_t scaling_lists_16x16[3][2][64];
927 /**
928 * \brief 32x32 scaling,
929 * correspongs i = 3, MatrixID is in the range of 0 to 1,
930 * inclusive. And j is in the range of 0 to 63, inclusive.
931 */
932 uint8_t scaling_lists_32x32[2][64];
933 /**
934 * \brief DC values of the 16x16 scaling lists,
935 * corresponds to HEVC spec syntax
936 * scaling_list_dc_coef_minus8[ sizeID - 2 ][ matrixID ] + 8
937 * with sizeID = 2 and matrixID in the range of 0 to 5, inclusive.
938 */
939 uint8_t scaling_list_dc_16x16[3][2];
940 /**
941 * \brief DC values of the 32x32 scaling lists,
942 * corresponds to HEVC spec syntax
943 * scaling_list_dc_coef_minus8[ sizeID - 2 ][ matrixID ] + 8
944 * with sizeID = 3 and matrixID in the range of 0 to 1, inclusive.
945 */
946 uint8_t scaling_list_dc_32x32[2];
947
948 /** \brief Reserved bytes for future use, must be zero */
949 uint32_t va_reserved[VA_PADDING_LOW];
950} VAQMatrixBufferHEVC;
951
952/**@}*/
953
954#ifdef __cplusplus
955}
956#endif
957
958#endif /* VA_ENC_HEVC_H */
959

source code of include/va/va_enc_hevc.h