| 1 | // Copyright (C) 2022 Intel Corporation. |
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| 2 | // SPDX-License-Identifier: LicenseRef-Qt-Commercial OR LGPL-3.0-only OR GPL-2.0-only OR GPL-3.0-only |
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| 3 | // This is a generated file. DO NOT EDIT. |
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| 4 | // Please see util/x86simdgen/README.md |
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| 5 | |
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| 6 | // |
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| 7 | // W A R N I N G |
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| 8 | // ------------- |
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| 9 | // |
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| 10 | // This file is not part of the Qt API. It exists purely as an |
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| 11 | // implementation detail. This header file may change from version to |
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| 12 | // version without notice, or even be removed. |
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| 13 | // |
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| 14 | // We mean it. |
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| 15 | // |
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| 16 | |
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| 17 | // This is a generated file. DO NOT EDIT. |
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| 18 | // Please see util/x86simdgen/README.md |
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| 19 | #ifndef QSIMD_X86_P_H |
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| 20 | #define QSIMD_X86_P_H |
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| 21 | |
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| 22 | #include <stdint.h> |
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| 23 | |
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| 24 | // in CPUID Leaf 1, EDX: |
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| 25 | #define cpu_feature_sse2 (UINT64_C(1) << 0) |
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| 26 | |
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| 27 | // in CPUID Leaf 1, ECX: |
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| 28 | #define cpu_feature_sse3 (UINT64_C(1) << 1) |
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| 29 | #define cpu_feature_ssse3 (UINT64_C(1) << 2) |
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| 30 | #define cpu_feature_fma (UINT64_C(1) << 3) |
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| 31 | #define cpu_feature_sse4_1 (UINT64_C(1) << 4) |
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| 32 | #define cpu_feature_sse4_2 (UINT64_C(1) << 5) |
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| 33 | #define cpu_feature_movbe (UINT64_C(1) << 6) |
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| 34 | #define cpu_feature_popcnt (UINT64_C(1) << 7) |
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| 35 | #define cpu_feature_aes (UINT64_C(1) << 8) |
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| 36 | #define cpu_feature_avx (UINT64_C(1) << 9) |
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| 37 | #define cpu_feature_f16c (UINT64_C(1) << 10) |
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| 38 | #define cpu_feature_rdrnd (UINT64_C(1) << 11) |
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| 39 | |
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| 40 | // in CPUID Leaf 7, Sub-leaf 0, EBX: |
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| 41 | #define cpu_feature_bmi (UINT64_C(1) << 12) |
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| 42 | #define cpu_feature_avx2 (UINT64_C(1) << 13) |
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| 43 | #define cpu_feature_bmi2 (UINT64_C(1) << 14) |
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| 44 | #define cpu_feature_avx512f (UINT64_C(1) << 15) |
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| 45 | #define cpu_feature_avx512dq (UINT64_C(1) << 16) |
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| 46 | #define cpu_feature_rdseed (UINT64_C(1) << 17) |
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| 47 | #define cpu_feature_avx512ifma (UINT64_C(1) << 18) |
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| 48 | #define cpu_feature_avx512cd (UINT64_C(1) << 19) |
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| 49 | #define cpu_feature_sha (UINT64_C(1) << 20) |
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| 50 | #define cpu_feature_avx512bw (UINT64_C(1) << 21) |
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| 51 | #define cpu_feature_avx512vl (UINT64_C(1) << 22) |
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| 52 | |
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| 53 | // in CPUID Leaf 7, Sub-leaf 0, ECX: |
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| 54 | #define cpu_feature_avx512vbmi (UINT64_C(1) << 23) |
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| 55 | #define cpu_feature_waitpkg (UINT64_C(1) << 24) |
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| 56 | #define cpu_feature_avx512vbmi2 (UINT64_C(1) << 25) |
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| 57 | #define cpu_feature_shstk (UINT64_C(1) << 26) |
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| 58 | #define cpu_feature_gfni (UINT64_C(1) << 27) |
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| 59 | #define cpu_feature_vaes (UINT64_C(1) << 28) |
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| 60 | #define cpu_feature_avx512bitalg (UINT64_C(1) << 29) |
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| 61 | #define cpu_feature_avx512vpopcntdq (UINT64_C(1) << 30) |
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| 62 | |
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| 63 | // in CPUID Leaf 7, Sub-leaf 0, EDX: |
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| 64 | #define cpu_feature_hybrid (UINT64_C(1) << 31) |
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| 65 | #define cpu_feature_ibt (UINT64_C(1) << 32) |
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| 66 | #define cpu_feature_avx512fp16 (UINT64_C(1) << 33) |
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| 67 | |
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| 68 | // in CPUID Leaf 7, Sub-leaf 1, EAX: |
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| 69 | #define cpu_feature_raoint (UINT64_C(1) << 34) |
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| 70 | #define cpu_feature_cmpccxadd (UINT64_C(1) << 35) |
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| 71 | #define cpu_feature_avxifma (UINT64_C(1) << 36) |
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| 72 | #define cpu_feature_lam (UINT64_C(1) << 37) |
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| 73 | |
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| 74 | // CPU architectures |
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| 75 | #define cpu_x86_64 (0 \ |
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| 76 | | cpu_feature_sse2) |
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| 77 | #define cpu_core2 (cpu_x86_64 \ |
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| 78 | | cpu_feature_sse3 \ |
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| 79 | | cpu_feature_ssse3) |
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| 80 | #define cpu_nhm (cpu_core2 \ |
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| 81 | | cpu_feature_sse4_1 \ |
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| 82 | | cpu_feature_sse4_2 \ |
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| 83 | | cpu_feature_popcnt) |
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| 84 | #define cpu_wsm (cpu_nhm) |
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| 85 | #define cpu_snb (cpu_wsm \ |
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| 86 | | cpu_feature_avx) |
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| 87 | #define cpu_ivb (cpu_snb \ |
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| 88 | | cpu_feature_f16c) |
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| 89 | #define cpu_hsw (cpu_ivb \ |
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| 90 | | cpu_feature_avx2 \ |
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| 91 | | cpu_feature_fma \ |
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| 92 | | cpu_feature_bmi \ |
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| 93 | | cpu_feature_bmi2 \ |
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| 94 | | cpu_feature_movbe) |
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| 95 | #define cpu_bdw (cpu_hsw) |
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| 96 | #define cpu_bdx (cpu_bdw) |
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| 97 | #define cpu_skl (cpu_bdw) |
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| 98 | #define cpu_skx (cpu_skl \ |
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| 99 | | cpu_feature_avx512f \ |
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| 100 | | cpu_feature_avx512dq \ |
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| 101 | | cpu_feature_avx512cd \ |
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| 102 | | cpu_feature_avx512bw \ |
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| 103 | | cpu_feature_avx512vl) |
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| 104 | #define cpu_clx (cpu_skx) |
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| 105 | #define cpu_cpx (cpu_clx) |
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| 106 | #define cpu_plc (cpu_skx \ |
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| 107 | | cpu_feature_avx512ifma \ |
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| 108 | | cpu_feature_avx512vbmi) |
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| 109 | #define cpu_snc (cpu_plc \ |
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| 110 | | cpu_feature_avx512vbmi2 \ |
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| 111 | | cpu_feature_gfni \ |
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| 112 | | cpu_feature_vaes \ |
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| 113 | | cpu_feature_avx512bitalg \ |
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| 114 | | cpu_feature_avx512vpopcntdq) |
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| 115 | #define cpu_wlc (cpu_snc \ |
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| 116 | | cpu_feature_shstk \ |
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| 117 | | cpu_feature_ibt) |
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| 118 | #define cpu_glc (cpu_wlc \ |
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| 119 | | cpu_feature_waitpkg) |
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| 120 | #define cpu_rpc (cpu_glc) |
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| 121 | #define cpu_rwc (cpu_rpc) |
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| 122 | #define cpu_slm (cpu_wsm \ |
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| 123 | | cpu_feature_rdrnd \ |
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| 124 | | cpu_feature_movbe) |
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| 125 | #define cpu_glm (cpu_slm \ |
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| 126 | | cpu_feature_rdseed) |
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| 127 | #define cpu_tnt (cpu_glm \ |
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| 128 | | cpu_feature_gfni \ |
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| 129 | | cpu_feature_waitpkg) |
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| 130 | #define cpu_grt (cpu_skl \ |
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| 131 | | cpu_feature_gfni \ |
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| 132 | | cpu_feature_vaes \ |
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| 133 | | cpu_feature_shstk \ |
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| 134 | | cpu_feature_ibt \ |
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| 135 | | cpu_feature_waitpkg) |
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| 136 | #define cpu_cmt (cpu_grt \ |
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| 137 | | cpu_feature_cmpccxadd \ |
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| 138 | | cpu_feature_avxifma) |
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| 139 | #define cpu_cnl (cpu_plc) |
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| 140 | #define cpu_icl (cpu_snc) |
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| 141 | #define cpu_tgl (cpu_wlc) |
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| 142 | #define cpu_adl (cpu_grt) |
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| 143 | #define cpu_rpl (cpu_grt) |
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| 144 | #define cpu_mtl (cpu_cmt) |
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| 145 | #define cpu_arl (cpu_cmt) |
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| 146 | #define cpu_lnl (cpu_cmt) |
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| 147 | #define cpu_icx (cpu_snc) |
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| 148 | #define cpu_spr (cpu_glc) |
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| 149 | #define cpu_emr (cpu_spr) |
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| 150 | #define cpu_gnr (cpu_glc) |
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| 151 | #define cpu_srf (cpu_cmt \ |
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| 152 | | cpu_feature_cmpccxadd \ |
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| 153 | | cpu_feature_avxifma) |
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| 154 | #define cpu_grr (cpu_srf \ |
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| 155 | | cpu_feature_raoint) |
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| 156 | #define cpu_cwf (cpu_srf) |
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| 157 | #define cpu_nehalem (cpu_nhm) |
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| 158 | #define cpu_westmere (cpu_wsm) |
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| 159 | #define cpu_sandybridge (cpu_snb) |
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| 160 | #define cpu_ivybridge (cpu_ivb) |
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| 161 | #define cpu_haswell (cpu_hsw) |
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| 162 | #define cpu_broadwell (cpu_bdw) |
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| 163 | #define cpu_skylake (cpu_skl) |
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| 164 | #define cpu_skylake_avx512 (cpu_skx) |
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| 165 | #define cpu_cascadelake (cpu_clx) |
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| 166 | #define cpu_cooperlake (cpu_cpx) |
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| 167 | #define cpu_palmcove (cpu_plc) |
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| 168 | #define cpu_cannonlake (cpu_cnl) |
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| 169 | #define cpu_sunnycove (cpu_snc) |
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| 170 | #define cpu_icelake_client (cpu_icl) |
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| 171 | #define cpu_icelake_server (cpu_icx) |
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| 172 | #define cpu_willowcove (cpu_wlc) |
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| 173 | #define cpu_tigerlake (cpu_tgl) |
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| 174 | #define cpu_goldencove (cpu_glc) |
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| 175 | #define cpu_alderlake (cpu_adl) |
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| 176 | #define cpu_raptorcove (cpu_rpc) |
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| 177 | #define cpu_raptorlake (cpu_rpl) |
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| 178 | #define cpu_redwoodcove (cpu_rwc) |
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| 179 | #define cpu_meteorlake (cpu_mtl) |
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| 180 | #define cpu_arrowlake (cpu_arl) |
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| 181 | #define cpu_lunarlake (cpu_lnl) |
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| 182 | #define cpu_sapphirerapids (cpu_spr) |
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| 183 | #define cpu_emeraldrapids (cpu_emr) |
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| 184 | #define cpu_graniterapids (cpu_gnr) |
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| 185 | #define cpu_silvermont (cpu_slm) |
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| 186 | #define cpu_goldmont (cpu_glm) |
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| 187 | #define cpu_tremont (cpu_tnt) |
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| 188 | #define cpu_gracemont (cpu_grt) |
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| 189 | #define cpu_crestmont (cpu_cmt) |
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| 190 | #define cpu_grandridge (cpu_grr) |
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| 191 | #define cpu_sierraforest (cpu_srf) |
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| 192 | #define cpu_clearwaterforest (cpu_cwf) |
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| 193 | |
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| 194 | // __attribute__ target strings for GCC and Clang |
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| 195 | #define QT_FUNCTION_TARGET_STRING_SSE2 "sse2" |
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| 196 | #define QT_FUNCTION_TARGET_STRING_SSE3 "sse3" |
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| 197 | #define QT_FUNCTION_TARGET_STRING_SSSE3 "ssse3" |
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| 198 | #define QT_FUNCTION_TARGET_STRING_FMA "fma" |
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| 199 | #define QT_FUNCTION_TARGET_STRING_SSE4_1 "sse4.1" |
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| 200 | #define QT_FUNCTION_TARGET_STRING_SSE4_2 "sse4.2" |
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| 201 | #define QT_FUNCTION_TARGET_STRING_MOVBE "movbe" |
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| 202 | #define QT_FUNCTION_TARGET_STRING_POPCNT "popcnt" |
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| 203 | #define QT_FUNCTION_TARGET_STRING_AES "aes,sse4.2" |
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| 204 | #define QT_FUNCTION_TARGET_STRING_AVX "avx" |
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| 205 | #define QT_FUNCTION_TARGET_STRING_F16C "f16c,avx" |
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| 206 | #define QT_FUNCTION_TARGET_STRING_RDRND "rdrnd" |
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| 207 | #define QT_FUNCTION_TARGET_STRING_BMI "bmi" |
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| 208 | #define QT_FUNCTION_TARGET_STRING_AVX2 "avx2,avx" |
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| 209 | #define QT_FUNCTION_TARGET_STRING_BMI2 "bmi2" |
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| 210 | #define QT_FUNCTION_TARGET_STRING_AVX512F "avx512f,avx" |
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| 211 | #define QT_FUNCTION_TARGET_STRING_AVX512DQ "avx512dq,avx512f" |
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| 212 | #define QT_FUNCTION_TARGET_STRING_RDSEED "rdseed" |
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| 213 | #define QT_FUNCTION_TARGET_STRING_AVX512IFMA "avx512ifma,avx512f" |
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| 214 | #define QT_FUNCTION_TARGET_STRING_AVX512CD "avx512cd,avx512f" |
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| 215 | #define QT_FUNCTION_TARGET_STRING_SHA "sha" |
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| 216 | #define QT_FUNCTION_TARGET_STRING_AVX512BW "avx512bw,avx512f" |
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| 217 | #define QT_FUNCTION_TARGET_STRING_AVX512VL "avx512vl,avx512f" |
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| 218 | #define QT_FUNCTION_TARGET_STRING_AVX512VBMI "avx512vbmi,avx512f" |
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| 219 | #define QT_FUNCTION_TARGET_STRING_WAITPKG "waitpkg" |
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| 220 | #define QT_FUNCTION_TARGET_STRING_AVX512VBMI2 "avx512vbmi2,avx512f" |
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| 221 | #define QT_FUNCTION_TARGET_STRING_SHSTK "shstk" |
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| 222 | #define QT_FUNCTION_TARGET_STRING_GFNI "gfni" |
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| 223 | #define QT_FUNCTION_TARGET_STRING_VAES "vaes,avx2,avx,aes" |
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| 224 | #define QT_FUNCTION_TARGET_STRING_AVX512BITALG "avx512bitalg,avx512f" |
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| 225 | #define QT_FUNCTION_TARGET_STRING_AVX512VPOPCNTDQ "avx512vpopcntdq,avx512f" |
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| 226 | #define QT_FUNCTION_TARGET_STRING_HYBRID "hybrid" |
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| 227 | #define QT_FUNCTION_TARGET_STRING_IBT "ibt" |
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| 228 | #define QT_FUNCTION_TARGET_STRING_AVX512FP16 "avx512fp16,avx512f,f16c" |
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| 229 | #define QT_FUNCTION_TARGET_STRING_RAOINT "raoint" |
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| 230 | #define QT_FUNCTION_TARGET_STRING_CMPCCXADD "cmpccxadd" |
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| 231 | #define QT_FUNCTION_TARGET_STRING_AVXIFMA "avxifma,avx" |
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| 232 | #define QT_FUNCTION_TARGET_STRING_LAM "lam" |
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| 233 | #define QT_FUNCTION_TARGET_STRING_ARCH_X86_64 "sse2" |
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| 234 | #define QT_FUNCTION_TARGET_STRING_ARCH_CORE2 QT_FUNCTION_TARGET_STRING_ARCH_X86_64 ",sse3,ssse3,cx16" |
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| 235 | #define QT_FUNCTION_TARGET_STRING_ARCH_NHM QT_FUNCTION_TARGET_STRING_ARCH_CORE2 ",sse4.1,sse4.2,popcnt" |
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| 236 | #define QT_FUNCTION_TARGET_STRING_ARCH_WSM QT_FUNCTION_TARGET_STRING_ARCH_NHM |
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| 237 | #define QT_FUNCTION_TARGET_STRING_ARCH_SNB QT_FUNCTION_TARGET_STRING_ARCH_WSM ",avx" |
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| 238 | #define QT_FUNCTION_TARGET_STRING_ARCH_IVB QT_FUNCTION_TARGET_STRING_ARCH_SNB ",f16c,fsgsbase" |
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| 239 | #define QT_FUNCTION_TARGET_STRING_ARCH_HSW QT_FUNCTION_TARGET_STRING_ARCH_IVB ",avx2,fma,bmi,bmi2,lzcnt,movbe" |
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| 240 | #define QT_FUNCTION_TARGET_STRING_ARCH_BDW QT_FUNCTION_TARGET_STRING_ARCH_HSW ",adx" |
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| 241 | #define QT_FUNCTION_TARGET_STRING_ARCH_BDX QT_FUNCTION_TARGET_STRING_ARCH_BDW |
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| 242 | #define QT_FUNCTION_TARGET_STRING_ARCH_SKL QT_FUNCTION_TARGET_STRING_ARCH_BDW ",xsavec,xsaves" |
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| 243 | #define QT_FUNCTION_TARGET_STRING_ARCH_SKX QT_FUNCTION_TARGET_STRING_ARCH_SKL ",avx512f,avx512dq,avx512cd,avx512bw,avx512vl" |
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| 244 | #define QT_FUNCTION_TARGET_STRING_ARCH_CLX QT_FUNCTION_TARGET_STRING_ARCH_SKX ",avx512vnni" |
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| 245 | #define QT_FUNCTION_TARGET_STRING_ARCH_CPX QT_FUNCTION_TARGET_STRING_ARCH_CLX ",avx512bf16" |
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| 246 | #define QT_FUNCTION_TARGET_STRING_ARCH_PLC QT_FUNCTION_TARGET_STRING_ARCH_SKX ",avx512ifma,avx512vbmi" |
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| 247 | #define QT_FUNCTION_TARGET_STRING_ARCH_SNC QT_FUNCTION_TARGET_STRING_ARCH_PLC ",avx512vbmi2,gfni,vaes,vpclmulqdq,avx512vnni,avx512bitalg,avx512vpopcntdq" |
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| 248 | #define QT_FUNCTION_TARGET_STRING_ARCH_WLC QT_FUNCTION_TARGET_STRING_ARCH_SNC ",shstk,movdiri,movdir64b,ibt,keylocker" |
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| 249 | #define QT_FUNCTION_TARGET_STRING_ARCH_GLC QT_FUNCTION_TARGET_STRING_ARCH_WLC ",avx512bf16,avxvnni,cldemote,waitpkg,serialize,uintr" |
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| 250 | #define QT_FUNCTION_TARGET_STRING_ARCH_RPC QT_FUNCTION_TARGET_STRING_ARCH_GLC |
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| 251 | #define QT_FUNCTION_TARGET_STRING_ARCH_RWC QT_FUNCTION_TARGET_STRING_ARCH_RPC ",prefetchiti" |
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| 252 | #define QT_FUNCTION_TARGET_STRING_ARCH_SLM QT_FUNCTION_TARGET_STRING_ARCH_WSM ",rdrnd,movbe" |
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| 253 | #define QT_FUNCTION_TARGET_STRING_ARCH_GLM QT_FUNCTION_TARGET_STRING_ARCH_SLM ",fsgsbase,rdseed,lzcnt,xsavec,xsaves" |
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| 254 | #define QT_FUNCTION_TARGET_STRING_ARCH_TNT QT_FUNCTION_TARGET_STRING_ARCH_GLM ",clwb,gfni,cldemote,waitpkg,movdiri,movdir64b" |
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| 255 | #define QT_FUNCTION_TARGET_STRING_ARCH_GRT QT_FUNCTION_TARGET_STRING_ARCH_SKL ",avxvnni,gfni,vaes,vpclmulqdq,serialize,shstk,cldemote,movdiri,movdir64b,ibt,waitpkg,keylocker" |
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| 256 | #define QT_FUNCTION_TARGET_STRING_ARCH_CMT QT_FUNCTION_TARGET_STRING_ARCH_GRT ",cmpccxadd,avxifma,avxneconvert,avxvnniint8" |
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| 257 | #define QT_FUNCTION_TARGET_STRING_ARCH_CNL QT_FUNCTION_TARGET_STRING_ARCH_PLC |
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| 258 | #define QT_FUNCTION_TARGET_STRING_ARCH_ICL QT_FUNCTION_TARGET_STRING_ARCH_SNC |
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| 259 | #define QT_FUNCTION_TARGET_STRING_ARCH_TGL QT_FUNCTION_TARGET_STRING_ARCH_WLC |
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| 260 | #define QT_FUNCTION_TARGET_STRING_ARCH_ADL QT_FUNCTION_TARGET_STRING_ARCH_GRT |
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| 261 | #define QT_FUNCTION_TARGET_STRING_ARCH_RPL QT_FUNCTION_TARGET_STRING_ARCH_GRT |
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| 262 | #define QT_FUNCTION_TARGET_STRING_ARCH_MTL QT_FUNCTION_TARGET_STRING_ARCH_CMT |
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| 263 | #define QT_FUNCTION_TARGET_STRING_ARCH_ARL QT_FUNCTION_TARGET_STRING_ARCH_CMT |
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| 264 | #define QT_FUNCTION_TARGET_STRING_ARCH_LNL QT_FUNCTION_TARGET_STRING_ARCH_CMT |
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| 265 | #define QT_FUNCTION_TARGET_STRING_ARCH_ICX QT_FUNCTION_TARGET_STRING_ARCH_SNC ",pconfig" |
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| 266 | #define QT_FUNCTION_TARGET_STRING_ARCH_SPR QT_FUNCTION_TARGET_STRING_ARCH_GLC ",pconfig,amx-tile,amx-bf16,amx-int8" |
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| 267 | #define QT_FUNCTION_TARGET_STRING_ARCH_EMR QT_FUNCTION_TARGET_STRING_ARCH_SPR |
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| 268 | #define QT_FUNCTION_TARGET_STRING_ARCH_GNR QT_FUNCTION_TARGET_STRING_ARCH_GLC ",pconfig,amx-tile,amx-bf16,amx-int8,amx-fp16,amx-complex" |
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| 269 | #define QT_FUNCTION_TARGET_STRING_ARCH_SRF QT_FUNCTION_TARGET_STRING_ARCH_CMT ",cmpccxadd,avxifma,avxneconvert,avxvnniint8" |
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| 270 | #define QT_FUNCTION_TARGET_STRING_ARCH_GRR QT_FUNCTION_TARGET_STRING_ARCH_SRF ",raoint" |
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| 271 | #define QT_FUNCTION_TARGET_STRING_ARCH_CWF QT_FUNCTION_TARGET_STRING_ARCH_SRF |
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| 272 | #define QT_FUNCTION_TARGET_STRING_ARCH_NEHALEM QT_FUNCTION_TARGET_STRING_ARCH_NHM |
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| 273 | #define QT_FUNCTION_TARGET_STRING_ARCH_WESTMERE QT_FUNCTION_TARGET_STRING_ARCH_WSM |
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| 274 | #define QT_FUNCTION_TARGET_STRING_ARCH_SANDYBRIDGE QT_FUNCTION_TARGET_STRING_ARCH_SNB |
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| 275 | #define QT_FUNCTION_TARGET_STRING_ARCH_IVYBRIDGE QT_FUNCTION_TARGET_STRING_ARCH_IVB |
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| 276 | #define QT_FUNCTION_TARGET_STRING_ARCH_HASWELL QT_FUNCTION_TARGET_STRING_ARCH_HSW |
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| 277 | #define QT_FUNCTION_TARGET_STRING_ARCH_BROADWELL QT_FUNCTION_TARGET_STRING_ARCH_BDW |
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| 278 | #define QT_FUNCTION_TARGET_STRING_ARCH_SKYLAKE QT_FUNCTION_TARGET_STRING_ARCH_SKL |
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| 279 | #define QT_FUNCTION_TARGET_STRING_ARCH_SKYLAKE_AVX512 QT_FUNCTION_TARGET_STRING_ARCH_SKX |
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| 280 | #define QT_FUNCTION_TARGET_STRING_ARCH_CASCADELAKE QT_FUNCTION_TARGET_STRING_ARCH_CLX |
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| 281 | #define QT_FUNCTION_TARGET_STRING_ARCH_COOPERLAKE QT_FUNCTION_TARGET_STRING_ARCH_CPX |
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| 282 | #define QT_FUNCTION_TARGET_STRING_ARCH_PALMCOVE QT_FUNCTION_TARGET_STRING_ARCH_PLC |
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| 283 | #define QT_FUNCTION_TARGET_STRING_ARCH_CANNONLAKE QT_FUNCTION_TARGET_STRING_ARCH_CNL |
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| 284 | #define QT_FUNCTION_TARGET_STRING_ARCH_SUNNYCOVE QT_FUNCTION_TARGET_STRING_ARCH_SNC |
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| 285 | #define QT_FUNCTION_TARGET_STRING_ARCH_ICELAKE_CLIENT QT_FUNCTION_TARGET_STRING_ARCH_ICL |
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| 286 | #define QT_FUNCTION_TARGET_STRING_ARCH_ICELAKE_SERVER QT_FUNCTION_TARGET_STRING_ARCH_ICX |
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| 287 | #define QT_FUNCTION_TARGET_STRING_ARCH_WILLOWCOVE QT_FUNCTION_TARGET_STRING_ARCH_WLC |
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| 288 | #define QT_FUNCTION_TARGET_STRING_ARCH_TIGERLAKE QT_FUNCTION_TARGET_STRING_ARCH_TGL |
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| 289 | #define QT_FUNCTION_TARGET_STRING_ARCH_GOLDENCOVE QT_FUNCTION_TARGET_STRING_ARCH_GLC |
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| 290 | #define QT_FUNCTION_TARGET_STRING_ARCH_ALDERLAKE QT_FUNCTION_TARGET_STRING_ARCH_ADL |
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| 291 | #define QT_FUNCTION_TARGET_STRING_ARCH_RAPTORCOVE QT_FUNCTION_TARGET_STRING_ARCH_RPC |
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| 292 | #define QT_FUNCTION_TARGET_STRING_ARCH_RAPTORLAKE QT_FUNCTION_TARGET_STRING_ARCH_RPL |
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| 293 | #define QT_FUNCTION_TARGET_STRING_ARCH_REDWOODCOVE QT_FUNCTION_TARGET_STRING_ARCH_RWC |
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| 294 | #define QT_FUNCTION_TARGET_STRING_ARCH_METEORLAKE QT_FUNCTION_TARGET_STRING_ARCH_MTL |
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| 295 | #define QT_FUNCTION_TARGET_STRING_ARCH_ARROWLAKE QT_FUNCTION_TARGET_STRING_ARCH_ARL |
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| 296 | #define QT_FUNCTION_TARGET_STRING_ARCH_LUNARLAKE QT_FUNCTION_TARGET_STRING_ARCH_LNL |
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| 297 | #define QT_FUNCTION_TARGET_STRING_ARCH_SAPPHIRERAPIDS QT_FUNCTION_TARGET_STRING_ARCH_SPR |
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| 298 | #define QT_FUNCTION_TARGET_STRING_ARCH_EMERALDRAPIDS QT_FUNCTION_TARGET_STRING_ARCH_EMR |
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| 299 | #define QT_FUNCTION_TARGET_STRING_ARCH_GRANITERAPIDS QT_FUNCTION_TARGET_STRING_ARCH_GNR |
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| 300 | #define QT_FUNCTION_TARGET_STRING_ARCH_SILVERMONT QT_FUNCTION_TARGET_STRING_ARCH_SLM |
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| 301 | #define QT_FUNCTION_TARGET_STRING_ARCH_GOLDMONT QT_FUNCTION_TARGET_STRING_ARCH_GLM |
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| 302 | #define QT_FUNCTION_TARGET_STRING_ARCH_TREMONT QT_FUNCTION_TARGET_STRING_ARCH_TNT |
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| 303 | #define QT_FUNCTION_TARGET_STRING_ARCH_GRACEMONT QT_FUNCTION_TARGET_STRING_ARCH_GRT |
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| 304 | #define QT_FUNCTION_TARGET_STRING_ARCH_CRESTMONT QT_FUNCTION_TARGET_STRING_ARCH_CMT |
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| 305 | #define QT_FUNCTION_TARGET_STRING_ARCH_GRANDRIDGE QT_FUNCTION_TARGET_STRING_ARCH_GRR |
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| 306 | #define QT_FUNCTION_TARGET_STRING_ARCH_SIERRAFOREST QT_FUNCTION_TARGET_STRING_ARCH_SRF |
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| 307 | #define QT_FUNCTION_TARGET_STRING_ARCH_CLEARWATERFOREST QT_FUNCTION_TARGET_STRING_ARCH_CWF |
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| 308 | |
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| 309 | static const uint64_t _compilerCpuFeatures = 0 |
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| 310 | #ifdef __SSE2__ |
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| 311 | | cpu_feature_sse2 |
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| 312 | #endif |
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| 313 | #ifdef __SSE3__ |
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| 314 | | cpu_feature_sse3 |
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| 315 | #endif |
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| 316 | #ifdef __SSSE3__ |
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| 317 | | cpu_feature_ssse3 |
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| 318 | #endif |
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| 319 | #ifdef __FMA__ |
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| 320 | | cpu_feature_fma |
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| 321 | #endif |
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| 322 | #ifdef __SSE4_1__ |
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| 323 | | cpu_feature_sse4_1 |
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| 324 | #endif |
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| 325 | #ifdef __SSE4_2__ |
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| 326 | | cpu_feature_sse4_2 |
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| 327 | #endif |
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| 328 | #ifdef __MOVBE__ |
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| 329 | | cpu_feature_movbe |
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| 330 | #endif |
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| 331 | #ifdef __POPCNT__ |
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| 332 | | cpu_feature_popcnt |
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| 333 | #endif |
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| 334 | #ifdef __AES__ |
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| 335 | | cpu_feature_aes |
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| 336 | #endif |
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| 337 | #ifdef __AVX__ |
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| 338 | | cpu_feature_avx |
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| 339 | #endif |
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| 340 | #ifdef __F16C__ |
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| 341 | | cpu_feature_f16c |
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| 342 | #endif |
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| 343 | #ifdef __RDRND__ |
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| 344 | | cpu_feature_rdrnd |
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| 345 | #endif |
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| 346 | #ifdef __BMI__ |
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| 347 | | cpu_feature_bmi |
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| 348 | #endif |
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| 349 | #ifdef __AVX2__ |
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| 350 | | cpu_feature_avx2 |
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| 351 | #endif |
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| 352 | #ifdef __BMI2__ |
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| 353 | | cpu_feature_bmi2 |
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| 354 | #endif |
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| 355 | #ifdef __AVX512F__ |
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| 356 | | cpu_feature_avx512f |
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| 357 | #endif |
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| 358 | #ifdef __AVX512DQ__ |
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| 359 | | cpu_feature_avx512dq |
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| 360 | #endif |
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| 361 | #ifdef __RDSEED__ |
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| 362 | | cpu_feature_rdseed |
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| 363 | #endif |
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| 364 | #ifdef __AVX512IFMA__ |
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| 365 | | cpu_feature_avx512ifma |
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| 366 | #endif |
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| 367 | #ifdef __AVX512CD__ |
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| 368 | | cpu_feature_avx512cd |
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| 369 | #endif |
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| 370 | #ifdef __SHA__ |
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| 371 | | cpu_feature_sha |
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| 372 | #endif |
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| 373 | #ifdef __AVX512BW__ |
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| 374 | | cpu_feature_avx512bw |
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| 375 | #endif |
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| 376 | #ifdef __AVX512VL__ |
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| 377 | | cpu_feature_avx512vl |
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| 378 | #endif |
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| 379 | #ifdef __AVX512VBMI__ |
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| 380 | | cpu_feature_avx512vbmi |
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| 381 | #endif |
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| 382 | #ifdef __WAITPKG__ |
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| 383 | | cpu_feature_waitpkg |
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| 384 | #endif |
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| 385 | #ifdef __AVX512VBMI2__ |
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| 386 | | cpu_feature_avx512vbmi2 |
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| 387 | #endif |
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| 388 | #ifdef __SHSTK__ |
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| 389 | | cpu_feature_shstk |
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| 390 | #endif |
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| 391 | #ifdef __GFNI__ |
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| 392 | | cpu_feature_gfni |
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| 393 | #endif |
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| 394 | #ifdef __VAES__ |
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| 395 | | cpu_feature_vaes |
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| 396 | #endif |
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| 397 | #ifdef __AVX512BITALG__ |
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| 398 | | cpu_feature_avx512bitalg |
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| 399 | #endif |
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| 400 | #ifdef __AVX512VPOPCNTDQ__ |
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| 401 | | cpu_feature_avx512vpopcntdq |
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| 402 | #endif |
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| 403 | #ifdef __HYBRID__ |
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| 404 | | cpu_feature_hybrid |
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| 405 | #endif |
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| 406 | #ifdef __IBT__ |
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| 407 | | cpu_feature_ibt |
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| 408 | #endif |
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| 409 | #ifdef __AVX512FP16__ |
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| 410 | | cpu_feature_avx512fp16 |
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| 411 | #endif |
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| 412 | #ifdef __RAOINT__ |
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| 413 | | cpu_feature_raoint |
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| 414 | #endif |
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| 415 | #ifdef __CMPCCXADD__ |
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| 416 | | cpu_feature_cmpccxadd |
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| 417 | #endif |
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| 418 | #ifdef __AVXIFMA__ |
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| 419 | | cpu_feature_avxifma |
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| 420 | #endif |
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| 421 | #ifdef __LAM__ |
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| 422 | | cpu_feature_lam |
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| 423 | #endif |
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| 424 | ; |
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| 425 | |
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| 426 | #if (defined __cplusplus) && __cplusplus >= 201103L |
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| 427 | enum X86CpuFeatures : uint64_t { |
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| 428 | CpuFeatureSSE2 = cpu_feature_sse2, ///< Streaming SIMD Extensions 2 |
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| 429 | CpuFeatureSSE3 = cpu_feature_sse3, ///< Streaming SIMD Extensions 3 |
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| 430 | CpuFeatureSSSE3 = cpu_feature_ssse3, ///< Supplemental Streaming SIMD Extensions 3 |
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| 431 | CpuFeatureFMA = cpu_feature_fma, ///< Fused Multiply-Add |
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| 432 | CpuFeatureSSE4_1 = cpu_feature_sse4_1, ///< Streaming SIMD Extensions 4.1 |
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| 433 | CpuFeatureSSE4_2 = cpu_feature_sse4_2, ///< Streaming SIMD Extensions 4.2 |
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| 434 | CpuFeatureMOVBE = cpu_feature_movbe, ///< MOV Big Endian |
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| 435 | CpuFeaturePOPCNT = cpu_feature_popcnt, ///< Population count |
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| 436 | CpuFeatureAES = cpu_feature_aes, ///< Advenced Encryption Standard |
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| 437 | CpuFeatureAVX = cpu_feature_avx, ///< Advanced Vector Extensions |
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| 438 | CpuFeatureF16C = cpu_feature_f16c, ///< 16-bit Float Conversion |
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| 439 | CpuFeatureRDRND = cpu_feature_rdrnd, ///< Random number generator |
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| 440 | CpuFeatureBMI = cpu_feature_bmi, ///< Bit Manipulation Instructions |
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| 441 | CpuFeatureAVX2 = cpu_feature_avx2, ///< Advanced Vector Extensions 2 |
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| 442 | CpuFeatureBMI2 = cpu_feature_bmi2, ///< Bit Manipulation Instructions 2 |
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| 443 | CpuFeatureAVX512F = cpu_feature_avx512f, ///< AVX512 Foundation |
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| 444 | CpuFeatureAVX512DQ = cpu_feature_avx512dq, ///< AVX512 Double & Quadword |
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| 445 | CpuFeatureRDSEED = cpu_feature_rdseed, ///< Random number generator for seeding |
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| 446 | CpuFeatureAVX512IFMA = cpu_feature_avx512ifma, ///< AVX512 Integer Fused Multiply-Add |
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| 447 | CpuFeatureAVX512CD = cpu_feature_avx512cd, ///< AVX512 Conflict Detection |
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| 448 | CpuFeatureSHA = cpu_feature_sha, ///< SHA-1 and SHA-256 instructions |
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| 449 | CpuFeatureAVX512BW = cpu_feature_avx512bw, ///< AVX512 Byte & Word |
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| 450 | CpuFeatureAVX512VL = cpu_feature_avx512vl, ///< AVX512 Vector Length |
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| 451 | CpuFeatureAVX512VBMI = cpu_feature_avx512vbmi, ///< AVX512 Vector Byte Manipulation Instructions |
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| 452 | CpuFeatureWAITPKG = cpu_feature_waitpkg, ///< User-Level Monitor / Wait |
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| 453 | CpuFeatureAVX512VBMI2 = cpu_feature_avx512vbmi2, ///< AVX512 Vector Byte Manipulation Instructions 2 |
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| 454 | CpuFeatureSHSTK = cpu_feature_shstk, ///< Control Flow Enforcement Technology Shadow Stack |
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| 455 | CpuFeatureGFNI = cpu_feature_gfni, ///< Galois Field new instructions |
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| 456 | CpuFeatureVAES = cpu_feature_vaes, ///< 256- and 512-bit AES |
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| 457 | CpuFeatureAVX512BITALG = cpu_feature_avx512bitalg, ///< AVX512 Bit Algorithms |
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| 458 | CpuFeatureAVX512VPOPCNTDQ = cpu_feature_avx512vpopcntdq, ///< AVX512 Population Count |
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| 459 | CpuFeatureHYBRID = cpu_feature_hybrid, ///< Hybrid processor |
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| 460 | CpuFeatureIBT = cpu_feature_ibt, ///< Control Flow Enforcement Technology Indirect Branch Tracking |
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| 461 | CpuFeatureAVX512FP16 = cpu_feature_avx512fp16, ///< AVX512 16-bit Floating Point |
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| 462 | CpuFeatureRAOINT = cpu_feature_raoint, ///< Remote Atomic Operations, Integer |
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| 463 | CpuFeatureCMPCCXADD = cpu_feature_cmpccxadd, ///< CMPccXADD instructions |
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| 464 | CpuFeatureAVXIFMA = cpu_feature_avxifma, ///< AVX-IFMA instructions |
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| 465 | CpuFeatureLAM = cpu_feature_lam, ///< Linear Address Masking |
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| 466 | }; // enum X86CpuFeatures |
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| 467 | |
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| 468 | enum X86CpuArchitectures : uint64_t { |
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| 469 | CpuArchx8664 = cpu_x86_64, |
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| 470 | CpuArchCore2 = cpu_core2, |
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| 471 | CpuArchNHM = cpu_nhm, |
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| 472 | CpuArchWSM = cpu_wsm, |
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| 473 | CpuArchSNB = cpu_snb, |
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| 474 | CpuArchIVB = cpu_ivb, ///< rdrnd |
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| 475 | CpuArchHSW = cpu_hsw, ///< hle,rtm |
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| 476 | CpuArchBDW = cpu_bdw, ///< rdseed |
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| 477 | CpuArchBDX = cpu_bdx, |
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| 478 | CpuArchSKL = cpu_skl, |
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| 479 | CpuArchSKX = cpu_skx, ///< clwb |
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| 480 | CpuArchCLX = cpu_clx, |
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| 481 | CpuArchCPX = cpu_cpx, |
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| 482 | CpuArchPLC = cpu_plc, ///< sha |
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| 483 | CpuArchSNC = cpu_snc, ///< fsrm,rdpid |
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| 484 | CpuArchWLC = cpu_wlc, ///< avx512vp2intersect |
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| 485 | CpuArchGLC = cpu_glc, ///< tsxldtrk |
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| 486 | CpuArchRPC = cpu_rpc, |
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| 487 | CpuArchRWC = cpu_rwc, |
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| 488 | CpuArchSLM = cpu_slm, |
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| 489 | CpuArchGLM = cpu_glm, |
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| 490 | CpuArchTNT = cpu_tnt, |
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| 491 | CpuArchGRT = cpu_grt, ///< rdpid |
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| 492 | CpuArchCMT = cpu_cmt, |
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| 493 | CpuArchCNL = cpu_cnl, |
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| 494 | CpuArchICL = cpu_icl, |
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| 495 | CpuArchTGL = cpu_tgl, |
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| 496 | CpuArchADL = cpu_adl, |
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| 497 | CpuArchRPL = cpu_rpl, |
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| 498 | CpuArchMTL = cpu_mtl, |
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| 499 | CpuArchARL = cpu_arl, |
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| 500 | CpuArchLNL = cpu_lnl, |
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| 501 | CpuArchICX = cpu_icx, |
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| 502 | CpuArchSPR = cpu_spr, |
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| 503 | CpuArchEMR = cpu_emr, |
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| 504 | CpuArchGNR = cpu_gnr, |
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| 505 | CpuArchSRF = cpu_srf, |
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| 506 | CpuArchGRR = cpu_grr, |
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| 507 | CpuArchCWF = cpu_cwf, |
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| 508 | CpuArchNehalem = cpu_nehalem, ///< Intel Core i3/i5/i7 |
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| 509 | CpuArchWestmere = cpu_westmere, ///< Intel Core i3/i5/i7 |
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| 510 | CpuArchSandyBridge = cpu_sandybridge, ///< Second Generation Intel Core i3/i5/i7 |
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| 511 | CpuArchIvyBridge = cpu_ivybridge, ///< Third Generation Intel Core i3/i5/i7 |
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| 512 | CpuArchHaswell = cpu_haswell, ///< Fourth Generation Intel Core i3/i5/i7 |
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| 513 | CpuArchBroadwell = cpu_broadwell, ///< Fifth Generation Intel Core i3/i5/i7 |
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| 514 | CpuArchSkylake = cpu_skylake, ///< Sixth Generation Intel Core i3/i5/i7 |
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| 515 | CpuArchSkylakeAvx512 = cpu_skylake_avx512, ///< Intel Xeon Scalable |
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| 516 | CpuArchCascadeLake = cpu_cascadelake, ///< Second Generation Intel Xeon Scalable |
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| 517 | CpuArchCooperLake = cpu_cooperlake, ///< Third Generation Intel Xeon Scalable |
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| 518 | CpuArchPalmCove = cpu_palmcove, |
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| 519 | CpuArchCannonLake = cpu_cannonlake, ///< Intel Core i3-8121U |
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| 520 | CpuArchSunnyCove = cpu_sunnycove, |
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| 521 | CpuArchIceLakeClient = cpu_icelake_client, ///< Tenth Generation Intel Core i3/i5/i7 |
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| 522 | CpuArchIceLakeServer = cpu_icelake_server, ///< Third Generation Intel Xeon Scalable |
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| 523 | CpuArchWillowCove = cpu_willowcove, |
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| 524 | CpuArchTigerLake = cpu_tigerlake, ///< Eleventh Generation Intel Core i3/i5/i7 |
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| 525 | CpuArchGoldenCove = cpu_goldencove, |
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| 526 | CpuArchAlderLake = cpu_alderlake, ///< Twelfth Generation Intel Core |
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| 527 | CpuArchRaptorCove = cpu_raptorcove, |
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| 528 | CpuArchRaptorLake = cpu_raptorlake, ///< Thirteenth Generation Intel Core |
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| 529 | CpuArchRedwoodCove = cpu_redwoodcove, |
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| 530 | CpuArchMeteorLake = cpu_meteorlake, |
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| 531 | CpuArchArrowLake = cpu_arrowlake, |
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| 532 | CpuArchLunarLake = cpu_lunarlake, |
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| 533 | CpuArchSapphireRapids = cpu_sapphirerapids, ///< Fourth Generation Intel Xeon Scalable |
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| 534 | CpuArchEmeraldRapids = cpu_emeraldrapids, ///< Fifth Generation Intel Xeon Scalable |
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| 535 | CpuArchGraniteRapids = cpu_graniterapids, |
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| 536 | CpuArchSilvermont = cpu_silvermont, |
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| 537 | CpuArchGoldmont = cpu_goldmont, |
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| 538 | CpuArchTremont = cpu_tremont, |
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| 539 | CpuArchGracemont = cpu_gracemont, |
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| 540 | CpuArchCrestmont = cpu_crestmont, |
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| 541 | CpuArchGrandRidge = cpu_grandridge, |
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| 542 | CpuArchSierraForest = cpu_sierraforest, |
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| 543 | CpuArchClearwaterForest = cpu_clearwaterforest, |
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| 544 | }; // enum X86cpuArchitectures |
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| 545 | #endif /* C++11 */ |
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| 546 | |
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| 547 | #endif /* QSIMD_X86_P_H */ |
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| 548 | |
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