1 | // SPDX-License-Identifier: GPL-2.0 |
2 | #include <linux/module.h> |
3 | #include <linux/kernel.h> |
4 | #include <linux/init.h> |
5 | #include <linux/platform_device.h> |
6 | #include <linux/clkdev.h> |
7 | #include <linux/clk-provider.h> |
8 | #include <linux/dma-mapping.h> |
9 | #include <linux/dmaengine.h> |
10 | #include <linux/spi/pxa2xx_spi.h> |
11 | #include <linux/platform_data/i2c-pxa.h> |
12 | #include <linux/soc/pxa/cpu.h> |
13 | |
14 | #include "udc.h" |
15 | #include <linux/platform_data/video-pxafb.h> |
16 | #include <linux/platform_data/mmc-pxamci.h> |
17 | #include "irqs.h" |
18 | #include <linux/platform_data/usb-ohci-pxa27x.h> |
19 | #include <linux/platform_data/mmp_dma.h> |
20 | |
21 | #include "regs-ost.h" |
22 | #include "reset.h" |
23 | #include "devices.h" |
24 | #include "generic.h" |
25 | |
26 | void __init pxa_register_device(struct platform_device *dev, void *data) |
27 | { |
28 | int ret; |
29 | |
30 | dev->dev.platform_data = data; |
31 | |
32 | ret = platform_device_register(dev); |
33 | if (ret) |
34 | dev_err(&dev->dev, "unable to register device: %d\n" , ret); |
35 | } |
36 | |
37 | static struct resource pxa_resource_pmu = { |
38 | .start = IRQ_PMU, |
39 | .end = IRQ_PMU, |
40 | .flags = IORESOURCE_IRQ, |
41 | }; |
42 | |
43 | struct platform_device pxa_device_pmu = { |
44 | .name = "xscale-pmu" , |
45 | .id = -1, |
46 | .resource = &pxa_resource_pmu, |
47 | .num_resources = 1, |
48 | }; |
49 | |
50 | static struct resource pxamci_resources[] = { |
51 | [0] = { |
52 | .start = 0x41100000, |
53 | .end = 0x41100fff, |
54 | .flags = IORESOURCE_MEM, |
55 | }, |
56 | [1] = { |
57 | .start = IRQ_MMC, |
58 | .end = IRQ_MMC, |
59 | .flags = IORESOURCE_IRQ, |
60 | }, |
61 | }; |
62 | |
63 | static u64 pxamci_dmamask = 0xffffffffUL; |
64 | |
65 | struct platform_device pxa_device_mci = { |
66 | .name = "pxa2xx-mci" , |
67 | .id = 0, |
68 | .dev = { |
69 | .dma_mask = &pxamci_dmamask, |
70 | .coherent_dma_mask = 0xffffffff, |
71 | }, |
72 | .num_resources = ARRAY_SIZE(pxamci_resources), |
73 | .resource = pxamci_resources, |
74 | }; |
75 | |
76 | void __init pxa_set_mci_info(struct pxamci_platform_data *info) |
77 | { |
78 | pxa_register_device(dev: &pxa_device_mci, data: info); |
79 | } |
80 | |
81 | static struct pxa2xx_udc_mach_info pxa_udc_info = { |
82 | .gpio_pullup = -1, |
83 | }; |
84 | |
85 | static struct resource pxa2xx_udc_resources[] = { |
86 | [0] = { |
87 | .start = 0x40600000, |
88 | .end = 0x4060ffff, |
89 | .flags = IORESOURCE_MEM, |
90 | }, |
91 | [1] = { |
92 | .start = IRQ_USB, |
93 | .end = IRQ_USB, |
94 | .flags = IORESOURCE_IRQ, |
95 | }, |
96 | }; |
97 | |
98 | static u64 udc_dma_mask = ~(u32)0; |
99 | |
100 | struct platform_device pxa25x_device_udc = { |
101 | .name = "pxa25x-udc" , |
102 | .id = -1, |
103 | .resource = pxa2xx_udc_resources, |
104 | .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), |
105 | .dev = { |
106 | .platform_data = &pxa_udc_info, |
107 | .dma_mask = &udc_dma_mask, |
108 | } |
109 | }; |
110 | |
111 | struct platform_device pxa27x_device_udc = { |
112 | .name = "pxa27x-udc" , |
113 | .id = -1, |
114 | .resource = pxa2xx_udc_resources, |
115 | .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), |
116 | .dev = { |
117 | .platform_data = &pxa_udc_info, |
118 | .dma_mask = &udc_dma_mask, |
119 | } |
120 | }; |
121 | |
122 | static struct resource pxafb_resources[] = { |
123 | [0] = { |
124 | .start = 0x44000000, |
125 | .end = 0x4400ffff, |
126 | .flags = IORESOURCE_MEM, |
127 | }, |
128 | [1] = { |
129 | .start = IRQ_LCD, |
130 | .end = IRQ_LCD, |
131 | .flags = IORESOURCE_IRQ, |
132 | }, |
133 | }; |
134 | |
135 | static u64 fb_dma_mask = ~(u64)0; |
136 | |
137 | struct platform_device pxa_device_fb = { |
138 | .name = "pxa2xx-fb" , |
139 | .id = -1, |
140 | .dev = { |
141 | .dma_mask = &fb_dma_mask, |
142 | .coherent_dma_mask = 0xffffffff, |
143 | }, |
144 | .num_resources = ARRAY_SIZE(pxafb_resources), |
145 | .resource = pxafb_resources, |
146 | }; |
147 | |
148 | void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info) |
149 | { |
150 | pxa_device_fb.dev.parent = parent; |
151 | pxa_register_device(dev: &pxa_device_fb, data: info); |
152 | } |
153 | |
154 | static struct resource pxa_resource_ffuart[] = { |
155 | { |
156 | .start = 0x40100000, |
157 | .end = 0x40100023, |
158 | .flags = IORESOURCE_MEM, |
159 | }, { |
160 | .start = IRQ_FFUART, |
161 | .end = IRQ_FFUART, |
162 | .flags = IORESOURCE_IRQ, |
163 | } |
164 | }; |
165 | |
166 | struct platform_device pxa_device_ffuart = { |
167 | .name = "pxa2xx-uart" , |
168 | .id = 0, |
169 | .resource = pxa_resource_ffuart, |
170 | .num_resources = ARRAY_SIZE(pxa_resource_ffuart), |
171 | }; |
172 | |
173 | void __init pxa_set_ffuart_info(void *info) |
174 | { |
175 | pxa_register_device(dev: &pxa_device_ffuart, data: info); |
176 | } |
177 | |
178 | static struct resource pxa_resource_btuart[] = { |
179 | { |
180 | .start = 0x40200000, |
181 | .end = 0x40200023, |
182 | .flags = IORESOURCE_MEM, |
183 | }, { |
184 | .start = IRQ_BTUART, |
185 | .end = IRQ_BTUART, |
186 | .flags = IORESOURCE_IRQ, |
187 | } |
188 | }; |
189 | |
190 | struct platform_device pxa_device_btuart = { |
191 | .name = "pxa2xx-uart" , |
192 | .id = 1, |
193 | .resource = pxa_resource_btuart, |
194 | .num_resources = ARRAY_SIZE(pxa_resource_btuart), |
195 | }; |
196 | |
197 | void __init pxa_set_btuart_info(void *info) |
198 | { |
199 | pxa_register_device(dev: &pxa_device_btuart, data: info); |
200 | } |
201 | |
202 | static struct resource pxa_resource_stuart[] = { |
203 | { |
204 | .start = 0x40700000, |
205 | .end = 0x40700023, |
206 | .flags = IORESOURCE_MEM, |
207 | }, { |
208 | .start = IRQ_STUART, |
209 | .end = IRQ_STUART, |
210 | .flags = IORESOURCE_IRQ, |
211 | } |
212 | }; |
213 | |
214 | struct platform_device pxa_device_stuart = { |
215 | .name = "pxa2xx-uart" , |
216 | .id = 2, |
217 | .resource = pxa_resource_stuart, |
218 | .num_resources = ARRAY_SIZE(pxa_resource_stuart), |
219 | }; |
220 | |
221 | void __init pxa_set_stuart_info(void *info) |
222 | { |
223 | pxa_register_device(dev: &pxa_device_stuart, data: info); |
224 | } |
225 | |
226 | static struct resource pxa_resource_hwuart[] = { |
227 | { |
228 | .start = 0x41600000, |
229 | .end = 0x4160002F, |
230 | .flags = IORESOURCE_MEM, |
231 | }, { |
232 | .start = IRQ_HWUART, |
233 | .end = IRQ_HWUART, |
234 | .flags = IORESOURCE_IRQ, |
235 | } |
236 | }; |
237 | |
238 | struct platform_device pxa_device_hwuart = { |
239 | .name = "pxa2xx-uart" , |
240 | .id = 3, |
241 | .resource = pxa_resource_hwuart, |
242 | .num_resources = ARRAY_SIZE(pxa_resource_hwuart), |
243 | }; |
244 | |
245 | void __init pxa_set_hwuart_info(void *info) |
246 | { |
247 | if (cpu_is_pxa255()) |
248 | pxa_register_device(dev: &pxa_device_hwuart, data: info); |
249 | else |
250 | pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware" ); |
251 | } |
252 | |
253 | static struct resource pxai2c_resources[] = { |
254 | { |
255 | .start = 0x40301680, |
256 | .end = 0x403016a3, |
257 | .flags = IORESOURCE_MEM, |
258 | }, { |
259 | .start = IRQ_I2C, |
260 | .end = IRQ_I2C, |
261 | .flags = IORESOURCE_IRQ, |
262 | }, |
263 | }; |
264 | |
265 | struct platform_device pxa_device_i2c = { |
266 | .name = "pxa2xx-i2c" , |
267 | .id = 0, |
268 | .resource = pxai2c_resources, |
269 | .num_resources = ARRAY_SIZE(pxai2c_resources), |
270 | }; |
271 | |
272 | void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) |
273 | { |
274 | pxa_register_device(dev: &pxa_device_i2c, data: info); |
275 | } |
276 | |
277 | #ifdef CONFIG_PXA27x |
278 | static struct resource pxa27x_resources_i2c_power[] = { |
279 | { |
280 | .start = 0x40f00180, |
281 | .end = 0x40f001a3, |
282 | .flags = IORESOURCE_MEM, |
283 | }, { |
284 | .start = IRQ_PWRI2C, |
285 | .end = IRQ_PWRI2C, |
286 | .flags = IORESOURCE_IRQ, |
287 | }, |
288 | }; |
289 | |
290 | struct platform_device pxa27x_device_i2c_power = { |
291 | .name = "pxa2xx-i2c" , |
292 | .id = 1, |
293 | .resource = pxa27x_resources_i2c_power, |
294 | .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power), |
295 | }; |
296 | #endif |
297 | |
298 | static struct resource pxai2s_resources[] = { |
299 | { |
300 | .start = 0x40400000, |
301 | .end = 0x40400083, |
302 | .flags = IORESOURCE_MEM, |
303 | }, { |
304 | .start = IRQ_I2S, |
305 | .end = IRQ_I2S, |
306 | .flags = IORESOURCE_IRQ, |
307 | }, |
308 | }; |
309 | |
310 | struct platform_device pxa_device_i2s = { |
311 | .name = "pxa2xx-i2s" , |
312 | .id = -1, |
313 | .resource = pxai2s_resources, |
314 | .num_resources = ARRAY_SIZE(pxai2s_resources), |
315 | }; |
316 | |
317 | struct platform_device pxa_device_asoc_ssp1 = { |
318 | .name = "pxa-ssp-dai" , |
319 | .id = 0, |
320 | }; |
321 | |
322 | struct platform_device pxa_device_asoc_ssp2= { |
323 | .name = "pxa-ssp-dai" , |
324 | .id = 1, |
325 | }; |
326 | |
327 | struct platform_device pxa_device_asoc_ssp3 = { |
328 | .name = "pxa-ssp-dai" , |
329 | .id = 2, |
330 | }; |
331 | |
332 | struct platform_device pxa_device_asoc_ssp4 = { |
333 | .name = "pxa-ssp-dai" , |
334 | .id = 3, |
335 | }; |
336 | |
337 | struct platform_device pxa_device_asoc_platform = { |
338 | .name = "pxa-pcm-audio" , |
339 | .id = -1, |
340 | }; |
341 | |
342 | static struct resource pxa_rtc_resources[] = { |
343 | [0] = { |
344 | .start = 0x40900000, |
345 | .end = 0x40900000 + 0x3b, |
346 | .flags = IORESOURCE_MEM, |
347 | }, |
348 | [1] = { |
349 | .start = IRQ_RTC1Hz, |
350 | .end = IRQ_RTC1Hz, |
351 | .name = "rtc 1Hz" , |
352 | .flags = IORESOURCE_IRQ, |
353 | }, |
354 | [2] = { |
355 | .start = IRQ_RTCAlrm, |
356 | .end = IRQ_RTCAlrm, |
357 | .name = "rtc alarm" , |
358 | .flags = IORESOURCE_IRQ, |
359 | }, |
360 | }; |
361 | |
362 | struct platform_device pxa_device_rtc = { |
363 | .name = "pxa-rtc" , |
364 | .id = -1, |
365 | .num_resources = ARRAY_SIZE(pxa_rtc_resources), |
366 | .resource = pxa_rtc_resources, |
367 | }; |
368 | |
369 | struct platform_device sa1100_device_rtc = { |
370 | .name = "sa1100-rtc" , |
371 | .id = -1, |
372 | .num_resources = ARRAY_SIZE(pxa_rtc_resources), |
373 | .resource = pxa_rtc_resources, |
374 | }; |
375 | |
376 | #ifdef CONFIG_PXA25x |
377 | |
378 | static struct resource pxa25x_resource_pwm0[] = { |
379 | [0] = { |
380 | .start = 0x40b00000, |
381 | .end = 0x40b0000f, |
382 | .flags = IORESOURCE_MEM, |
383 | }, |
384 | }; |
385 | |
386 | struct platform_device pxa25x_device_pwm0 = { |
387 | .name = "pxa25x-pwm" , |
388 | .id = 0, |
389 | .resource = pxa25x_resource_pwm0, |
390 | .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0), |
391 | }; |
392 | |
393 | static struct resource pxa25x_resource_pwm1[] = { |
394 | [0] = { |
395 | .start = 0x40c00000, |
396 | .end = 0x40c0000f, |
397 | .flags = IORESOURCE_MEM, |
398 | }, |
399 | }; |
400 | |
401 | struct platform_device pxa25x_device_pwm1 = { |
402 | .name = "pxa25x-pwm" , |
403 | .id = 1, |
404 | .resource = pxa25x_resource_pwm1, |
405 | .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1), |
406 | }; |
407 | |
408 | static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32); |
409 | |
410 | static struct resource pxa25x_resource_ssp[] = { |
411 | [0] = { |
412 | .start = 0x41000000, |
413 | .end = 0x4100001f, |
414 | .flags = IORESOURCE_MEM, |
415 | }, |
416 | [1] = { |
417 | .start = IRQ_SSP, |
418 | .end = IRQ_SSP, |
419 | .flags = IORESOURCE_IRQ, |
420 | }, |
421 | }; |
422 | |
423 | struct platform_device pxa25x_device_ssp = { |
424 | .name = "pxa25x-ssp" , |
425 | .id = 0, |
426 | .dev = { |
427 | .dma_mask = &pxa25x_ssp_dma_mask, |
428 | .coherent_dma_mask = DMA_BIT_MASK(32), |
429 | }, |
430 | .resource = pxa25x_resource_ssp, |
431 | .num_resources = ARRAY_SIZE(pxa25x_resource_ssp), |
432 | }; |
433 | |
434 | static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32); |
435 | |
436 | static struct resource pxa25x_resource_nssp[] = { |
437 | [0] = { |
438 | .start = 0x41400000, |
439 | .end = 0x4140002f, |
440 | .flags = IORESOURCE_MEM, |
441 | }, |
442 | [1] = { |
443 | .start = IRQ_NSSP, |
444 | .end = IRQ_NSSP, |
445 | .flags = IORESOURCE_IRQ, |
446 | }, |
447 | }; |
448 | |
449 | struct platform_device pxa25x_device_nssp = { |
450 | .name = "pxa25x-nssp" , |
451 | .id = 1, |
452 | .dev = { |
453 | .dma_mask = &pxa25x_nssp_dma_mask, |
454 | .coherent_dma_mask = DMA_BIT_MASK(32), |
455 | }, |
456 | .resource = pxa25x_resource_nssp, |
457 | .num_resources = ARRAY_SIZE(pxa25x_resource_nssp), |
458 | }; |
459 | |
460 | static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32); |
461 | |
462 | static struct resource pxa25x_resource_assp[] = { |
463 | [0] = { |
464 | .start = 0x41500000, |
465 | .end = 0x4150002f, |
466 | .flags = IORESOURCE_MEM, |
467 | }, |
468 | [1] = { |
469 | .start = IRQ_ASSP, |
470 | .end = IRQ_ASSP, |
471 | .flags = IORESOURCE_IRQ, |
472 | }, |
473 | }; |
474 | |
475 | struct platform_device pxa25x_device_assp = { |
476 | /* ASSP is basically equivalent to NSSP */ |
477 | .name = "pxa25x-nssp" , |
478 | .id = 2, |
479 | .dev = { |
480 | .dma_mask = &pxa25x_assp_dma_mask, |
481 | .coherent_dma_mask = DMA_BIT_MASK(32), |
482 | }, |
483 | .resource = pxa25x_resource_assp, |
484 | .num_resources = ARRAY_SIZE(pxa25x_resource_assp), |
485 | }; |
486 | #endif /* CONFIG_PXA25x */ |
487 | |
488 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) |
489 | static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32); |
490 | |
491 | static struct resource pxa27x_resource_ohci[] = { |
492 | [0] = { |
493 | .start = 0x4C000000, |
494 | .end = 0x4C00ff6f, |
495 | .flags = IORESOURCE_MEM, |
496 | }, |
497 | [1] = { |
498 | .start = IRQ_USBH1, |
499 | .end = IRQ_USBH1, |
500 | .flags = IORESOURCE_IRQ, |
501 | }, |
502 | }; |
503 | |
504 | struct platform_device pxa27x_device_ohci = { |
505 | .name = "pxa27x-ohci" , |
506 | .id = -1, |
507 | .dev = { |
508 | .dma_mask = &pxa27x_ohci_dma_mask, |
509 | .coherent_dma_mask = DMA_BIT_MASK(32), |
510 | }, |
511 | .num_resources = ARRAY_SIZE(pxa27x_resource_ohci), |
512 | .resource = pxa27x_resource_ohci, |
513 | }; |
514 | |
515 | void __init pxa_set_ohci_info(struct pxaohci_platform_data *info) |
516 | { |
517 | pxa_register_device(&pxa27x_device_ohci, info); |
518 | } |
519 | #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ |
520 | |
521 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) |
522 | static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32); |
523 | |
524 | static struct resource pxa27x_resource_ssp1[] = { |
525 | [0] = { |
526 | .start = 0x41000000, |
527 | .end = 0x4100003f, |
528 | .flags = IORESOURCE_MEM, |
529 | }, |
530 | [1] = { |
531 | .start = IRQ_SSP, |
532 | .end = IRQ_SSP, |
533 | .flags = IORESOURCE_IRQ, |
534 | }, |
535 | }; |
536 | |
537 | struct platform_device pxa27x_device_ssp1 = { |
538 | .name = "pxa27x-ssp" , |
539 | .id = 0, |
540 | .dev = { |
541 | .dma_mask = &pxa27x_ssp1_dma_mask, |
542 | .coherent_dma_mask = DMA_BIT_MASK(32), |
543 | }, |
544 | .resource = pxa27x_resource_ssp1, |
545 | .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1), |
546 | }; |
547 | |
548 | static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32); |
549 | |
550 | static struct resource pxa27x_resource_ssp2[] = { |
551 | [0] = { |
552 | .start = 0x41700000, |
553 | .end = 0x4170003f, |
554 | .flags = IORESOURCE_MEM, |
555 | }, |
556 | [1] = { |
557 | .start = IRQ_SSP2, |
558 | .end = IRQ_SSP2, |
559 | .flags = IORESOURCE_IRQ, |
560 | }, |
561 | }; |
562 | |
563 | struct platform_device pxa27x_device_ssp2 = { |
564 | .name = "pxa27x-ssp" , |
565 | .id = 1, |
566 | .dev = { |
567 | .dma_mask = &pxa27x_ssp2_dma_mask, |
568 | .coherent_dma_mask = DMA_BIT_MASK(32), |
569 | }, |
570 | .resource = pxa27x_resource_ssp2, |
571 | .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2), |
572 | }; |
573 | |
574 | static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32); |
575 | |
576 | static struct resource pxa27x_resource_ssp3[] = { |
577 | [0] = { |
578 | .start = 0x41900000, |
579 | .end = 0x4190003f, |
580 | .flags = IORESOURCE_MEM, |
581 | }, |
582 | [1] = { |
583 | .start = IRQ_SSP3, |
584 | .end = IRQ_SSP3, |
585 | .flags = IORESOURCE_IRQ, |
586 | }, |
587 | }; |
588 | |
589 | struct platform_device pxa27x_device_ssp3 = { |
590 | .name = "pxa27x-ssp" , |
591 | .id = 2, |
592 | .dev = { |
593 | .dma_mask = &pxa27x_ssp3_dma_mask, |
594 | .coherent_dma_mask = DMA_BIT_MASK(32), |
595 | }, |
596 | .resource = pxa27x_resource_ssp3, |
597 | .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3), |
598 | }; |
599 | |
600 | static struct resource pxa27x_resource_pwm0[] = { |
601 | [0] = { |
602 | .start = 0x40b00000, |
603 | .end = 0x40b0001f, |
604 | .flags = IORESOURCE_MEM, |
605 | }, |
606 | }; |
607 | |
608 | struct platform_device pxa27x_device_pwm0 = { |
609 | .name = "pxa27x-pwm" , |
610 | .id = 0, |
611 | .resource = pxa27x_resource_pwm0, |
612 | .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0), |
613 | }; |
614 | |
615 | static struct resource pxa27x_resource_pwm1[] = { |
616 | [0] = { |
617 | .start = 0x40c00000, |
618 | .end = 0x40c0001f, |
619 | .flags = IORESOURCE_MEM, |
620 | }, |
621 | }; |
622 | |
623 | struct platform_device pxa27x_device_pwm1 = { |
624 | .name = "pxa27x-pwm" , |
625 | .id = 1, |
626 | .resource = pxa27x_resource_pwm1, |
627 | .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1), |
628 | }; |
629 | #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ |
630 | |
631 | struct resource pxa_resource_gpio[] = { |
632 | { |
633 | .start = 0x40e00000, |
634 | .end = 0x40e0ffff, |
635 | .flags = IORESOURCE_MEM, |
636 | }, { |
637 | .start = IRQ_GPIO0, |
638 | .end = IRQ_GPIO0, |
639 | .name = "gpio0" , |
640 | .flags = IORESOURCE_IRQ, |
641 | }, { |
642 | .start = IRQ_GPIO1, |
643 | .end = IRQ_GPIO1, |
644 | .name = "gpio1" , |
645 | .flags = IORESOURCE_IRQ, |
646 | }, { |
647 | .start = IRQ_GPIO_2_x, |
648 | .end = IRQ_GPIO_2_x, |
649 | .name = "gpio_mux" , |
650 | .flags = IORESOURCE_IRQ, |
651 | }, |
652 | }; |
653 | |
654 | struct platform_device pxa25x_device_gpio = { |
655 | .name = "pxa25x-gpio" , |
656 | .id = -1, |
657 | .num_resources = ARRAY_SIZE(pxa_resource_gpio), |
658 | .resource = pxa_resource_gpio, |
659 | }; |
660 | |
661 | struct platform_device pxa27x_device_gpio = { |
662 | .name = "pxa27x-gpio" , |
663 | .id = -1, |
664 | .num_resources = ARRAY_SIZE(pxa_resource_gpio), |
665 | .resource = pxa_resource_gpio, |
666 | }; |
667 | |
668 | /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. |
669 | * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */ |
670 | void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_controller *info) |
671 | { |
672 | struct platform_device *pd; |
673 | |
674 | pd = platform_device_alloc(name: "pxa2xx-spi" , id); |
675 | if (pd == NULL) { |
676 | printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n" , |
677 | id); |
678 | return; |
679 | } |
680 | |
681 | pd->dev.platform_data = info; |
682 | platform_device_add(pdev: pd); |
683 | } |
684 | |
685 | static struct resource pxa_dma_resource[] = { |
686 | [0] = { |
687 | .start = 0x40000000, |
688 | .end = 0x4000ffff, |
689 | .flags = IORESOURCE_MEM, |
690 | }, |
691 | [1] = { |
692 | .start = IRQ_DMA, |
693 | .end = IRQ_DMA, |
694 | .flags = IORESOURCE_IRQ, |
695 | }, |
696 | }; |
697 | |
698 | static u64 pxadma_dmamask = 0xffffffffUL; |
699 | |
700 | static struct platform_device pxa2xx_pxa_dma = { |
701 | .name = "pxa-dma" , |
702 | .id = 0, |
703 | .dev = { |
704 | .dma_mask = &pxadma_dmamask, |
705 | .coherent_dma_mask = 0xffffffff, |
706 | }, |
707 | .num_resources = ARRAY_SIZE(pxa_dma_resource), |
708 | .resource = pxa_dma_resource, |
709 | }; |
710 | |
711 | void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata) |
712 | { |
713 | pxa_register_device(dev: &pxa2xx_pxa_dma, data: dma_pdata); |
714 | } |
715 | |
716 | void __init pxa_register_wdt(unsigned int reset_status) |
717 | { |
718 | struct resource res = DEFINE_RES_MEM(OST_PHYS, OST_LEN); |
719 | |
720 | reset_status &= RESET_STATUS_WATCHDOG; |
721 | platform_device_register_resndata(NULL, name: "sa1100_wdt" , id: -1, res: &res, num: 1, |
722 | data: &reset_status, size: sizeof(reset_status)); |
723 | } |
724 | |