1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * arch/arm/plat-spear/time.c
4 *
5 * Copyright (C) 2010 ST Microelectronics
6 * Shiraz Hashim<shiraz.linux.kernel@gmail.com>
7 */
8
9#include <linux/clk.h>
10#include <linux/clockchips.h>
11#include <linux/clocksource.h>
12#include <linux/err.h>
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <linux/ioport.h>
16#include <linux/io.h>
17#include <linux/kernel.h>
18#include <linux/of_irq.h>
19#include <linux/of_address.h>
20#include <linux/time.h>
21#include <linux/irq.h>
22#include <asm/mach/time.h>
23#include "generic.h"
24
25/*
26 * We would use TIMER0 and TIMER1 as clockevent and clocksource.
27 * Timer0 and Timer1 both belong to same gpt block in cpu subbsystem. Further
28 * they share same functional clock. Any change in one's functional clock will
29 * also affect other timer.
30 */
31
32#define CLKEVT 0 /* gpt0, channel0 as clockevent */
33#define CLKSRC 1 /* gpt0, channel1 as clocksource */
34
35/* Register offsets, x is channel number */
36#define CR(x) ((x) * 0x80 + 0x80)
37#define IR(x) ((x) * 0x80 + 0x84)
38#define LOAD(x) ((x) * 0x80 + 0x88)
39#define COUNT(x) ((x) * 0x80 + 0x8C)
40
41/* Reg bit definitions */
42#define CTRL_INT_ENABLE 0x0100
43#define CTRL_ENABLE 0x0020
44#define CTRL_ONE_SHOT 0x0010
45
46#define CTRL_PRESCALER1 0x0
47#define CTRL_PRESCALER2 0x1
48#define CTRL_PRESCALER4 0x2
49#define CTRL_PRESCALER8 0x3
50#define CTRL_PRESCALER16 0x4
51#define CTRL_PRESCALER32 0x5
52#define CTRL_PRESCALER64 0x6
53#define CTRL_PRESCALER128 0x7
54#define CTRL_PRESCALER256 0x8
55
56#define INT_STATUS 0x1
57
58/*
59 * Minimum clocksource/clockevent timer range in seconds
60 */
61#define SPEAR_MIN_RANGE 4
62
63static __iomem void *gpt_base;
64static struct clk *gpt_clk;
65
66static int clockevent_next_event(unsigned long evt,
67 struct clock_event_device *clk_event_dev);
68
69static void __init spear_clocksource_init(void)
70{
71 u32 tick_rate;
72 u16 val;
73
74 /* program the prescaler (/256)*/
75 writew(CTRL_PRESCALER256, addr: gpt_base + CR(CLKSRC));
76
77 /* find out actual clock driving Timer */
78 tick_rate = clk_get_rate(clk: gpt_clk);
79 tick_rate >>= CTRL_PRESCALER256;
80
81 writew(val: 0xFFFF, addr: gpt_base + LOAD(CLKSRC));
82
83 val = readw(addr: gpt_base + CR(CLKSRC));
84 val &= ~CTRL_ONE_SHOT; /* autoreload mode */
85 val |= CTRL_ENABLE ;
86 writew(val, addr: gpt_base + CR(CLKSRC));
87
88 /* register the clocksource */
89 clocksource_mmio_init(gpt_base + COUNT(CLKSRC), "tmr1", tick_rate,
90 200, 16, clocksource_mmio_readw_up);
91}
92
93static inline void spear_timer_shutdown(struct clock_event_device *evt)
94{
95 u16 val = readw(addr: gpt_base + CR(CLKEVT));
96
97 /* stop the timer */
98 val &= ~CTRL_ENABLE;
99 writew(val, addr: gpt_base + CR(CLKEVT));
100}
101
102static int spear_shutdown(struct clock_event_device *evt)
103{
104 spear_timer_shutdown(evt);
105
106 return 0;
107}
108
109static int spear_set_oneshot(struct clock_event_device *evt)
110{
111 u16 val;
112
113 /* stop the timer */
114 spear_timer_shutdown(evt);
115
116 val = readw(addr: gpt_base + CR(CLKEVT));
117 val |= CTRL_ONE_SHOT;
118 writew(val, addr: gpt_base + CR(CLKEVT));
119
120 return 0;
121}
122
123static int spear_set_periodic(struct clock_event_device *evt)
124{
125 u32 period;
126 u16 val;
127
128 /* stop the timer */
129 spear_timer_shutdown(evt);
130
131 period = clk_get_rate(clk: gpt_clk) / HZ;
132 period >>= CTRL_PRESCALER16;
133 writew(val: period, addr: gpt_base + LOAD(CLKEVT));
134
135 val = readw(addr: gpt_base + CR(CLKEVT));
136 val &= ~CTRL_ONE_SHOT;
137 val |= CTRL_ENABLE | CTRL_INT_ENABLE;
138 writew(val, addr: gpt_base + CR(CLKEVT));
139
140 return 0;
141}
142
143static struct clock_event_device clkevt = {
144 .name = "tmr0",
145 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
146 .set_state_shutdown = spear_shutdown,
147 .set_state_periodic = spear_set_periodic,
148 .set_state_oneshot = spear_set_oneshot,
149 .tick_resume = spear_shutdown,
150 .set_next_event = clockevent_next_event,
151 .shift = 0, /* to be computed */
152};
153
154static int clockevent_next_event(unsigned long cycles,
155 struct clock_event_device *clk_event_dev)
156{
157 u16 val = readw(addr: gpt_base + CR(CLKEVT));
158
159 if (val & CTRL_ENABLE)
160 writew(val: val & ~CTRL_ENABLE, addr: gpt_base + CR(CLKEVT));
161
162 writew(val: cycles, addr: gpt_base + LOAD(CLKEVT));
163
164 val |= CTRL_ENABLE | CTRL_INT_ENABLE;
165 writew(val, addr: gpt_base + CR(CLKEVT));
166
167 return 0;
168}
169
170static irqreturn_t spear_timer_interrupt(int irq, void *dev_id)
171{
172 struct clock_event_device *evt = &clkevt;
173
174 writew(INT_STATUS, addr: gpt_base + IR(CLKEVT));
175
176 evt->event_handler(evt);
177
178 return IRQ_HANDLED;
179}
180
181static void __init spear_clockevent_init(int irq)
182{
183 u32 tick_rate;
184
185 /* program the prescaler */
186 writew(CTRL_PRESCALER16, addr: gpt_base + CR(CLKEVT));
187
188 tick_rate = clk_get_rate(clk: gpt_clk);
189 tick_rate >>= CTRL_PRESCALER16;
190
191 clkevt.cpumask = cpumask_of(0);
192
193 clockevents_config_and_register(dev: &clkevt, freq: tick_rate, min_delta: 3, max_delta: 0xfff0);
194
195 if (request_irq(irq, handler: spear_timer_interrupt, IRQF_TIMER, name: "timer", NULL))
196 pr_err("Failed to request irq %d (timer)\n", irq);
197}
198
199static const struct of_device_id timer_of_match[] __initconst = {
200 { .compatible = "st,spear-timer", },
201 { },
202};
203
204void __init spear_setup_of_timer(void)
205{
206 struct device_node *np;
207 int irq, ret;
208
209 np = of_find_matching_node(NULL, matches: timer_of_match);
210 if (!np) {
211 pr_err("%s: No timer passed via DT\n", __func__);
212 return;
213 }
214
215 irq = irq_of_parse_and_map(node: np, index: 0);
216 if (!irq) {
217 pr_err("%s: No irq passed for timer via DT\n", __func__);
218 goto err_put_np;
219 }
220
221 gpt_base = of_iomap(node: np, index: 0);
222 if (!gpt_base) {
223 pr_err("%s: of iomap failed\n", __func__);
224 goto err_put_np;
225 }
226
227 gpt_clk = clk_get_sys(dev_id: "gpt0", NULL);
228 if (IS_ERR(ptr: gpt_clk)) {
229 pr_err("%s:couldn't get clk for gpt\n", __func__);
230 goto err_iomap;
231 }
232
233 ret = clk_prepare_enable(clk: gpt_clk);
234 if (ret < 0) {
235 pr_err("%s:couldn't prepare-enable gpt clock\n", __func__);
236 goto err_prepare_enable_clk;
237 }
238
239 of_node_put(node: np);
240
241 spear_clockevent_init(irq);
242 spear_clocksource_init();
243
244 return;
245
246err_prepare_enable_clk:
247 clk_put(clk: gpt_clk);
248err_iomap:
249 iounmap(addr: gpt_base);
250err_put_np:
251 of_node_put(node: np);
252}
253

source code of linux/arch/arm/mach-spear/time.c