1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * linux/arch/arm/mm/tlbv4.S
4 *
5 * Copyright (C) 1997-2002 Russell King
6 *
7 * ARM architecture version 4 TLB handling functions.
8 * These assume a split I/D TLBs, and no write buffer.
9 *
10 * Processors: ARM720T
11 */
12#include <linux/linkage.h>
13#include <linux/init.h>
14#include <linux/cfi_types.h>
15#include <asm/assembler.h>
16#include <asm/asm-offsets.h>
17#include <asm/tlbflush.h>
18#include "proc-macros.S"
19
20 .align 5
21/*
22 * v4_flush_user_tlb_range(start, end, mm)
23 *
24 * Invalidate a range of TLB entries in the specified user address space.
25 *
26 * - start - range start address
27 * - end - range end address
28 * - mm - mm_struct describing address space
29 */
30 .align 5
31SYM_TYPED_FUNC_START(v4_flush_user_tlb_range)
32 vma_vm_mm ip, r2
33 act_mm r3 @ get current->active_mm
34 eors r3, ip, r3 @ == mm ?
35 retne lr @ no, we dont do anything
36.v4_flush_kern_tlb_range:
37 bic r0, r0, #0x0ff
38 bic r0, r0, #0xf00
391: mcr p15, 0, r0, c8, c7, 1 @ invalidate TLB entry
40 add r0, r0, #PAGE_SZ
41 cmp r0, r1
42 blo 1b
43 ret lr
44SYM_FUNC_END(v4_flush_user_tlb_range)
45
46/*
47 * v4_flush_kern_tlb_range(start, end)
48 *
49 * Invalidate a range of TLB entries in the specified kernel
50 * address range.
51 *
52 * - start - virtual address (may not be aligned)
53 * - end - virtual address (may not be aligned)
54 */
55#ifdef CONFIG_CFI
56SYM_TYPED_FUNC_START(v4_flush_kern_tlb_range)
57 b .v4_flush_kern_tlb_range
58SYM_FUNC_END(v4_flush_kern_tlb_range)
59#else
60.globl v4_flush_kern_tlb_range
61.equ v4_flush_kern_tlb_range, .v4_flush_kern_tlb_range
62#endif
63

source code of linux/arch/arm/mm/tlb-v4.S