1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2015, 2016 ARM Ltd.
4 */
5
6#include <linux/uaccess.h>
7#include <linux/interrupt.h>
8#include <linux/cpu.h>
9#include <linux/kvm_host.h>
10#include <kvm/arm_vgic.h>
11#include <asm/kvm_emulate.h>
12#include <asm/kvm_mmu.h>
13#include "vgic.h"
14
15/*
16 * Initialization rules: there are multiple stages to the vgic
17 * initialization, both for the distributor and the CPU interfaces. The basic
18 * idea is that even though the VGIC is not functional or not requested from
19 * user space, the critical path of the run loop can still call VGIC functions
20 * that just won't do anything, without them having to check additional
21 * initialization flags to ensure they don't look at uninitialized data
22 * structures.
23 *
24 * Distributor:
25 *
26 * - kvm_vgic_early_init(): initialization of static data that doesn't
27 * depend on any sizing information or emulation type. No allocation
28 * is allowed there.
29 *
30 * - vgic_init(): allocation and initialization of the generic data
31 * structures that depend on sizing information (number of CPUs,
32 * number of interrupts). Also initializes the vcpu specific data
33 * structures. Can be executed lazily for GICv2.
34 *
35 * CPU Interface:
36 *
37 * - kvm_vgic_vcpu_init(): initialization of static data that doesn't depend
38 * on any sizing information. Private interrupts are allocated if not
39 * already allocated at vgic-creation time.
40 */
41
42/* EARLY INIT */
43
44/**
45 * kvm_vgic_early_init() - Initialize static VGIC VCPU data structures
46 * @kvm: The VM whose VGIC districutor should be initialized
47 *
48 * Only do initialization of static structures that don't require any
49 * allocation or sizing information from userspace. vgic_init() called
50 * kvm_vgic_dist_init() which takes care of the rest.
51 */
52void kvm_vgic_early_init(struct kvm *kvm)
53{
54 struct vgic_dist *dist = &kvm->arch.vgic;
55
56 xa_init_flags(xa: &dist->lpi_xa, XA_FLAGS_LOCK_IRQ);
57}
58
59/* CREATION */
60
61static int vgic_allocate_private_irqs_locked(struct kvm_vcpu *vcpu, u32 type);
62
63/**
64 * kvm_vgic_create: triggered by the instantiation of the VGIC device by
65 * user space, either through the legacy KVM_CREATE_IRQCHIP ioctl (v2 only)
66 * or through the generic KVM_CREATE_DEVICE API ioctl.
67 * irqchip_in_kernel() tells you if this function succeeded or not.
68 * @kvm: kvm struct pointer
69 * @type: KVM_DEV_TYPE_ARM_VGIC_V[23]
70 */
71int kvm_vgic_create(struct kvm *kvm, u32 type)
72{
73 struct kvm_vcpu *vcpu;
74 unsigned long i;
75 int ret;
76
77 /*
78 * This function is also called by the KVM_CREATE_IRQCHIP handler,
79 * which had no chance yet to check the availability of the GICv2
80 * emulation. So check this here again. KVM_CREATE_DEVICE does
81 * the proper checks already.
82 */
83 if (type == KVM_DEV_TYPE_ARM_VGIC_V2 &&
84 !kvm_vgic_global_state.can_emulate_gicv2)
85 return -ENODEV;
86
87 /*
88 * Ensure mutual exclusion with vCPU creation and any vCPU ioctls by:
89 *
90 * - Holding kvm->lock to prevent KVM_CREATE_VCPU from reaching
91 * kvm_arch_vcpu_precreate() and ensuring created_vcpus is stable.
92 * This alone is insufficient, as kvm_vm_ioctl_create_vcpu() drops
93 * the kvm->lock before completing the vCPU creation.
94 */
95 lockdep_assert_held(&kvm->lock);
96
97 /*
98 * - Acquiring the vCPU mutex for every *online* vCPU to prevent
99 * concurrent vCPU ioctls for vCPUs already visible to userspace.
100 */
101 ret = -EBUSY;
102 if (kvm_trylock_all_vcpus(kvm))
103 return ret;
104
105 /*
106 * - Taking the config_lock which protects VGIC data structures such
107 * as the per-vCPU arrays of private IRQs (SGIs, PPIs).
108 */
109 mutex_lock(&kvm->arch.config_lock);
110
111 /*
112 * - Bailing on the entire thing if a vCPU is in the middle of creation,
113 * dropped the kvm->lock, but hasn't reached kvm_arch_vcpu_create().
114 *
115 * The whole combination of this guarantees that no vCPU can get into
116 * KVM with a VGIC configuration inconsistent with the VM's VGIC.
117 */
118 if (kvm->created_vcpus != atomic_read(v: &kvm->online_vcpus))
119 goto out_unlock;
120
121 if (irqchip_in_kernel(kvm)) {
122 ret = -EEXIST;
123 goto out_unlock;
124 }
125
126 kvm_for_each_vcpu(i, vcpu, kvm) {
127 if (vcpu_has_run_once(vcpu))
128 goto out_unlock;
129 }
130 ret = 0;
131
132 if (type == KVM_DEV_TYPE_ARM_VGIC_V2)
133 kvm->max_vcpus = VGIC_V2_MAX_CPUS;
134 else
135 kvm->max_vcpus = VGIC_V3_MAX_CPUS;
136
137 if (atomic_read(v: &kvm->online_vcpus) > kvm->max_vcpus) {
138 ret = -E2BIG;
139 goto out_unlock;
140 }
141
142 kvm_for_each_vcpu(i, vcpu, kvm) {
143 ret = vgic_allocate_private_irqs_locked(vcpu, type);
144 if (ret)
145 break;
146 }
147
148 if (ret) {
149 kvm_for_each_vcpu(i, vcpu, kvm) {
150 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
151 kfree(objp: vgic_cpu->private_irqs);
152 vgic_cpu->private_irqs = NULL;
153 }
154
155 goto out_unlock;
156 }
157
158 kvm->arch.vgic.in_kernel = true;
159 kvm->arch.vgic.vgic_model = type;
160
161 kvm->arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF;
162
163 if (type == KVM_DEV_TYPE_ARM_VGIC_V2)
164 kvm->arch.vgic.vgic_cpu_base = VGIC_ADDR_UNDEF;
165 else
166 INIT_LIST_HEAD(list: &kvm->arch.vgic.rd_regions);
167
168out_unlock:
169 mutex_unlock(lock: &kvm->arch.config_lock);
170 kvm_unlock_all_vcpus(kvm);
171 return ret;
172}
173
174/* INIT/DESTROY */
175
176/**
177 * kvm_vgic_dist_init: initialize the dist data structures
178 * @kvm: kvm struct pointer
179 * @nr_spis: number of spis, frozen by caller
180 */
181static int kvm_vgic_dist_init(struct kvm *kvm, unsigned int nr_spis)
182{
183 struct vgic_dist *dist = &kvm->arch.vgic;
184 struct kvm_vcpu *vcpu0 = kvm_get_vcpu(kvm, i: 0);
185 int i;
186
187 dist->spis = kcalloc(nr_spis, sizeof(struct vgic_irq), GFP_KERNEL_ACCOUNT);
188 if (!dist->spis)
189 return -ENOMEM;
190
191 /*
192 * In the following code we do not take the irq struct lock since
193 * no other action on irq structs can happen while the VGIC is
194 * not initialized yet:
195 * If someone wants to inject an interrupt or does a MMIO access, we
196 * require prior initialization in case of a virtual GICv3 or trigger
197 * initialization when using a virtual GICv2.
198 */
199 for (i = 0; i < nr_spis; i++) {
200 struct vgic_irq *irq = &dist->spis[i];
201
202 irq->intid = i + VGIC_NR_PRIVATE_IRQS;
203 INIT_LIST_HEAD(list: &irq->ap_list);
204 raw_spin_lock_init(&irq->irq_lock);
205 irq->vcpu = NULL;
206 irq->target_vcpu = vcpu0;
207 kref_init(kref: &irq->refcount);
208 switch (dist->vgic_model) {
209 case KVM_DEV_TYPE_ARM_VGIC_V2:
210 irq->targets = 0;
211 irq->group = 0;
212 break;
213 case KVM_DEV_TYPE_ARM_VGIC_V3:
214 irq->mpidr = 0;
215 irq->group = 1;
216 break;
217 default:
218 kfree(objp: dist->spis);
219 dist->spis = NULL;
220 return -EINVAL;
221 }
222 }
223 return 0;
224}
225
226/* Default GICv3 Maintenance Interrupt INTID, as per SBSA */
227#define DEFAULT_MI_INTID 25
228
229int kvm_vgic_vcpu_nv_init(struct kvm_vcpu *vcpu)
230{
231 int ret;
232
233 guard(mutex)(T: &vcpu->kvm->arch.config_lock);
234
235 /*
236 * Matching the tradition established with the timers, provide
237 * a default PPI for the maintenance interrupt. It makes
238 * things easier to reason about.
239 */
240 if (vcpu->kvm->arch.vgic.mi_intid == 0)
241 vcpu->kvm->arch.vgic.mi_intid = DEFAULT_MI_INTID;
242 ret = kvm_vgic_set_owner(vcpu, vcpu->kvm->arch.intid: vgic.mi_intid, owner: vcpu);
243
244 return ret;
245}
246
247static int vgic_allocate_private_irqs_locked(struct kvm_vcpu *vcpu, u32 type)
248{
249 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
250 int i;
251
252 lockdep_assert_held(&vcpu->kvm->arch.config_lock);
253
254 if (vgic_cpu->private_irqs)
255 return 0;
256
257 vgic_cpu->private_irqs = kcalloc(VGIC_NR_PRIVATE_IRQS,
258 sizeof(struct vgic_irq),
259 GFP_KERNEL_ACCOUNT);
260
261 if (!vgic_cpu->private_irqs)
262 return -ENOMEM;
263
264 /*
265 * Enable and configure all SGIs to be edge-triggered and
266 * configure all PPIs as level-triggered.
267 */
268 for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) {
269 struct vgic_irq *irq = &vgic_cpu->private_irqs[i];
270
271 INIT_LIST_HEAD(list: &irq->ap_list);
272 raw_spin_lock_init(&irq->irq_lock);
273 irq->intid = i;
274 irq->vcpu = NULL;
275 irq->target_vcpu = vcpu;
276 kref_init(kref: &irq->refcount);
277 if (vgic_irq_is_sgi(i)) {
278 /* SGIs */
279 irq->enabled = 1;
280 irq->config = VGIC_CONFIG_EDGE;
281 } else {
282 /* PPIs */
283 irq->config = VGIC_CONFIG_LEVEL;
284 }
285
286 switch (type) {
287 case KVM_DEV_TYPE_ARM_VGIC_V3:
288 irq->group = 1;
289 irq->mpidr = kvm_vcpu_get_mpidr_aff(vcpu);
290 break;
291 case KVM_DEV_TYPE_ARM_VGIC_V2:
292 irq->group = 0;
293 irq->targets = BIT(vcpu->vcpu_id);
294 break;
295 }
296 }
297
298 return 0;
299}
300
301static int vgic_allocate_private_irqs(struct kvm_vcpu *vcpu, u32 type)
302{
303 int ret;
304
305 mutex_lock(&vcpu->kvm->arch.config_lock);
306 ret = vgic_allocate_private_irqs_locked(vcpu, type);
307 mutex_unlock(lock: &vcpu->kvm->arch.config_lock);
308
309 return ret;
310}
311
312/**
313 * kvm_vgic_vcpu_init() - Initialize static VGIC VCPU data
314 * structures and register VCPU-specific KVM iodevs
315 *
316 * @vcpu: pointer to the VCPU being created and initialized
317 *
318 * Only do initialization, but do not actually enable the
319 * VGIC CPU interface
320 */
321int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
322{
323 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
324 struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
325 int ret = 0;
326
327 vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF;
328
329 INIT_LIST_HEAD(list: &vgic_cpu->ap_list_head);
330 raw_spin_lock_init(&vgic_cpu->ap_list_lock);
331 atomic_set(v: &vgic_cpu->vgic_v3.its_vpe.vlpi_count, i: 0);
332
333 if (!irqchip_in_kernel(vcpu->kvm))
334 return 0;
335
336 ret = vgic_allocate_private_irqs(vcpu, type: dist->vgic_model);
337 if (ret)
338 return ret;
339
340 /*
341 * If we are creating a VCPU with a GICv3 we must also register the
342 * KVM io device for the redistributor that belongs to this VCPU.
343 */
344 if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
345 mutex_lock(&vcpu->kvm->slots_lock);
346 ret = vgic_register_redist_iodev(vcpu);
347 mutex_unlock(lock: &vcpu->kvm->slots_lock);
348 }
349 return ret;
350}
351
352static void kvm_vgic_vcpu_enable(struct kvm_vcpu *vcpu)
353{
354 if (kvm_vgic_global_state.type == VGIC_V2)
355 vgic_v2_enable(vcpu);
356 else
357 vgic_v3_enable(vcpu);
358}
359
360/*
361 * vgic_init: allocates and initializes dist and vcpu data structures
362 * depending on two dimensioning parameters:
363 * - the number of spis
364 * - the number of vcpus
365 * The function is generally called when nr_spis has been explicitly set
366 * by the guest through the KVM DEVICE API. If not nr_spis is set to 256.
367 * vgic_initialized() returns true when this function has succeeded.
368 */
369int vgic_init(struct kvm *kvm)
370{
371 struct vgic_dist *dist = &kvm->arch.vgic;
372 struct kvm_vcpu *vcpu;
373 int ret = 0;
374 unsigned long idx;
375
376 lockdep_assert_held(&kvm->arch.config_lock);
377
378 if (vgic_initialized(kvm))
379 return 0;
380
381 /* Are we also in the middle of creating a VCPU? */
382 if (kvm->created_vcpus != atomic_read(v: &kvm->online_vcpus))
383 return -EBUSY;
384
385 /* freeze the number of spis */
386 if (!dist->nr_spis)
387 dist->nr_spis = VGIC_NR_IRQS_LEGACY - VGIC_NR_PRIVATE_IRQS;
388
389 ret = kvm_vgic_dist_init(kvm, nr_spis: dist->nr_spis);
390 if (ret)
391 goto out;
392
393 /*
394 * If we have GICv4.1 enabled, unconditionally request enable the
395 * v4 support so that we get HW-accelerated vSGIs. Otherwise, only
396 * enable it if we present a virtual ITS to the guest.
397 */
398 if (vgic_supports_direct_msis(kvm)) {
399 ret = vgic_v4_init(kvm);
400 if (ret)
401 goto out;
402 }
403
404 kvm_for_each_vcpu(idx, vcpu, kvm)
405 kvm_vgic_vcpu_enable(vcpu);
406
407 ret = kvm_vgic_setup_default_irq_routing(kvm);
408 if (ret)
409 goto out;
410
411 vgic_debug_init(kvm);
412
413 /*
414 * If userspace didn't set the GIC implementation revision,
415 * default to the latest and greatest. You know want it.
416 */
417 if (!dist->implementation_rev)
418 dist->implementation_rev = KVM_VGIC_IMP_REV_LATEST;
419 dist->initialized = true;
420
421out:
422 return ret;
423}
424
425static void kvm_vgic_dist_destroy(struct kvm *kvm)
426{
427 struct vgic_dist *dist = &kvm->arch.vgic;
428 struct vgic_redist_region *rdreg, *next;
429
430 dist->ready = false;
431 dist->initialized = false;
432
433 kfree(objp: dist->spis);
434 dist->spis = NULL;
435 dist->nr_spis = 0;
436 dist->vgic_dist_base = VGIC_ADDR_UNDEF;
437
438 if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
439 list_for_each_entry_safe(rdreg, next, &dist->rd_regions, list)
440 vgic_v3_free_redist_region(kvm, rdreg);
441 INIT_LIST_HEAD(list: &dist->rd_regions);
442 } else {
443 dist->vgic_cpu_base = VGIC_ADDR_UNDEF;
444 }
445
446 if (vgic_supports_direct_msis(kvm))
447 vgic_v4_teardown(kvm);
448
449 xa_destroy(&dist->lpi_xa);
450}
451
452static void __kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
453{
454 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
455
456 /*
457 * Retire all pending LPIs on this vcpu anyway as we're
458 * going to destroy it.
459 */
460 vgic_flush_pending_lpis(vcpu);
461
462 INIT_LIST_HEAD(list: &vgic_cpu->ap_list_head);
463 kfree(objp: vgic_cpu->private_irqs);
464 vgic_cpu->private_irqs = NULL;
465
466 if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
467 /*
468 * If this vCPU is being destroyed because of a failed creation
469 * then unregister the redistributor to avoid leaving behind a
470 * dangling pointer to the vCPU struct.
471 *
472 * vCPUs that have been successfully created (i.e. added to
473 * kvm->vcpu_array) get unregistered in kvm_vgic_destroy(), as
474 * this function gets called while holding kvm->arch.config_lock
475 * in the VM teardown path and would otherwise introduce a lock
476 * inversion w.r.t. kvm->srcu.
477 *
478 * vCPUs that failed creation are torn down outside of the
479 * kvm->arch.config_lock and do not get unregistered in
480 * kvm_vgic_destroy(), meaning it is both safe and necessary to
481 * do so here.
482 */
483 if (kvm_get_vcpu_by_id(kvm: vcpu->kvm, id: vcpu->vcpu_id) != vcpu)
484 vgic_unregister_redist_iodev(vcpu);
485
486 vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF;
487 }
488}
489
490void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
491{
492 struct kvm *kvm = vcpu->kvm;
493
494 mutex_lock(&kvm->slots_lock);
495 __kvm_vgic_vcpu_destroy(vcpu);
496 mutex_unlock(lock: &kvm->slots_lock);
497}
498
499void kvm_vgic_destroy(struct kvm *kvm)
500{
501 struct kvm_vcpu *vcpu;
502 unsigned long i;
503
504 mutex_lock(&kvm->slots_lock);
505 mutex_lock(&kvm->arch.config_lock);
506
507 vgic_debug_destroy(kvm);
508
509 kvm_for_each_vcpu(i, vcpu, kvm)
510 __kvm_vgic_vcpu_destroy(vcpu);
511
512 kvm_vgic_dist_destroy(kvm);
513
514 mutex_unlock(lock: &kvm->arch.config_lock);
515
516 if (kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3)
517 kvm_for_each_vcpu(i, vcpu, kvm)
518 vgic_unregister_redist_iodev(vcpu);
519
520 mutex_unlock(lock: &kvm->slots_lock);
521}
522
523/**
524 * vgic_lazy_init: Lazy init is only allowed if the GIC exposed to the guest
525 * is a GICv2. A GICv3 must be explicitly initialized by userspace using the
526 * KVM_DEV_ARM_VGIC_GRP_CTRL KVM_DEVICE group.
527 * @kvm: kvm struct pointer
528 */
529int vgic_lazy_init(struct kvm *kvm)
530{
531 int ret = 0;
532
533 if (unlikely(!vgic_initialized(kvm))) {
534 /*
535 * We only provide the automatic initialization of the VGIC
536 * for the legacy case of a GICv2. Any other type must
537 * be explicitly initialized once setup with the respective
538 * KVM device call.
539 */
540 if (kvm->arch.vgic.vgic_model != KVM_DEV_TYPE_ARM_VGIC_V2)
541 return -EBUSY;
542
543 mutex_lock(&kvm->arch.config_lock);
544 ret = vgic_init(kvm);
545 mutex_unlock(lock: &kvm->arch.config_lock);
546 }
547
548 return ret;
549}
550
551/* RESOURCE MAPPING */
552
553/**
554 * kvm_vgic_map_resources - map the MMIO regions
555 * @kvm: kvm struct pointer
556 *
557 * Map the MMIO regions depending on the VGIC model exposed to the guest
558 * called on the first VCPU run.
559 * Also map the virtual CPU interface into the VM.
560 * v2 calls vgic_init() if not already done.
561 * v3 and derivatives return an error if the VGIC is not initialized.
562 * vgic_ready() returns true if this function has succeeded.
563 */
564int kvm_vgic_map_resources(struct kvm *kvm)
565{
566 struct vgic_dist *dist = &kvm->arch.vgic;
567 enum vgic_type type;
568 gpa_t dist_base;
569 int ret = 0;
570
571 if (likely(vgic_ready(kvm)))
572 return 0;
573
574 mutex_lock(&kvm->slots_lock);
575 mutex_lock(&kvm->arch.config_lock);
576 if (vgic_ready(kvm))
577 goto out;
578
579 if (!irqchip_in_kernel(kvm))
580 goto out;
581
582 if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2) {
583 ret = vgic_v2_map_resources(kvm);
584 type = VGIC_V2;
585 } else {
586 ret = vgic_v3_map_resources(kvm);
587 type = VGIC_V3;
588 }
589
590 if (ret)
591 goto out;
592
593 dist_base = dist->vgic_dist_base;
594 mutex_unlock(lock: &kvm->arch.config_lock);
595
596 ret = vgic_register_dist_iodev(kvm, dist_base_address: dist_base, type);
597 if (ret) {
598 kvm_err("Unable to register VGIC dist MMIO regions\n");
599 goto out_slots;
600 }
601
602 /*
603 * kvm_io_bus_register_dev() guarantees all readers see the new MMIO
604 * registration before returning through synchronize_srcu(), which also
605 * implies a full memory barrier. As such, marking the distributor as
606 * 'ready' here is guaranteed to be ordered after all vCPUs having seen
607 * a completely configured distributor.
608 */
609 dist->ready = true;
610 goto out_slots;
611out:
612 mutex_unlock(lock: &kvm->arch.config_lock);
613out_slots:
614 if (ret)
615 kvm_vm_dead(kvm);
616
617 mutex_unlock(lock: &kvm->slots_lock);
618
619 return ret;
620}
621
622/* GENERIC PROBE */
623
624void kvm_vgic_cpu_up(void)
625{
626 enable_percpu_irq(irq: kvm_vgic_global_state.maint_irq, type: 0);
627}
628
629
630void kvm_vgic_cpu_down(void)
631{
632 disable_percpu_irq(irq: kvm_vgic_global_state.maint_irq);
633}
634
635static irqreturn_t vgic_maintenance_handler(int irq, void *data)
636{
637 struct kvm_vcpu *vcpu = *(struct kvm_vcpu **)data;
638
639 /*
640 * We cannot rely on the vgic maintenance interrupt to be
641 * delivered synchronously. This means we can only use it to
642 * exit the VM, and we perform the handling of EOIed
643 * interrupts on the exit path (see vgic_fold_lr_state).
644 *
645 * Of course, NV throws a wrench in this plan, and needs
646 * something special.
647 */
648 if (vcpu && vgic_state_is_nested(vcpu))
649 vgic_v3_handle_nested_maint_irq(vcpu);
650
651 return IRQ_HANDLED;
652}
653
654static struct gic_kvm_info *gic_kvm_info;
655
656void __init vgic_set_kvm_info(const struct gic_kvm_info *info)
657{
658 BUG_ON(gic_kvm_info != NULL);
659 gic_kvm_info = kmalloc(sizeof(*info), GFP_KERNEL);
660 if (gic_kvm_info)
661 *gic_kvm_info = *info;
662}
663
664/**
665 * kvm_vgic_init_cpu_hardware - initialize the GIC VE hardware
666 *
667 * For a specific CPU, initialize the GIC VE hardware.
668 */
669void kvm_vgic_init_cpu_hardware(void)
670{
671 BUG_ON(preemptible());
672
673 /*
674 * We want to make sure the list registers start out clear so that we
675 * only have the program the used registers.
676 */
677 if (kvm_vgic_global_state.type == VGIC_V2)
678 vgic_v2_init_lrs();
679 else
680 kvm_call_hyp(__vgic_v3_init_lrs);
681}
682
683/**
684 * kvm_vgic_hyp_init: populates the kvm_vgic_global_state variable
685 * according to the host GIC model. Accordingly calls either
686 * vgic_v2/v3_probe which registers the KVM_DEVICE that can be
687 * instantiated by a guest later on .
688 */
689int kvm_vgic_hyp_init(void)
690{
691 bool has_mask;
692 int ret;
693
694 if (!gic_kvm_info)
695 return -ENODEV;
696
697 has_mask = !gic_kvm_info->no_maint_irq_mask;
698
699 if (has_mask && !gic_kvm_info->maint_irq) {
700 kvm_err("No vgic maintenance irq\n");
701 return -ENXIO;
702 }
703
704 /*
705 * If we get one of these oddball non-GICs, taint the kernel,
706 * as we have no idea of how they *really* behave.
707 */
708 if (gic_kvm_info->no_hw_deactivation) {
709 kvm_info("Non-architectural vgic, tainting kernel\n");
710 add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
711 kvm_vgic_global_state.no_hw_deactivation = true;
712 }
713
714 switch (gic_kvm_info->type) {
715 case GIC_V2:
716 ret = vgic_v2_probe(info: gic_kvm_info);
717 break;
718 case GIC_V3:
719 ret = vgic_v3_probe(info: gic_kvm_info);
720 if (!ret) {
721 static_branch_enable(&kvm_vgic_global_state.gicv3_cpuif);
722 kvm_info("GIC system register CPU interface enabled\n");
723 }
724 break;
725 default:
726 ret = -ENODEV;
727 }
728
729 kvm_vgic_global_state.maint_irq = gic_kvm_info->maint_irq;
730
731 kfree(objp: gic_kvm_info);
732 gic_kvm_info = NULL;
733
734 if (ret)
735 return ret;
736
737 if (!has_mask && !kvm_vgic_global_state.maint_irq)
738 return 0;
739
740 ret = request_percpu_irq(irq: kvm_vgic_global_state.maint_irq,
741 handler: vgic_maintenance_handler,
742 devname: "vgic", percpu_dev_id: kvm_get_running_vcpus());
743 if (ret) {
744 kvm_err("Cannot register interrupt %d\n",
745 kvm_vgic_global_state.maint_irq);
746 return ret;
747 }
748
749 kvm_info("vgic interrupt IRQ%d\n", kvm_vgic_global_state.maint_irq);
750 return 0;
751}
752

source code of linux/arch/arm64/kvm/vgic/vgic-init.c