1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Common pmac/prep/chrp pci routines. -- Cort |
4 | */ |
5 | |
6 | #include <linux/kernel.h> |
7 | #include <linux/pci.h> |
8 | #include <linux/delay.h> |
9 | #include <linux/string.h> |
10 | #include <linux/init.h> |
11 | #include <linux/capability.h> |
12 | #include <linux/sched.h> |
13 | #include <linux/errno.h> |
14 | #include <linux/memblock.h> |
15 | #include <linux/syscalls.h> |
16 | #include <linux/irq.h> |
17 | #include <linux/list.h> |
18 | #include <linux/of.h> |
19 | #include <linux/slab.h> |
20 | #include <linux/export.h> |
21 | |
22 | #include <asm/processor.h> |
23 | #include <asm/io.h> |
24 | #include <asm/sections.h> |
25 | #include <asm/pci-bridge.h> |
26 | #include <asm/ppc-pci.h> |
27 | #include <asm/byteorder.h> |
28 | #include <linux/uaccess.h> |
29 | #include <asm/machdep.h> |
30 | |
31 | #undef DEBUG |
32 | |
33 | unsigned long isa_io_base = 0; |
34 | unsigned long pci_dram_offset = 0; |
35 | int pcibios_assign_bus_offset = 1; |
36 | EXPORT_SYMBOL(isa_io_base); |
37 | EXPORT_SYMBOL(pci_dram_offset); |
38 | |
39 | static void fixup_cpc710_pci64(struct pci_dev* dev); |
40 | |
41 | /* By default, we don't re-assign bus numbers. We do this only on |
42 | * some pmacs |
43 | */ |
44 | static int pci_assign_all_buses; |
45 | |
46 | /* This will remain NULL for now, until isa-bridge.c is made common |
47 | * to both 32-bit and 64-bit. |
48 | */ |
49 | struct pci_dev *isa_bridge_pcidev; |
50 | EXPORT_SYMBOL_GPL(isa_bridge_pcidev); |
51 | |
52 | static void |
53 | fixup_cpc710_pci64(struct pci_dev* dev) |
54 | { |
55 | /* Hide the PCI64 BARs from the kernel as their content doesn't |
56 | * fit well in the resource management |
57 | */ |
58 | dev->resource[0].start = dev->resource[0].end = 0; |
59 | dev->resource[0].flags = 0; |
60 | dev->resource[1].start = dev->resource[1].end = 0; |
61 | dev->resource[1].flags = 0; |
62 | } |
63 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64); |
64 | |
65 | #ifdef CONFIG_PPC_PCI_OF_BUS_MAP |
66 | |
67 | static u8* pci_to_OF_bus_map; |
68 | static int pci_bus_count; |
69 | |
70 | /* |
71 | * Functions below are used on OpenFirmware machines. |
72 | */ |
73 | static void |
74 | make_one_node_map(struct device_node* node, u8 pci_bus) |
75 | { |
76 | const int *bus_range; |
77 | int len; |
78 | |
79 | if (pci_bus >= pci_bus_count) |
80 | return; |
81 | bus_range = of_get_property(node, "bus-range" , &len); |
82 | if (bus_range == NULL || len < 2 * sizeof(int)) { |
83 | printk(KERN_WARNING "Can't get bus-range for %pOF, " |
84 | "assuming it starts at 0\n" , node); |
85 | pci_to_OF_bus_map[pci_bus] = 0; |
86 | } else |
87 | pci_to_OF_bus_map[pci_bus] = bus_range[0]; |
88 | |
89 | for_each_child_of_node(node, node) { |
90 | struct pci_dev* dev; |
91 | const unsigned int *class_code, *reg; |
92 | |
93 | class_code = of_get_property(node, "class-code" , NULL); |
94 | if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI && |
95 | (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) |
96 | continue; |
97 | reg = of_get_property(node, "reg" , NULL); |
98 | if (!reg) |
99 | continue; |
100 | dev = pci_get_domain_bus_and_slot(0, pci_bus, |
101 | ((reg[0] >> 8) & 0xff)); |
102 | if (!dev || !dev->subordinate) { |
103 | pci_dev_put(dev); |
104 | continue; |
105 | } |
106 | make_one_node_map(node, dev->subordinate->number); |
107 | pci_dev_put(dev); |
108 | } |
109 | } |
110 | |
111 | static void __init |
112 | pcibios_make_OF_bus_map(void) |
113 | { |
114 | int i; |
115 | struct pci_controller *hose, *tmp; |
116 | struct property *map_prop; |
117 | struct device_node *dn; |
118 | |
119 | pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL); |
120 | if (!pci_to_OF_bus_map) { |
121 | printk(KERN_ERR "Can't allocate OF bus map !\n" ); |
122 | return; |
123 | } |
124 | |
125 | /* We fill the bus map with invalid values, that helps |
126 | * debugging. |
127 | */ |
128 | for (i=0; i<pci_bus_count; i++) |
129 | pci_to_OF_bus_map[i] = 0xff; |
130 | |
131 | /* For each hose, we begin searching bridges */ |
132 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
133 | struct device_node* node = hose->dn; |
134 | |
135 | if (!node) |
136 | continue; |
137 | make_one_node_map(node, hose->first_busno); |
138 | } |
139 | dn = of_find_node_by_path("/" ); |
140 | map_prop = of_find_property(dn, "pci-OF-bus-map" , NULL); |
141 | if (map_prop) { |
142 | BUG_ON(pci_bus_count > map_prop->length); |
143 | memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count); |
144 | } |
145 | of_node_put(dn); |
146 | #ifdef DEBUG |
147 | printk("PCI->OF bus map:\n" ); |
148 | for (i=0; i<pci_bus_count; i++) { |
149 | if (pci_to_OF_bus_map[i] == 0xff) |
150 | continue; |
151 | printk("%d -> %d\n" , i, pci_to_OF_bus_map[i]); |
152 | } |
153 | #endif |
154 | } |
155 | #endif // CONFIG_PPC_PCI_OF_BUS_MAP |
156 | |
157 | |
158 | #ifdef CONFIG_PPC_PMAC |
159 | /* |
160 | * Returns the PCI device matching a given OF node |
161 | */ |
162 | int pci_device_from_OF_node(struct device_node *node, u8 *bus, u8 *devfn) |
163 | { |
164 | #ifdef CONFIG_PPC_PCI_OF_BUS_MAP |
165 | struct pci_dev *dev = NULL; |
166 | #endif |
167 | const __be32 *reg; |
168 | int size; |
169 | |
170 | /* Check if it might have a chance to be a PCI device */ |
171 | if (!pci_find_hose_for_OF_device(node)) |
172 | return -ENODEV; |
173 | |
174 | reg = of_get_property(node, "reg" , &size); |
175 | if (!reg || size < 5 * sizeof(u32)) |
176 | return -ENODEV; |
177 | |
178 | *bus = (be32_to_cpup(®[0]) >> 16) & 0xff; |
179 | *devfn = (be32_to_cpup(®[0]) >> 8) & 0xff; |
180 | |
181 | #ifndef CONFIG_PPC_PCI_OF_BUS_MAP |
182 | return 0; |
183 | #else |
184 | /* Ok, here we need some tweak. If we have already renumbered |
185 | * all busses, we can't rely on the OF bus number any more. |
186 | * the pci_to_OF_bus_map is not enough as several PCI busses |
187 | * may match the same OF bus number. |
188 | */ |
189 | if (!pci_to_OF_bus_map) |
190 | return 0; |
191 | |
192 | for_each_pci_dev(dev) |
193 | if (pci_to_OF_bus_map[dev->bus->number] == *bus && |
194 | dev->devfn == *devfn) { |
195 | *bus = dev->bus->number; |
196 | pci_dev_put(dev); |
197 | return 0; |
198 | } |
199 | |
200 | return -ENODEV; |
201 | #endif // CONFIG_PPC_PCI_OF_BUS_MAP |
202 | } |
203 | EXPORT_SYMBOL(pci_device_from_OF_node); |
204 | #endif |
205 | |
206 | #ifdef CONFIG_PPC_PCI_OF_BUS_MAP |
207 | /* We create the "pci-OF-bus-map" property now so it appears in the |
208 | * /proc device tree |
209 | */ |
210 | void __init |
211 | pci_create_OF_bus_map(void) |
212 | { |
213 | struct property* of_prop; |
214 | struct device_node *dn; |
215 | |
216 | of_prop = memblock_alloc(sizeof(struct property) + 256, |
217 | SMP_CACHE_BYTES); |
218 | if (!of_prop) |
219 | panic("%s: Failed to allocate %zu bytes\n" , __func__, |
220 | sizeof(struct property) + 256); |
221 | dn = of_find_node_by_path("/" ); |
222 | if (dn) { |
223 | memset(of_prop, -1, sizeof(struct property) + 256); |
224 | of_prop->name = "pci-OF-bus-map" ; |
225 | of_prop->length = 256; |
226 | of_prop->value = &of_prop[1]; |
227 | of_add_property(dn, of_prop); |
228 | of_node_put(dn); |
229 | } |
230 | } |
231 | #endif // CONFIG_PPC_PCI_OF_BUS_MAP |
232 | |
233 | void pcibios_setup_phb_io_space(struct pci_controller *hose) |
234 | { |
235 | unsigned long io_offset; |
236 | struct resource *res = &hose->io_resource; |
237 | |
238 | /* Fixup IO space offset */ |
239 | io_offset = pcibios_io_space_offset(hose); |
240 | res->start += io_offset; |
241 | res->end += io_offset; |
242 | } |
243 | |
244 | static int __init pcibios_init(void) |
245 | { |
246 | struct pci_controller *hose, *tmp; |
247 | #ifndef CONFIG_PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT |
248 | int next_busno = 0; |
249 | #endif |
250 | |
251 | printk(KERN_INFO "PCI: Probing PCI hardware\n" ); |
252 | |
253 | #ifdef CONFIG_PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT |
254 | /* |
255 | * Enable PCI domains in /proc when PCI bus numbers are not unique |
256 | * across all PCI domains to prevent conflicts. And keep PCI domain 0 |
257 | * backward compatible in /proc for video cards. |
258 | */ |
259 | pci_add_flags(PCI_ENABLE_PROC_DOMAINS | PCI_COMPAT_DOMAIN_0); |
260 | #endif |
261 | |
262 | if (pci_has_flag(flag: PCI_REASSIGN_ALL_BUS)) |
263 | pci_assign_all_buses = 1; |
264 | |
265 | /* Scan all of the recorded PCI controllers. */ |
266 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
267 | #ifndef CONFIG_PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT |
268 | if (pci_assign_all_buses) |
269 | hose->first_busno = next_busno; |
270 | #endif |
271 | hose->last_busno = 0xff; |
272 | pcibios_scan_phb(hose); |
273 | pci_bus_add_devices(hose->bus); |
274 | #ifndef CONFIG_PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT |
275 | if (pci_assign_all_buses || next_busno <= hose->last_busno) |
276 | next_busno = hose->last_busno + pcibios_assign_bus_offset; |
277 | #endif |
278 | } |
279 | |
280 | #if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_CHRP) |
281 | #ifdef CONFIG_PPC_PCI_OF_BUS_MAP |
282 | pci_bus_count = next_busno; |
283 | |
284 | /* OpenFirmware based machines need a map of OF bus |
285 | * numbers vs. kernel bus numbers since we may have to |
286 | * remap them. |
287 | */ |
288 | if (pci_assign_all_buses) |
289 | pcibios_make_OF_bus_map(); |
290 | #endif |
291 | #endif |
292 | |
293 | /* Call common code to handle resource allocation */ |
294 | pcibios_resource_survey(); |
295 | |
296 | /* Call machine dependent fixup */ |
297 | if (ppc_md.pcibios_fixup) |
298 | ppc_md.pcibios_fixup(); |
299 | |
300 | /* Call machine dependent post-init code */ |
301 | if (ppc_md.pcibios_after_init) |
302 | ppc_md.pcibios_after_init(); |
303 | |
304 | return 0; |
305 | } |
306 | |
307 | subsys_initcall(pcibios_init); |
308 | |
309 | static struct pci_controller* |
310 | pci_bus_to_hose(int bus) |
311 | { |
312 | struct pci_controller *hose, *tmp; |
313 | |
314 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) |
315 | if (bus >= hose->first_busno && bus <= hose->last_busno) |
316 | return hose; |
317 | return NULL; |
318 | } |
319 | |
320 | /* Provide information on locations of various I/O regions in physical |
321 | * memory. Do this on a per-card basis so that we choose the right |
322 | * root bridge. |
323 | * Note that the returned IO or memory base is a physical address |
324 | */ |
325 | |
326 | SYSCALL_DEFINE3(pciconfig_iobase, long, which, |
327 | unsigned long, bus, unsigned long, devfn) |
328 | { |
329 | struct pci_controller* hose; |
330 | long result = -EOPNOTSUPP; |
331 | |
332 | hose = pci_bus_to_hose(bus); |
333 | if (!hose) |
334 | return -ENODEV; |
335 | |
336 | switch (which) { |
337 | case IOBASE_BRIDGE_NUMBER: |
338 | return (long)hose->first_busno; |
339 | case IOBASE_MEMORY: |
340 | return (long)hose->mem_offset[0]; |
341 | case IOBASE_IO: |
342 | return (long)hose->io_base_phys; |
343 | case IOBASE_ISA_IO: |
344 | return (long)isa_io_base; |
345 | case IOBASE_ISA_MEM: |
346 | return (long)isa_mem_base; |
347 | } |
348 | |
349 | return result; |
350 | } |
351 | |