1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Glue Code for the AVX512/GFNI assembler implementation of the ARIA Cipher
4 *
5 * Copyright (c) 2022 Taehee Yoo <ap420073@gmail.com>
6 */
7
8#include <crypto/algapi.h>
9#include <crypto/aria.h>
10#include <linux/crypto.h>
11#include <linux/err.h>
12#include <linux/module.h>
13#include <linux/types.h>
14
15#include "ecb_cbc_helpers.h"
16#include "aria-avx.h"
17
18asmlinkage void aria_gfni_avx512_encrypt_64way(const void *ctx, u8 *dst,
19 const u8 *src);
20asmlinkage void aria_gfni_avx512_decrypt_64way(const void *ctx, u8 *dst,
21 const u8 *src);
22asmlinkage void aria_gfni_avx512_ctr_crypt_64way(const void *ctx, u8 *dst,
23 const u8 *src,
24 u8 *keystream, u8 *iv);
25
26static struct aria_avx_ops aria_ops;
27
28struct aria_avx512_request_ctx {
29 u8 keystream[ARIA_GFNI_AVX512_PARALLEL_BLOCK_SIZE];
30};
31
32static int ecb_do_encrypt(struct skcipher_request *req, const u32 *rkey)
33{
34 ECB_WALK_START(req, ARIA_BLOCK_SIZE, ARIA_AESNI_PARALLEL_BLOCKS);
35 ECB_BLOCK(ARIA_GFNI_AVX512_PARALLEL_BLOCKS, aria_ops.aria_encrypt_64way);
36 ECB_BLOCK(ARIA_AESNI_AVX2_PARALLEL_BLOCKS, aria_ops.aria_encrypt_32way);
37 ECB_BLOCK(ARIA_AESNI_PARALLEL_BLOCKS, aria_ops.aria_encrypt_16way);
38 ECB_BLOCK(1, aria_encrypt);
39 ECB_WALK_END();
40}
41
42static int ecb_do_decrypt(struct skcipher_request *req, const u32 *rkey)
43{
44 ECB_WALK_START(req, ARIA_BLOCK_SIZE, ARIA_AESNI_PARALLEL_BLOCKS);
45 ECB_BLOCK(ARIA_GFNI_AVX512_PARALLEL_BLOCKS, aria_ops.aria_decrypt_64way);
46 ECB_BLOCK(ARIA_AESNI_AVX2_PARALLEL_BLOCKS, aria_ops.aria_decrypt_32way);
47 ECB_BLOCK(ARIA_AESNI_PARALLEL_BLOCKS, aria_ops.aria_decrypt_16way);
48 ECB_BLOCK(1, aria_decrypt);
49 ECB_WALK_END();
50}
51
52static int aria_avx512_ecb_encrypt(struct skcipher_request *req)
53{
54 struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
55 struct aria_ctx *ctx = crypto_skcipher_ctx(tfm);
56
57 return ecb_do_encrypt(req, rkey: ctx->enc_key[0]);
58}
59
60static int aria_avx512_ecb_decrypt(struct skcipher_request *req)
61{
62 struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
63 struct aria_ctx *ctx = crypto_skcipher_ctx(tfm);
64
65 return ecb_do_decrypt(req, rkey: ctx->dec_key[0]);
66}
67
68static int aria_avx512_set_key(struct crypto_skcipher *tfm, const u8 *key,
69 unsigned int keylen)
70{
71 return aria_set_key(tfm: &tfm->base, in_key: key, key_len: keylen);
72}
73
74static int aria_avx512_ctr_encrypt(struct skcipher_request *req)
75{
76 struct aria_avx512_request_ctx *req_ctx = skcipher_request_ctx(req);
77 struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
78 struct aria_ctx *ctx = crypto_skcipher_ctx(tfm);
79 struct skcipher_walk walk;
80 unsigned int nbytes;
81 int err;
82
83 err = skcipher_walk_virt(walk: &walk, req, atomic: false);
84
85 while ((nbytes = walk.nbytes) > 0) {
86 const u8 *src = walk.src.virt.addr;
87 u8 *dst = walk.dst.virt.addr;
88
89 while (nbytes >= ARIA_GFNI_AVX512_PARALLEL_BLOCK_SIZE) {
90 kernel_fpu_begin();
91 aria_ops.aria_ctr_crypt_64way(ctx, dst, src,
92 &req_ctx->keystream[0],
93 walk.iv);
94 kernel_fpu_end();
95 dst += ARIA_GFNI_AVX512_PARALLEL_BLOCK_SIZE;
96 src += ARIA_GFNI_AVX512_PARALLEL_BLOCK_SIZE;
97 nbytes -= ARIA_GFNI_AVX512_PARALLEL_BLOCK_SIZE;
98 }
99
100 while (nbytes >= ARIA_AESNI_AVX2_PARALLEL_BLOCK_SIZE) {
101 kernel_fpu_begin();
102 aria_ops.aria_ctr_crypt_32way(ctx, dst, src,
103 &req_ctx->keystream[0],
104 walk.iv);
105 kernel_fpu_end();
106 dst += ARIA_AESNI_AVX2_PARALLEL_BLOCK_SIZE;
107 src += ARIA_AESNI_AVX2_PARALLEL_BLOCK_SIZE;
108 nbytes -= ARIA_AESNI_AVX2_PARALLEL_BLOCK_SIZE;
109 }
110
111 while (nbytes >= ARIA_AESNI_PARALLEL_BLOCK_SIZE) {
112 kernel_fpu_begin();
113 aria_ops.aria_ctr_crypt_16way(ctx, dst, src,
114 &req_ctx->keystream[0],
115 walk.iv);
116 kernel_fpu_end();
117 dst += ARIA_AESNI_PARALLEL_BLOCK_SIZE;
118 src += ARIA_AESNI_PARALLEL_BLOCK_SIZE;
119 nbytes -= ARIA_AESNI_PARALLEL_BLOCK_SIZE;
120 }
121
122 while (nbytes >= ARIA_BLOCK_SIZE) {
123 memcpy(&req_ctx->keystream[0], walk.iv,
124 ARIA_BLOCK_SIZE);
125 crypto_inc(a: walk.iv, ARIA_BLOCK_SIZE);
126
127 aria_encrypt(ctx, out: &req_ctx->keystream[0],
128 in: &req_ctx->keystream[0]);
129
130 crypto_xor_cpy(dst, src1: src, src2: &req_ctx->keystream[0],
131 ARIA_BLOCK_SIZE);
132 dst += ARIA_BLOCK_SIZE;
133 src += ARIA_BLOCK_SIZE;
134 nbytes -= ARIA_BLOCK_SIZE;
135 }
136
137 if (walk.nbytes == walk.total && nbytes > 0) {
138 memcpy(&req_ctx->keystream[0], walk.iv,
139 ARIA_BLOCK_SIZE);
140 crypto_inc(a: walk.iv, ARIA_BLOCK_SIZE);
141
142 aria_encrypt(ctx, out: &req_ctx->keystream[0],
143 in: &req_ctx->keystream[0]);
144
145 crypto_xor_cpy(dst, src1: src, src2: &req_ctx->keystream[0],
146 size: nbytes);
147 dst += nbytes;
148 src += nbytes;
149 nbytes = 0;
150 }
151 err = skcipher_walk_done(walk: &walk, res: nbytes);
152 }
153
154 return err;
155}
156
157static int aria_avx512_init_tfm(struct crypto_skcipher *tfm)
158{
159 crypto_skcipher_set_reqsize(skcipher: tfm,
160 reqsize: sizeof(struct aria_avx512_request_ctx));
161
162 return 0;
163}
164
165static struct skcipher_alg aria_algs[] = {
166 {
167 .base.cra_name = "ecb(aria)",
168 .base.cra_driver_name = "ecb-aria-avx512",
169 .base.cra_priority = 600,
170 .base.cra_blocksize = ARIA_BLOCK_SIZE,
171 .base.cra_ctxsize = sizeof(struct aria_ctx),
172 .base.cra_module = THIS_MODULE,
173 .min_keysize = ARIA_MIN_KEY_SIZE,
174 .max_keysize = ARIA_MAX_KEY_SIZE,
175 .setkey = aria_avx512_set_key,
176 .encrypt = aria_avx512_ecb_encrypt,
177 .decrypt = aria_avx512_ecb_decrypt,
178 }, {
179 .base.cra_name = "ctr(aria)",
180 .base.cra_driver_name = "ctr-aria-avx512",
181 .base.cra_priority = 600,
182 .base.cra_flags = CRYPTO_ALG_SKCIPHER_REQSIZE_LARGE,
183 .base.cra_blocksize = 1,
184 .base.cra_ctxsize = sizeof(struct aria_ctx),
185 .base.cra_module = THIS_MODULE,
186 .min_keysize = ARIA_MIN_KEY_SIZE,
187 .max_keysize = ARIA_MAX_KEY_SIZE,
188 .ivsize = ARIA_BLOCK_SIZE,
189 .chunksize = ARIA_BLOCK_SIZE,
190 .setkey = aria_avx512_set_key,
191 .encrypt = aria_avx512_ctr_encrypt,
192 .decrypt = aria_avx512_ctr_encrypt,
193 .init = aria_avx512_init_tfm,
194 }
195};
196
197static int __init aria_avx512_init(void)
198{
199 const char *feature_name;
200
201 if (!boot_cpu_has(X86_FEATURE_AVX) ||
202 !boot_cpu_has(X86_FEATURE_AVX2) ||
203 !boot_cpu_has(X86_FEATURE_AVX512F) ||
204 !boot_cpu_has(X86_FEATURE_AVX512VL) ||
205 !boot_cpu_has(X86_FEATURE_GFNI) ||
206 !boot_cpu_has(X86_FEATURE_OSXSAVE)) {
207 pr_info("AVX512/GFNI instructions are not detected.\n");
208 return -ENODEV;
209 }
210
211 if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM |
212 XFEATURE_MASK_AVX512, feature_name: &feature_name)) {
213 pr_info("CPU feature '%s' is not supported.\n", feature_name);
214 return -ENODEV;
215 }
216
217 aria_ops.aria_encrypt_16way = aria_aesni_avx_gfni_encrypt_16way;
218 aria_ops.aria_decrypt_16way = aria_aesni_avx_gfni_decrypt_16way;
219 aria_ops.aria_ctr_crypt_16way = aria_aesni_avx_gfni_ctr_crypt_16way;
220 aria_ops.aria_encrypt_32way = aria_aesni_avx2_gfni_encrypt_32way;
221 aria_ops.aria_decrypt_32way = aria_aesni_avx2_gfni_decrypt_32way;
222 aria_ops.aria_ctr_crypt_32way = aria_aesni_avx2_gfni_ctr_crypt_32way;
223 aria_ops.aria_encrypt_64way = aria_gfni_avx512_encrypt_64way;
224 aria_ops.aria_decrypt_64way = aria_gfni_avx512_decrypt_64way;
225 aria_ops.aria_ctr_crypt_64way = aria_gfni_avx512_ctr_crypt_64way;
226
227 return crypto_register_skciphers(algs: aria_algs, ARRAY_SIZE(aria_algs));
228}
229
230static void __exit aria_avx512_exit(void)
231{
232 crypto_unregister_skciphers(algs: aria_algs, ARRAY_SIZE(aria_algs));
233}
234
235module_init(aria_avx512_init);
236module_exit(aria_avx512_exit);
237
238MODULE_LICENSE("GPL");
239MODULE_AUTHOR("Taehee Yoo <ap420073@gmail.com>");
240MODULE_DESCRIPTION("ARIA Cipher Algorithm, AVX512/GFNI optimized");
241MODULE_ALIAS_CRYPTO("aria");
242MODULE_ALIAS_CRYPTO("aria-gfni-avx512");
243

source code of linux/arch/x86/crypto/aria_gfni_avx512_glue.c