1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ |
4 | */ |
5 | |
6 | #include <linux/clk-provider.h> |
7 | #include <linux/kernel.h> |
8 | #include <linux/mfd/syscon.h> |
9 | #include <linux/module.h> |
10 | #include <linux/platform_device.h> |
11 | #include <linux/regmap.h> |
12 | #include <linux/slab.h> |
13 | |
14 | struct ti_syscon_gate_clk_priv { |
15 | struct clk_hw hw; |
16 | struct regmap *regmap; |
17 | u32 reg; |
18 | u32 idx; |
19 | }; |
20 | |
21 | struct ti_syscon_gate_clk_data { |
22 | char *name; |
23 | u32 offset; |
24 | u32 bit_idx; |
25 | }; |
26 | |
27 | static struct |
28 | ti_syscon_gate_clk_priv *to_ti_syscon_gate_clk_priv(struct clk_hw *hw) |
29 | { |
30 | return container_of(hw, struct ti_syscon_gate_clk_priv, hw); |
31 | } |
32 | |
33 | static int ti_syscon_gate_clk_enable(struct clk_hw *hw) |
34 | { |
35 | struct ti_syscon_gate_clk_priv *priv = to_ti_syscon_gate_clk_priv(hw); |
36 | |
37 | return regmap_write_bits(map: priv->regmap, reg: priv->reg, mask: priv->idx, |
38 | val: priv->idx); |
39 | } |
40 | |
41 | static void ti_syscon_gate_clk_disable(struct clk_hw *hw) |
42 | { |
43 | struct ti_syscon_gate_clk_priv *priv = to_ti_syscon_gate_clk_priv(hw); |
44 | |
45 | regmap_write_bits(map: priv->regmap, reg: priv->reg, mask: priv->idx, val: 0); |
46 | } |
47 | |
48 | static int ti_syscon_gate_clk_is_enabled(struct clk_hw *hw) |
49 | { |
50 | unsigned int val; |
51 | struct ti_syscon_gate_clk_priv *priv = to_ti_syscon_gate_clk_priv(hw); |
52 | |
53 | regmap_read(map: priv->regmap, reg: priv->reg, val: &val); |
54 | |
55 | return !!(val & priv->idx); |
56 | } |
57 | |
58 | static const struct clk_ops ti_syscon_gate_clk_ops = { |
59 | .enable = ti_syscon_gate_clk_enable, |
60 | .disable = ti_syscon_gate_clk_disable, |
61 | .is_enabled = ti_syscon_gate_clk_is_enabled, |
62 | }; |
63 | |
64 | static struct clk_hw |
65 | *ti_syscon_gate_clk_register(struct device *dev, struct regmap *regmap, |
66 | const char *parent_name, |
67 | const struct ti_syscon_gate_clk_data *data) |
68 | { |
69 | struct ti_syscon_gate_clk_priv *priv; |
70 | struct clk_init_data init; |
71 | char *name = NULL; |
72 | int ret; |
73 | |
74 | priv = devm_kzalloc(dev, size: sizeof(*priv), GFP_KERNEL); |
75 | if (!priv) |
76 | return ERR_PTR(error: -ENOMEM); |
77 | |
78 | init.ops = &ti_syscon_gate_clk_ops; |
79 | if (parent_name) { |
80 | name = kasprintf(GFP_KERNEL, fmt: "%s:%s" , data->name, parent_name); |
81 | init.name = name; |
82 | init.parent_names = &parent_name; |
83 | init.num_parents = 1; |
84 | init.flags = CLK_SET_RATE_PARENT; |
85 | } else { |
86 | init.name = data->name; |
87 | init.parent_names = NULL; |
88 | init.num_parents = 0; |
89 | init.flags = 0; |
90 | } |
91 | |
92 | priv->regmap = regmap; |
93 | priv->reg = data->offset; |
94 | priv->idx = BIT(data->bit_idx); |
95 | priv->hw.init = &init; |
96 | |
97 | ret = devm_clk_hw_register(dev, hw: &priv->hw); |
98 | |
99 | if (name) |
100 | kfree(objp: init.name); |
101 | |
102 | if (ret) |
103 | return ERR_PTR(error: ret); |
104 | |
105 | return &priv->hw; |
106 | } |
107 | |
108 | static int ti_syscon_gate_clk_probe(struct platform_device *pdev) |
109 | { |
110 | const struct ti_syscon_gate_clk_data *data, *p; |
111 | struct clk_hw_onecell_data *hw_data; |
112 | struct device *dev = &pdev->dev; |
113 | int num_clks, num_parents, i; |
114 | const char *parent_name; |
115 | struct regmap *regmap; |
116 | |
117 | data = device_get_match_data(dev); |
118 | if (!data) |
119 | return -EINVAL; |
120 | |
121 | regmap = device_node_to_regmap(np: dev->of_node); |
122 | if (IS_ERR(ptr: regmap)) |
123 | return dev_err_probe(dev, err: PTR_ERR(ptr: regmap), |
124 | fmt: "failed to get regmap\n" ); |
125 | |
126 | num_clks = 0; |
127 | for (p = data; p->name; p++) |
128 | num_clks++; |
129 | |
130 | num_parents = of_clk_get_parent_count(np: dev->of_node); |
131 | if (of_device_is_compatible(device: dev->of_node, "ti,am62-audio-refclk" ) && |
132 | num_parents == 0) { |
133 | return dev_err_probe(dev, err: -EINVAL, |
134 | fmt: "must specify a parent clock\n" ); |
135 | } |
136 | |
137 | hw_data = devm_kzalloc(dev, struct_size(hw_data, hws, num_clks), |
138 | GFP_KERNEL); |
139 | if (!hw_data) |
140 | return -ENOMEM; |
141 | |
142 | hw_data->num = num_clks; |
143 | |
144 | parent_name = of_clk_get_parent_name(np: dev->of_node, index: 0); |
145 | for (i = 0; i < num_clks; i++) { |
146 | hw_data->hws[i] = ti_syscon_gate_clk_register(dev, regmap, |
147 | parent_name, |
148 | data: &data[i]); |
149 | if (IS_ERR(ptr: hw_data->hws[i])) |
150 | dev_warn(dev, "failed to register %s\n" , |
151 | data[i].name); |
152 | } |
153 | |
154 | if (num_clks == 1) |
155 | return devm_of_clk_add_hw_provider(dev, get: of_clk_hw_simple_get, |
156 | data: hw_data->hws[0]); |
157 | return devm_of_clk_add_hw_provider(dev, get: of_clk_hw_onecell_get, data: hw_data); |
158 | } |
159 | |
160 | #define TI_SYSCON_CLK_GATE(_name, _offset, _bit_idx) \ |
161 | { \ |
162 | .name = _name, \ |
163 | .offset = (_offset), \ |
164 | .bit_idx = (_bit_idx), \ |
165 | } |
166 | |
167 | static const struct ti_syscon_gate_clk_data am654_clk_data[] = { |
168 | TI_SYSCON_CLK_GATE("ehrpwm_tbclk0" , 0x0, 0), |
169 | TI_SYSCON_CLK_GATE("ehrpwm_tbclk1" , 0x4, 0), |
170 | TI_SYSCON_CLK_GATE("ehrpwm_tbclk2" , 0x8, 0), |
171 | TI_SYSCON_CLK_GATE("ehrpwm_tbclk3" , 0xc, 0), |
172 | TI_SYSCON_CLK_GATE("ehrpwm_tbclk4" , 0x10, 0), |
173 | TI_SYSCON_CLK_GATE("ehrpwm_tbclk5" , 0x14, 0), |
174 | { /* Sentinel */ }, |
175 | }; |
176 | |
177 | static const struct ti_syscon_gate_clk_data am64_clk_data[] = { |
178 | TI_SYSCON_CLK_GATE("epwm_tbclk0" , 0x0, 0), |
179 | TI_SYSCON_CLK_GATE("epwm_tbclk1" , 0x0, 1), |
180 | TI_SYSCON_CLK_GATE("epwm_tbclk2" , 0x0, 2), |
181 | TI_SYSCON_CLK_GATE("epwm_tbclk3" , 0x0, 3), |
182 | TI_SYSCON_CLK_GATE("epwm_tbclk4" , 0x0, 4), |
183 | TI_SYSCON_CLK_GATE("epwm_tbclk5" , 0x0, 5), |
184 | TI_SYSCON_CLK_GATE("epwm_tbclk6" , 0x0, 6), |
185 | TI_SYSCON_CLK_GATE("epwm_tbclk7" , 0x0, 7), |
186 | TI_SYSCON_CLK_GATE("epwm_tbclk8" , 0x0, 8), |
187 | { /* Sentinel */ }, |
188 | }; |
189 | |
190 | static const struct ti_syscon_gate_clk_data am62_clk_data[] = { |
191 | TI_SYSCON_CLK_GATE("epwm_tbclk0" , 0x0, 0), |
192 | TI_SYSCON_CLK_GATE("epwm_tbclk1" , 0x0, 1), |
193 | TI_SYSCON_CLK_GATE("epwm_tbclk2" , 0x0, 2), |
194 | { /* Sentinel */ }, |
195 | }; |
196 | |
197 | static const struct ti_syscon_gate_clk_data am62_audio_clk_data[] = { |
198 | TI_SYSCON_CLK_GATE("audio_refclk" , 0x0, 15), |
199 | { /* Sentinel */ }, |
200 | }; |
201 | |
202 | static const struct of_device_id ti_syscon_gate_clk_ids[] = { |
203 | { |
204 | .compatible = "ti,am654-ehrpwm-tbclk" , |
205 | .data = &am654_clk_data, |
206 | }, |
207 | { |
208 | .compatible = "ti,am64-epwm-tbclk" , |
209 | .data = &am64_clk_data, |
210 | }, |
211 | { |
212 | .compatible = "ti,am62-epwm-tbclk" , |
213 | .data = &am62_clk_data, |
214 | }, |
215 | { |
216 | .compatible = "ti,am62-audio-refclk" , |
217 | .data = &am62_audio_clk_data, |
218 | }, |
219 | { } |
220 | }; |
221 | MODULE_DEVICE_TABLE(of, ti_syscon_gate_clk_ids); |
222 | |
223 | static struct platform_driver ti_syscon_gate_clk_driver = { |
224 | .probe = ti_syscon_gate_clk_probe, |
225 | .driver = { |
226 | .name = "ti-syscon-gate-clk" , |
227 | .of_match_table = ti_syscon_gate_clk_ids, |
228 | }, |
229 | }; |
230 | module_platform_driver(ti_syscon_gate_clk_driver); |
231 | |
232 | MODULE_AUTHOR("Vignesh Raghavendra <vigneshr@ti.com>" ); |
233 | MODULE_DESCRIPTION("Syscon backed gate-clock driver" ); |
234 | MODULE_LICENSE("GPL" ); |
235 | |