| 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | // |
| 3 | // Copyright (c) 2018 MediaTek Inc. |
| 4 | // Author: Weiyi Lu <weiyi.lu@mediatek.com> |
| 5 | |
| 6 | #include <linux/clk-provider.h> |
| 7 | #include <linux/platform_device.h> |
| 8 | #include <linux/pm_runtime.h> |
| 9 | |
| 10 | #include "clk-mtk.h" |
| 11 | #include "clk-gate.h" |
| 12 | |
| 13 | #include <dt-bindings/clock/mt8183-clk.h> |
| 14 | |
| 15 | static const struct mtk_gate_regs mfg_cg_regs = { |
| 16 | .set_ofs = 0x4, |
| 17 | .clr_ofs = 0x8, |
| 18 | .sta_ofs = 0x0, |
| 19 | }; |
| 20 | |
| 21 | #define GATE_MFG(_id, _name, _parent, _shift) \ |
| 22 | GATE_MTK_FLAGS(_id, _name, _parent, &mfg_cg_regs, _shift, \ |
| 23 | &mtk_clk_gate_ops_setclr, CLK_SET_RATE_PARENT) |
| 24 | |
| 25 | static const struct mtk_gate mfg_clks[] = { |
| 26 | GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d" , "mfg_sel" , 0) |
| 27 | }; |
| 28 | |
| 29 | static const struct mtk_clk_desc mfg_desc = { |
| 30 | .clks = mfg_clks, |
| 31 | .num_clks = ARRAY_SIZE(mfg_clks), |
| 32 | .need_runtime_pm = true, |
| 33 | }; |
| 34 | |
| 35 | static const struct of_device_id of_match_clk_mt8183_mfg[] = { |
| 36 | { |
| 37 | .compatible = "mediatek,mt8183-mfgcfg" , |
| 38 | .data = &mfg_desc, |
| 39 | }, { |
| 40 | /* sentinel */ |
| 41 | } |
| 42 | }; |
| 43 | MODULE_DEVICE_TABLE(of, of_match_clk_mt8183_mfg); |
| 44 | |
| 45 | static struct platform_driver clk_mt8183_mfg_drv = { |
| 46 | .probe = mtk_clk_simple_probe, |
| 47 | .remove = mtk_clk_simple_remove, |
| 48 | .driver = { |
| 49 | .name = "clk-mt8183-mfg" , |
| 50 | .of_match_table = of_match_clk_mt8183_mfg, |
| 51 | }, |
| 52 | }; |
| 53 | module_platform_driver(clk_mt8183_mfg_drv); |
| 54 | |
| 55 | MODULE_DESCRIPTION("MediaTek MT8183 GPU mfg clocks driver" ); |
| 56 | MODULE_LICENSE("GPL" ); |
| 57 | |