1// SPDX-License-Identifier: GPL-2.0-only
2//
3// Copyright (c) 2021 MediaTek Inc.
4// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
5
6#include "clk-gate.h"
7#include "clk-mtk.h"
8
9#include <dt-bindings/clock/mt8195-clk.h>
10#include <linux/clk-provider.h>
11#include <linux/platform_device.h>
12
13static const struct mtk_gate_regs ipe_cg_regs = {
14 .set_ofs = 0x0,
15 .clr_ofs = 0x0,
16 .sta_ofs = 0x0,
17};
18
19#define GATE_IPE(_id, _name, _parent, _shift) \
20 GATE_MTK(_id, _name, _parent, &ipe_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr)
21
22static const struct mtk_gate ipe_clks[] = {
23 GATE_IPE(CLK_IPE_DPE, "ipe_dpe", "top_ipe", 0),
24 GATE_IPE(CLK_IPE_FDVT, "ipe_fdvt", "top_ipe", 1),
25 GATE_IPE(CLK_IPE_ME, "ipe_me", "top_ipe", 2),
26 GATE_IPE(CLK_IPE_TOP, "ipe_top", "top_ipe", 3),
27 GATE_IPE(CLK_IPE_SMI_LARB12, "ipe_smi_larb12", "top_ipe", 4),
28};
29
30static const struct mtk_clk_desc ipe_desc = {
31 .clks = ipe_clks,
32 .num_clks = ARRAY_SIZE(ipe_clks),
33};
34
35static const struct of_device_id of_match_clk_mt8195_ipe[] = {
36 {
37 .compatible = "mediatek,mt8195-ipesys",
38 .data = &ipe_desc,
39 }, {
40 /* sentinel */
41 }
42};
43MODULE_DEVICE_TABLE(of, of_match_clk_mt8195_ipe);
44
45static struct platform_driver clk_mt8195_ipe_drv = {
46 .probe = mtk_clk_simple_probe,
47 .remove_new = mtk_clk_simple_remove,
48 .driver = {
49 .name = "clk-mt8195-ipe",
50 .of_match_table = of_match_clk_mt8195_ipe,
51 },
52};
53module_platform_driver(clk_mt8195_ipe_drv);
54MODULE_LICENSE("GPL");
55

source code of linux/drivers/clk/mediatek/clk-mt8195-ipe.c