| 1 | // SPDX-License-Identifier: GPL-2.0-only |
|---|
| 2 | // |
|---|
| 3 | // Copyright (c) 2021 MediaTek Inc. |
|---|
| 4 | // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com> |
|---|
| 5 | |
|---|
| 6 | #include "clk-gate.h" |
|---|
| 7 | #include "clk-mtk.h" |
|---|
| 8 | |
|---|
| 9 | #include <dt-bindings/clock/mt8195-clk.h> |
|---|
| 10 | #include <linux/clk-provider.h> |
|---|
| 11 | #include <linux/platform_device.h> |
|---|
| 12 | |
|---|
| 13 | static const struct mtk_gate_regs mfg_cg_regs = { |
|---|
| 14 | .set_ofs = 0x4, |
|---|
| 15 | .clr_ofs = 0x8, |
|---|
| 16 | .sta_ofs = 0x0, |
|---|
| 17 | }; |
|---|
| 18 | |
|---|
| 19 | #define GATE_MFG(_id, _name, _parent, _shift) \ |
|---|
| 20 | GATE_MTK_FLAGS(_id, _name, _parent, &mfg_cg_regs, \ |
|---|
| 21 | _shift, &mtk_clk_gate_ops_setclr, \ |
|---|
| 22 | CLK_SET_RATE_PARENT) |
|---|
| 23 | |
|---|
| 24 | static const struct mtk_gate mfg_clks[] = { |
|---|
| 25 | GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d" , "mfg_ck_fast_ref" , 0), |
|---|
| 26 | }; |
|---|
| 27 | |
|---|
| 28 | static const struct mtk_clk_desc mfg_desc = { |
|---|
| 29 | .clks = mfg_clks, |
|---|
| 30 | .num_clks = ARRAY_SIZE(mfg_clks), |
|---|
| 31 | }; |
|---|
| 32 | |
|---|
| 33 | static const struct of_device_id of_match_clk_mt8195_mfg[] = { |
|---|
| 34 | { |
|---|
| 35 | .compatible = "mediatek,mt8195-mfgcfg" , |
|---|
| 36 | .data = &mfg_desc, |
|---|
| 37 | }, { |
|---|
| 38 | /* sentinel */ |
|---|
| 39 | } |
|---|
| 40 | }; |
|---|
| 41 | MODULE_DEVICE_TABLE(of, of_match_clk_mt8195_mfg); |
|---|
| 42 | |
|---|
| 43 | static struct platform_driver clk_mt8195_mfg_drv = { |
|---|
| 44 | .probe = mtk_clk_simple_probe, |
|---|
| 45 | .remove_new = mtk_clk_simple_remove, |
|---|
| 46 | .driver = { |
|---|
| 47 | .name = "clk-mt8195-mfg" , |
|---|
| 48 | .of_match_table = of_match_clk_mt8195_mfg, |
|---|
| 49 | }, |
|---|
| 50 | }; |
|---|
| 51 | module_platform_driver(clk_mt8195_mfg_drv); |
|---|
| 52 | MODULE_LICENSE("GPL" ); |
|---|
| 53 | |
|---|
