| 1 | // SPDX-License-Identifier: GPL-2.0-only |
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| 2 | // |
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| 3 | // Copyright (c) 2021 MediaTek Inc. |
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| 4 | // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com> |
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| 5 | |
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| 6 | #include "clk-gate.h" |
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| 7 | #include "clk-mtk.h" |
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| 8 | |
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| 9 | #include <dt-bindings/clock/mt8195-clk.h> |
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| 10 | #include <linux/clk-provider.h> |
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| 11 | #include <linux/platform_device.h> |
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| 12 | |
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| 13 | static const struct mtk_gate_regs peri_ao_cg_regs = { |
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| 14 | .set_ofs = 0x10, |
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| 15 | .clr_ofs = 0x14, |
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| 16 | .sta_ofs = 0x18, |
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| 17 | }; |
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| 18 | |
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| 19 | #define GATE_PERI_AO(_id, _name, _parent, _shift) \ |
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| 20 | GATE_MTK(_id, _name, _parent, &peri_ao_cg_regs, _shift, &mtk_clk_gate_ops_setclr) |
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| 21 | |
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| 22 | static const struct mtk_gate peri_ao_clks[] = { |
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| 23 | GATE_PERI_AO(CLK_PERI_AO_ETHERNET, "peri_ao_ethernet" , "top_axi" , 0), |
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| 24 | GATE_PERI_AO(CLK_PERI_AO_ETHERNET_BUS, "peri_ao_ethernet_bus" , "top_axi" , 1), |
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| 25 | GATE_PERI_AO(CLK_PERI_AO_FLASHIF_BUS, "peri_ao_flashif_bus" , "top_axi" , 3), |
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| 26 | GATE_PERI_AO(CLK_PERI_AO_FLASHIF_FLASH, "peri_ao_flashif_flash" , "top_spinor" , 5), |
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| 27 | GATE_PERI_AO(CLK_PERI_AO_SSUSB_1P_BUS, "peri_ao_ssusb_1p_bus" , "top_usb_top_1p" , 7), |
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| 28 | GATE_PERI_AO(CLK_PERI_AO_SSUSB_1P_XHCI, "peri_ao_ssusb_1p_xhci" , "top_ssusb_xhci_1p" , 8), |
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| 29 | GATE_PERI_AO(CLK_PERI_AO_SSUSB_2P_BUS, "peri_ao_ssusb_2p_bus" , "top_usb_top_2p" , 9), |
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| 30 | GATE_PERI_AO(CLK_PERI_AO_SSUSB_2P_XHCI, "peri_ao_ssusb_2p_xhci" , "top_ssusb_xhci_2p" , 10), |
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| 31 | GATE_PERI_AO(CLK_PERI_AO_SSUSB_3P_BUS, "peri_ao_ssusb_3p_bus" , "top_usb_top_3p" , 11), |
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| 32 | GATE_PERI_AO(CLK_PERI_AO_SSUSB_3P_XHCI, "peri_ao_ssusb_3p_xhci" , "top_ssusb_xhci_3p" , 12), |
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| 33 | GATE_PERI_AO(CLK_PERI_AO_SPINFI, "peri_ao_spinfi" , "top_spinfi_bclk" , 15), |
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| 34 | GATE_PERI_AO(CLK_PERI_AO_ETHERNET_MAC, "peri_ao_ethernet_mac" , "top_snps_eth_250m" , 16), |
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| 35 | GATE_PERI_AO(CLK_PERI_AO_NFI_H, "peri_ao_nfi_h" , "top_axi" , 19), |
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| 36 | GATE_PERI_AO(CLK_PERI_AO_FNFI1X, "peri_ao_fnfi1x" , "top_nfi1x" , 20), |
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| 37 | GATE_PERI_AO(CLK_PERI_AO_PCIE_P0_MEM, "peri_ao_pcie_p0_mem" , "mem_466m" , 24), |
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| 38 | GATE_PERI_AO(CLK_PERI_AO_PCIE_P1_MEM, "peri_ao_pcie_p1_mem" , "mem_466m" , 25), |
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| 39 | }; |
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| 40 | |
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| 41 | static const struct mtk_clk_desc peri_ao_desc = { |
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| 42 | .clks = peri_ao_clks, |
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| 43 | .num_clks = ARRAY_SIZE(peri_ao_clks), |
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| 44 | }; |
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| 45 | |
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| 46 | static const struct of_device_id of_match_clk_mt8195_peri_ao[] = { |
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| 47 | { |
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| 48 | .compatible = "mediatek,mt8195-pericfg_ao" , |
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| 49 | .data = &peri_ao_desc, |
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| 50 | }, { |
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| 51 | /* sentinel */ |
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| 52 | } |
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| 53 | }; |
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| 54 | MODULE_DEVICE_TABLE(of, of_match_clk_mt8195_peri_ao); |
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| 55 | |
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| 56 | static struct platform_driver clk_mt8195_peri_ao_drv = { |
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| 57 | .probe = mtk_clk_simple_probe, |
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| 58 | .remove_new = mtk_clk_simple_remove, |
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| 59 | .driver = { |
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| 60 | .name = "clk-mt8195-peri_ao" , |
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| 61 | .of_match_table = of_match_clk_mt8195_peri_ao, |
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| 62 | }, |
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| 63 | }; |
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| 64 | module_platform_driver(clk_mt8195_peri_ao_drv); |
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| 65 | MODULE_LICENSE("GPL" ); |
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| 66 | |
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