| 1 | // SPDX-License-Identifier: GPL-2.0-only |
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| 2 | // |
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| 3 | // Copyright (c) 2021 MediaTek Inc. |
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| 4 | // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com> |
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| 5 | |
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| 6 | #include "clk-gate.h" |
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| 7 | #include "clk-mtk.h" |
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| 8 | |
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| 9 | #include <dt-bindings/clock/mt8195-clk.h> |
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| 10 | #include <linux/clk-provider.h> |
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| 11 | #include <linux/platform_device.h> |
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| 12 | |
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| 13 | static const struct mtk_gate_regs venc_cg_regs = { |
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| 14 | .set_ofs = 0x4, |
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| 15 | .clr_ofs = 0x8, |
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| 16 | .sta_ofs = 0x0, |
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| 17 | }; |
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| 18 | |
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| 19 | #define GATE_VENC(_id, _name, _parent, _shift) \ |
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| 20 | GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv) |
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| 21 | |
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| 22 | static const struct mtk_gate venc_clks[] = { |
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| 23 | GATE_VENC(CLK_VENC_LARB, "venc_larb" , "top_venc" , 0), |
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| 24 | GATE_VENC(CLK_VENC_VENC, "venc_venc" , "top_venc" , 4), |
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| 25 | GATE_VENC(CLK_VENC_JPGENC, "venc_jpgenc" , "top_venc" , 8), |
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| 26 | GATE_VENC(CLK_VENC_JPGDEC, "venc_jpgdec" , "top_venc" , 12), |
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| 27 | GATE_VENC(CLK_VENC_JPGDEC_C1, "venc_jpgdec_c1" , "top_venc" , 16), |
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| 28 | GATE_VENC(CLK_VENC_GALS, "venc_gals" , "top_venc" , 28), |
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| 29 | }; |
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| 30 | |
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| 31 | static const struct mtk_gate venc_core1_clks[] = { |
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| 32 | GATE_VENC(CLK_VENC_CORE1_LARB, "venc_core1_larb" , "top_venc" , 0), |
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| 33 | GATE_VENC(CLK_VENC_CORE1_VENC, "venc_core1_venc" , "top_venc" , 4), |
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| 34 | GATE_VENC(CLK_VENC_CORE1_JPGENC, "venc_core1_jpgenc" , "top_venc" , 8), |
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| 35 | GATE_VENC(CLK_VENC_CORE1_JPGDEC, "venc_core1_jpgdec" , "top_venc" , 12), |
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| 36 | GATE_VENC(CLK_VENC_CORE1_JPGDEC_C1, "venc_core1_jpgdec_c1" , "top_venc" , 16), |
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| 37 | GATE_VENC(CLK_VENC_CORE1_GALS, "venc_core1_gals" , "top_venc" , 28), |
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| 38 | }; |
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| 39 | |
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| 40 | static const struct mtk_clk_desc venc_desc = { |
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| 41 | .clks = venc_clks, |
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| 42 | .num_clks = ARRAY_SIZE(venc_clks), |
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| 43 | }; |
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| 44 | |
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| 45 | static const struct mtk_clk_desc venc_core1_desc = { |
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| 46 | .clks = venc_core1_clks, |
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| 47 | .num_clks = ARRAY_SIZE(venc_core1_clks), |
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| 48 | }; |
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| 49 | |
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| 50 | static const struct of_device_id of_match_clk_mt8195_venc[] = { |
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| 51 | { |
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| 52 | .compatible = "mediatek,mt8195-vencsys" , |
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| 53 | .data = &venc_desc, |
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| 54 | }, { |
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| 55 | .compatible = "mediatek,mt8195-vencsys_core1" , |
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| 56 | .data = &venc_core1_desc, |
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| 57 | }, { |
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| 58 | /* sentinel */ |
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| 59 | } |
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| 60 | }; |
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| 61 | MODULE_DEVICE_TABLE(of, of_match_clk_mt8195_venc); |
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| 62 | |
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| 63 | static struct platform_driver clk_mt8195_venc_drv = { |
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| 64 | .probe = mtk_clk_simple_probe, |
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| 65 | .remove_new = mtk_clk_simple_remove, |
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| 66 | .driver = { |
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| 67 | .name = "clk-mt8195-venc" , |
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| 68 | .of_match_table = of_match_clk_mt8195_venc, |
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| 69 | }, |
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| 70 | }; |
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| 71 | module_platform_driver(clk_mt8195_venc_drv); |
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| 72 | MODULE_LICENSE("GPL" ); |
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| 73 | |
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