| 1 | // SPDX-License-Identifier: GPL-2.0 |
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| 2 | /* |
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| 3 | * Copyright (c) 2019 MediaTek Inc. |
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| 4 | * Author: James Liao <jamesjj.liao@mediatek.com> |
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| 5 | * Fabien Parent <fparent@baylibre.com> |
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| 6 | * Copyright (c) 2023 Collabora Ltd. |
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| 7 | */ |
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| 8 | |
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| 9 | #include <linux/clk-provider.h> |
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| 10 | #include <linux/mod_devicetable.h> |
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| 11 | #include <linux/platform_device.h> |
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| 12 | |
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| 13 | #include "clk-mtk.h" |
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| 14 | #include "clk-gate.h" |
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| 15 | |
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| 16 | #include <dt-bindings/clock/mt8516-clk.h> |
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| 17 | |
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| 18 | static const struct mtk_gate_regs aud_cg_regs = { |
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| 19 | .set_ofs = 0x0, |
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| 20 | .clr_ofs = 0x0, |
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| 21 | .sta_ofs = 0x0, |
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| 22 | }; |
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| 23 | |
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| 24 | #define GATE_AUD(_id, _name, _parent, _shift) \ |
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| 25 | GATE_MTK(_id, _name, _parent, &aud_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr) |
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| 26 | |
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| 27 | static const struct mtk_gate aud_clks[] = { |
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| 28 | GATE_AUD(CLK_AUD_AFE, "aud_afe" , "clk26m_ck" , 2), |
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| 29 | GATE_AUD(CLK_AUD_I2S, "aud_i2s" , "i2s_infra_bck" , 6), |
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| 30 | GATE_AUD(CLK_AUD_22M, "aud_22m" , "rg_aud_engen1" , 8), |
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| 31 | GATE_AUD(CLK_AUD_24M, "aud_24m" , "rg_aud_engen2" , 9), |
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| 32 | GATE_AUD(CLK_AUD_INTDIR, "aud_intdir" , "rg_aud_spdif_in" , 15), |
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| 33 | GATE_AUD(CLK_AUD_APLL2_TUNER, "aud_apll2_tuner" , "rg_aud_engen2" , 18), |
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| 34 | GATE_AUD(CLK_AUD_APLL_TUNER, "aud_apll_tuner" , "rg_aud_engen1" , 19), |
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| 35 | GATE_AUD(CLK_AUD_HDMI, "aud_hdmi" , "apll12_div4" , 20), |
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| 36 | GATE_AUD(CLK_AUD_SPDF, "aud_spdf" , "apll12_div6" , 21), |
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| 37 | GATE_AUD(CLK_AUD_ADC, "aud_adc" , "aud_afe" , 24), |
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| 38 | GATE_AUD(CLK_AUD_DAC, "aud_dac" , "aud_afe" , 25), |
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| 39 | GATE_AUD(CLK_AUD_DAC_PREDIS, "aud_dac_predis" , "aud_afe" , 26), |
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| 40 | GATE_AUD(CLK_AUD_TML, "aud_tml" , "aud_afe" , 27), |
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| 41 | }; |
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| 42 | |
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| 43 | static const struct mtk_clk_desc aud_desc = { |
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| 44 | .clks = aud_clks, |
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| 45 | .num_clks = ARRAY_SIZE(aud_clks), |
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| 46 | }; |
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| 47 | |
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| 48 | static const struct of_device_id of_match_clk_mt8516_aud[] = { |
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| 49 | { .compatible = "mediatek,mt8516-audsys" , .data = &aud_desc }, |
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| 50 | { /* sentinel */ } |
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| 51 | }; |
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| 52 | MODULE_DEVICE_TABLE(of, of_match_clk_mt8516_aud); |
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| 53 | |
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| 54 | static struct platform_driver clk_mt8516_aud_drv = { |
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| 55 | .probe = mtk_clk_simple_probe, |
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| 56 | .remove = mtk_clk_simple_remove, |
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| 57 | .driver = { |
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| 58 | .name = "clk-mt8516-aud" , |
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| 59 | .of_match_table = of_match_clk_mt8516_aud, |
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| 60 | }, |
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| 61 | }; |
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| 62 | module_platform_driver(clk_mt8516_aud_drv); |
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| 63 | |
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| 64 | MODULE_DESCRIPTION("MediaTek MT8516 audiosys clocks driver" ); |
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| 65 | MODULE_LICENSE("GPL" ); |
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| 66 | |
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