1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * GPIO interface for IT87xx Super I/O chips |
4 | * |
5 | * Author: Diego Elio Pettenò <flameeyes@flameeyes.eu> |
6 | * Copyright (c) 2017 Google, Inc. |
7 | * |
8 | * Based on it87_wdt.c by Oliver Schuster |
9 | * gpio-it8761e.c by Denis Turischev |
10 | * gpio-stmpe.c by Rabin Vincent |
11 | */ |
12 | |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
14 | |
15 | #include <linux/init.h> |
16 | #include <linux/kernel.h> |
17 | #include <linux/module.h> |
18 | #include <linux/io.h> |
19 | #include <linux/errno.h> |
20 | #include <linux/ioport.h> |
21 | #include <linux/slab.h> |
22 | #include <linux/gpio/driver.h> |
23 | |
24 | /* Chip Id numbers */ |
25 | #define NO_DEV_ID 0xffff |
26 | #define IT8613_ID 0x8613 |
27 | #define IT8620_ID 0x8620 |
28 | #define IT8628_ID 0x8628 |
29 | #define IT8718_ID 0x8718 |
30 | #define IT8728_ID 0x8728 |
31 | #define IT8732_ID 0x8732 |
32 | #define IT8761_ID 0x8761 |
33 | #define IT8772_ID 0x8772 |
34 | #define IT8786_ID 0x8786 |
35 | |
36 | /* IO Ports */ |
37 | #define REG 0x2e |
38 | #define VAL 0x2f |
39 | |
40 | /* Logical device Numbers LDN */ |
41 | #define GPIO 0x07 |
42 | |
43 | /* Configuration Registers and Functions */ |
44 | #define LDNREG 0x07 |
45 | #define CHIPID 0x20 |
46 | #define CHIPREV 0x22 |
47 | |
48 | /** |
49 | * struct it87_gpio - it87-specific GPIO chip |
50 | * @chip: the underlying gpio_chip structure |
51 | * @lock: a lock to avoid races between operations |
52 | * @io_base: base address for gpio ports |
53 | * @io_size: size of the port rage starting from io_base. |
54 | * @output_base: Super I/O register address for Output Enable register |
55 | * @simple_base: Super I/O 'Simple I/O' Enable register |
56 | * @simple_size: Super IO 'Simple I/O' Enable register size; this is |
57 | * required because IT87xx chips might only provide Simple I/O |
58 | * switches on a subset of lines, whereas the others keep the |
59 | * same status all time. |
60 | */ |
61 | struct it87_gpio { |
62 | struct gpio_chip chip; |
63 | spinlock_t lock; |
64 | u16 io_base; |
65 | u16 io_size; |
66 | u8 output_base; |
67 | u8 simple_base; |
68 | u8 simple_size; |
69 | }; |
70 | |
71 | static struct it87_gpio it87_gpio_chip = { |
72 | .lock = __SPIN_LOCK_UNLOCKED(it87_gpio_chip.lock), |
73 | }; |
74 | |
75 | /* Superio chip access functions; copied from wdt_it87 */ |
76 | |
77 | static inline int superio_enter(void) |
78 | { |
79 | /* |
80 | * Try to reserve REG and REG + 1 for exclusive access. |
81 | */ |
82 | if (!request_muxed_region(REG, 2, KBUILD_MODNAME)) |
83 | return -EBUSY; |
84 | |
85 | outb(value: 0x87, REG); |
86 | outb(value: 0x01, REG); |
87 | outb(value: 0x55, REG); |
88 | outb(value: 0x55, REG); |
89 | return 0; |
90 | } |
91 | |
92 | static inline void superio_exit(void) |
93 | { |
94 | outb(value: 0x02, REG); |
95 | outb(value: 0x02, VAL); |
96 | release_region(REG, 2); |
97 | } |
98 | |
99 | static inline void superio_select(int ldn) |
100 | { |
101 | outb(LDNREG, REG); |
102 | outb(value: ldn, VAL); |
103 | } |
104 | |
105 | static inline int superio_inb(int reg) |
106 | { |
107 | outb(value: reg, REG); |
108 | return inb(VAL); |
109 | } |
110 | |
111 | static inline void superio_outb(int val, int reg) |
112 | { |
113 | outb(value: reg, REG); |
114 | outb(value: val, VAL); |
115 | } |
116 | |
117 | static inline int superio_inw(int reg) |
118 | { |
119 | int val; |
120 | |
121 | outb(value: reg++, REG); |
122 | val = inb(VAL) << 8; |
123 | outb(value: reg, REG); |
124 | val |= inb(VAL); |
125 | return val; |
126 | } |
127 | |
128 | static inline void superio_set_mask(int mask, int reg) |
129 | { |
130 | u8 curr_val = superio_inb(reg); |
131 | u8 new_val = curr_val | mask; |
132 | |
133 | if (curr_val != new_val) |
134 | superio_outb(val: new_val, reg); |
135 | } |
136 | |
137 | static inline void superio_clear_mask(int mask, int reg) |
138 | { |
139 | u8 curr_val = superio_inb(reg); |
140 | u8 new_val = curr_val & ~mask; |
141 | |
142 | if (curr_val != new_val) |
143 | superio_outb(val: new_val, reg); |
144 | } |
145 | |
146 | static int it87_gpio_request(struct gpio_chip *chip, unsigned gpio_num) |
147 | { |
148 | u8 mask, group; |
149 | int rc = 0; |
150 | struct it87_gpio *it87_gpio = gpiochip_get_data(gc: chip); |
151 | |
152 | mask = 1 << (gpio_num % 8); |
153 | group = (gpio_num / 8); |
154 | |
155 | spin_lock(lock: &it87_gpio->lock); |
156 | |
157 | rc = superio_enter(); |
158 | if (rc) |
159 | goto exit; |
160 | |
161 | /* not all the IT87xx chips support Simple I/O and not all of |
162 | * them allow all the lines to be set/unset to Simple I/O. |
163 | */ |
164 | if (group < it87_gpio->simple_size) |
165 | superio_set_mask(mask, reg: group + it87_gpio->simple_base); |
166 | |
167 | /* clear output enable, setting the pin to input, as all the |
168 | * newly-exported GPIO interfaces are set to input. |
169 | */ |
170 | superio_clear_mask(mask, reg: group + it87_gpio->output_base); |
171 | |
172 | superio_exit(); |
173 | |
174 | exit: |
175 | spin_unlock(lock: &it87_gpio->lock); |
176 | return rc; |
177 | } |
178 | |
179 | static int it87_gpio_get(struct gpio_chip *chip, unsigned gpio_num) |
180 | { |
181 | u16 reg; |
182 | u8 mask; |
183 | struct it87_gpio *it87_gpio = gpiochip_get_data(gc: chip); |
184 | |
185 | mask = 1 << (gpio_num % 8); |
186 | reg = (gpio_num / 8) + it87_gpio->io_base; |
187 | |
188 | return !!(inb(port: reg) & mask); |
189 | } |
190 | |
191 | static int it87_gpio_direction_in(struct gpio_chip *chip, unsigned gpio_num) |
192 | { |
193 | u8 mask, group; |
194 | int rc = 0; |
195 | struct it87_gpio *it87_gpio = gpiochip_get_data(gc: chip); |
196 | |
197 | mask = 1 << (gpio_num % 8); |
198 | group = (gpio_num / 8); |
199 | |
200 | spin_lock(lock: &it87_gpio->lock); |
201 | |
202 | rc = superio_enter(); |
203 | if (rc) |
204 | goto exit; |
205 | |
206 | /* clear the output enable bit */ |
207 | superio_clear_mask(mask, reg: group + it87_gpio->output_base); |
208 | |
209 | superio_exit(); |
210 | |
211 | exit: |
212 | spin_unlock(lock: &it87_gpio->lock); |
213 | return rc; |
214 | } |
215 | |
216 | static int it87_gpio_set(struct gpio_chip *chip, unsigned int gpio_num, int val) |
217 | { |
218 | u8 mask, curr_vals; |
219 | u16 reg; |
220 | struct it87_gpio *it87_gpio = gpiochip_get_data(gc: chip); |
221 | |
222 | mask = 1 << (gpio_num % 8); |
223 | reg = (gpio_num / 8) + it87_gpio->io_base; |
224 | |
225 | curr_vals = inb(port: reg); |
226 | if (val) |
227 | outb(value: curr_vals | mask, port: reg); |
228 | else |
229 | outb(value: curr_vals & ~mask, port: reg); |
230 | |
231 | return 0; |
232 | } |
233 | |
234 | static int it87_gpio_direction_out(struct gpio_chip *chip, |
235 | unsigned gpio_num, int val) |
236 | { |
237 | u8 mask, group; |
238 | int rc = 0; |
239 | struct it87_gpio *it87_gpio = gpiochip_get_data(gc: chip); |
240 | |
241 | mask = 1 << (gpio_num % 8); |
242 | group = (gpio_num / 8); |
243 | |
244 | spin_lock(lock: &it87_gpio->lock); |
245 | |
246 | rc = superio_enter(); |
247 | if (rc) |
248 | goto exit; |
249 | |
250 | /* set the output enable bit */ |
251 | superio_set_mask(mask, reg: group + it87_gpio->output_base); |
252 | |
253 | rc = it87_gpio_set(chip, gpio_num, val); |
254 | if (rc) |
255 | goto exit; |
256 | |
257 | superio_exit(); |
258 | |
259 | exit: |
260 | spin_unlock(lock: &it87_gpio->lock); |
261 | return rc; |
262 | } |
263 | |
264 | static const struct gpio_chip it87_template_chip = { |
265 | .label = KBUILD_MODNAME, |
266 | .owner = THIS_MODULE, |
267 | .request = it87_gpio_request, |
268 | .get = it87_gpio_get, |
269 | .direction_input = it87_gpio_direction_in, |
270 | .set_rv = it87_gpio_set, |
271 | .direction_output = it87_gpio_direction_out, |
272 | .base = -1 |
273 | }; |
274 | |
275 | static int __init it87_gpio_init(void) |
276 | { |
277 | int rc = 0, i; |
278 | u16 chip_type; |
279 | u8 chip_rev, gpio_ba_reg; |
280 | char *labels, **labels_table; |
281 | |
282 | struct it87_gpio *it87_gpio = &it87_gpio_chip; |
283 | |
284 | rc = superio_enter(); |
285 | if (rc) |
286 | return rc; |
287 | |
288 | chip_type = superio_inw(CHIPID); |
289 | chip_rev = superio_inb(CHIPREV) & 0x0f; |
290 | superio_exit(); |
291 | |
292 | it87_gpio->chip = it87_template_chip; |
293 | |
294 | switch (chip_type) { |
295 | case IT8613_ID: |
296 | gpio_ba_reg = 0x62; |
297 | it87_gpio->io_size = 8; /* it8613 only needs 6, use 8 for alignment */ |
298 | it87_gpio->output_base = 0xc8; |
299 | it87_gpio->simple_base = 0xc0; |
300 | it87_gpio->simple_size = 6; |
301 | it87_gpio->chip.ngpio = 64; /* has 48, use 64 for convenient calc */ |
302 | break; |
303 | case IT8620_ID: |
304 | case IT8628_ID: |
305 | gpio_ba_reg = 0x62; |
306 | it87_gpio->io_size = 11; |
307 | it87_gpio->output_base = 0xc8; |
308 | it87_gpio->simple_size = 0; |
309 | it87_gpio->chip.ngpio = 64; |
310 | break; |
311 | case IT8718_ID: |
312 | case IT8728_ID: |
313 | case IT8732_ID: |
314 | case IT8772_ID: |
315 | case IT8786_ID: |
316 | gpio_ba_reg = 0x62; |
317 | it87_gpio->io_size = 8; |
318 | it87_gpio->output_base = 0xc8; |
319 | it87_gpio->simple_base = 0xc0; |
320 | it87_gpio->simple_size = 5; |
321 | it87_gpio->chip.ngpio = 64; |
322 | break; |
323 | case IT8761_ID: |
324 | gpio_ba_reg = 0x60; |
325 | it87_gpio->io_size = 4; |
326 | it87_gpio->output_base = 0xf0; |
327 | it87_gpio->simple_size = 0; |
328 | it87_gpio->chip.ngpio = 16; |
329 | break; |
330 | case NO_DEV_ID: |
331 | pr_err("no device\n" ); |
332 | return -ENODEV; |
333 | default: |
334 | pr_err("Unknown Chip found, Chip %04x Revision %x\n" , |
335 | chip_type, chip_rev); |
336 | return -ENODEV; |
337 | } |
338 | |
339 | rc = superio_enter(); |
340 | if (rc) |
341 | return rc; |
342 | |
343 | superio_select(GPIO); |
344 | |
345 | /* fetch GPIO base address */ |
346 | it87_gpio->io_base = superio_inw(reg: gpio_ba_reg); |
347 | |
348 | superio_exit(); |
349 | |
350 | pr_info("Found Chip IT%04x rev %x. %u GPIO lines starting at %04xh\n" , |
351 | chip_type, chip_rev, it87_gpio->chip.ngpio, |
352 | it87_gpio->io_base); |
353 | |
354 | if (!request_region(it87_gpio->io_base, it87_gpio->io_size, |
355 | KBUILD_MODNAME)) |
356 | return -EBUSY; |
357 | |
358 | /* Set up aliases for the GPIO connection. |
359 | * |
360 | * ITE documentation for recent chips such as the IT8728F |
361 | * refers to the GPIO lines as GPxy, with a coordinates system |
362 | * where x is the GPIO group (starting from 1) and y is the |
363 | * bit within the group. |
364 | * |
365 | * By creating these aliases, we make it easier to understand |
366 | * to which GPIO pin we're referring to. |
367 | */ |
368 | labels = kcalloc(it87_gpio->chip.ngpio, sizeof("it87_gpXY" ), |
369 | GFP_KERNEL); |
370 | labels_table = kcalloc(it87_gpio->chip.ngpio, sizeof(const char *), |
371 | GFP_KERNEL); |
372 | |
373 | if (!labels || !labels_table) { |
374 | rc = -ENOMEM; |
375 | goto labels_free; |
376 | } |
377 | |
378 | for (i = 0; i < it87_gpio->chip.ngpio; i++) { |
379 | char *label = &labels[i * sizeof("it87_gpXY" )]; |
380 | |
381 | sprintf(buf: label, fmt: "it87_gp%u%u" , 1+(i/8), i%8); |
382 | labels_table[i] = label; |
383 | } |
384 | |
385 | it87_gpio->chip.names = (const char *const*)labels_table; |
386 | |
387 | rc = gpiochip_add_data(&it87_gpio->chip, it87_gpio); |
388 | if (rc) |
389 | goto labels_free; |
390 | |
391 | return 0; |
392 | |
393 | labels_free: |
394 | kfree(objp: labels_table); |
395 | kfree(objp: labels); |
396 | release_region(it87_gpio->io_base, it87_gpio->io_size); |
397 | return rc; |
398 | } |
399 | |
400 | static void __exit it87_gpio_exit(void) |
401 | { |
402 | struct it87_gpio *it87_gpio = &it87_gpio_chip; |
403 | |
404 | gpiochip_remove(gc: &it87_gpio->chip); |
405 | release_region(it87_gpio->io_base, it87_gpio->io_size); |
406 | kfree(objp: it87_gpio->chip.names[0]); |
407 | kfree(objp: it87_gpio->chip.names); |
408 | } |
409 | |
410 | module_init(it87_gpio_init); |
411 | module_exit(it87_gpio_exit); |
412 | |
413 | MODULE_AUTHOR("Diego Elio Pettenò <flameeyes@flameeyes.eu>" ); |
414 | MODULE_DESCRIPTION("GPIO interface for IT87xx Super I/O chips" ); |
415 | MODULE_LICENSE("GPL" ); |
416 | |