| 1 | /* |
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| 2 | * Copyright 2016 Advanced Micro Devices, Inc. |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the "Software"), |
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| 6 | * to deal in the Software without restriction, including without limitation |
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 9 | * Software is furnished to do so, subject to the following conditions: |
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| 10 | * |
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| 11 | * The above copyright notice and this permission notice shall be included in |
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| 12 | * all copies or substantial portions of the Software. |
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| 13 | * |
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| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
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| 21 | * |
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| 22 | * Authors: AMD |
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| 23 | * |
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| 24 | */ |
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| 25 | |
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| 26 | #ifndef __DC_HUBBUB_DCN10_H__ |
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| 27 | #define __DC_HUBBUB_DCN10_H__ |
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| 28 | |
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| 29 | #include "core_types.h" |
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| 30 | #include "dchubbub.h" |
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| 31 | |
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| 32 | #define TO_DCN10_HUBBUB(hubbub)\ |
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| 33 | container_of(hubbub, struct dcn10_hubbub, base) |
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| 34 | |
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| 35 | #define HUBBUB_REG_LIST_DCN_COMMON()\ |
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| 36 | SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A),\ |
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| 37 | SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A),\ |
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| 38 | SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B),\ |
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| 39 | SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B),\ |
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| 40 | SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C),\ |
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| 41 | SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C),\ |
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| 42 | SR(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D),\ |
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| 43 | SR(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D),\ |
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| 44 | SR(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL),\ |
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| 45 | SR(DCHUBBUB_ARB_DRAM_STATE_CNTL),\ |
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| 46 | SR(DCHUBBUB_ARB_SAT_LEVEL),\ |
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| 47 | SR(DCHUBBUB_ARB_DF_REQ_OUTSTAND),\ |
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| 48 | SR(DCHUBBUB_GLOBAL_TIMER_CNTL), \ |
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| 49 | SR(DCHUBBUB_TEST_DEBUG_INDEX), \ |
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| 50 | SR(DCHUBBUB_TEST_DEBUG_DATA),\ |
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| 51 | SR(DCHUBBUB_SOFT_RESET) |
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| 52 | |
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| 53 | #define HUBBUB_VM_REG_LIST() \ |
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| 54 | SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A),\ |
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| 55 | SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B),\ |
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| 56 | SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C),\ |
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| 57 | SR(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D) |
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| 58 | |
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| 59 | #define HUBBUB_SR_WATERMARK_REG_LIST()\ |
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| 60 | SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A),\ |
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| 61 | SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A),\ |
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| 62 | SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B),\ |
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| 63 | SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B),\ |
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| 64 | SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C),\ |
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| 65 | SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C),\ |
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| 66 | SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D),\ |
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| 67 | SR(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D) |
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| 68 | |
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| 69 | #define HUBBUB_REG_LIST_DCN10(id)\ |
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| 70 | HUBBUB_REG_LIST_DCN_COMMON(), \ |
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| 71 | HUBBUB_VM_REG_LIST(), \ |
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| 72 | HUBBUB_SR_WATERMARK_REG_LIST(), \ |
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| 73 | SR(DCHUBBUB_SDPIF_FB_TOP),\ |
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| 74 | SR(DCHUBBUB_SDPIF_FB_BASE),\ |
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| 75 | SR(DCHUBBUB_SDPIF_FB_OFFSET),\ |
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| 76 | SR(DCHUBBUB_SDPIF_AGP_BASE),\ |
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| 77 | SR(DCHUBBUB_SDPIF_AGP_BOT),\ |
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| 78 | SR(DCHUBBUB_SDPIF_AGP_TOP) |
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| 79 | |
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| 80 | struct dcn_hubbub_registers { |
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| 81 | uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A; |
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| 82 | uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A; |
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| 83 | uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A; |
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| 84 | uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A; |
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| 85 | uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A; |
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| 86 | uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B; |
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| 87 | uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B; |
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| 88 | uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B; |
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| 89 | uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B; |
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| 90 | uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B; |
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| 91 | uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C; |
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| 92 | uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C; |
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| 93 | uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C; |
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| 94 | uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C; |
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| 95 | uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C; |
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| 96 | uint32_t DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D; |
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| 97 | uint32_t DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D; |
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| 98 | uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D; |
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| 99 | uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D; |
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| 100 | uint32_t DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D; |
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| 101 | uint32_t DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL; |
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| 102 | uint32_t DCHUBBUB_ARB_SAT_LEVEL; |
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| 103 | uint32_t DCHUBBUB_ARB_DF_REQ_OUTSTAND; |
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| 104 | uint32_t DCHUBBUB_GLOBAL_TIMER_CNTL; |
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| 105 | uint32_t DCHUBBUB_ARB_DRAM_STATE_CNTL; |
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| 106 | uint32_t DCHUBBUB_TEST_DEBUG_INDEX; |
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| 107 | uint32_t DCHUBBUB_TEST_DEBUG_DATA; |
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| 108 | uint32_t DCHUBBUB_SDPIF_FB_TOP; |
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| 109 | uint32_t DCHUBBUB_SDPIF_FB_BASE; |
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| 110 | uint32_t DCHUBBUB_SDPIF_FB_OFFSET; |
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| 111 | uint32_t DCHUBBUB_SDPIF_AGP_BASE; |
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| 112 | uint32_t DCHUBBUB_SDPIF_AGP_BOT; |
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| 113 | uint32_t DCHUBBUB_SDPIF_AGP_TOP; |
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| 114 | uint32_t DCHUBBUB_CRC_CTRL; |
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| 115 | uint32_t DCHUBBUB_SOFT_RESET; |
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| 116 | uint32_t DCN_VM_FB_LOCATION_BASE; |
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| 117 | uint32_t DCN_VM_FB_LOCATION_TOP; |
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| 118 | uint32_t DCN_VM_FB_OFFSET; |
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| 119 | uint32_t DCN_VM_AGP_BOT; |
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| 120 | uint32_t DCN_VM_AGP_TOP; |
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| 121 | uint32_t DCN_VM_AGP_BASE; |
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| 122 | uint32_t DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB; |
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| 123 | uint32_t DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB; |
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| 124 | uint32_t DCN_VM_FAULT_ADDR_MSB; |
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| 125 | uint32_t DCN_VM_FAULT_ADDR_LSB; |
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| 126 | uint32_t DCN_VM_FAULT_CNTL; |
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| 127 | uint32_t DCN_VM_FAULT_STATUS; |
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| 128 | uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_A; |
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| 129 | uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_B; |
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| 130 | uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_C; |
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| 131 | uint32_t DCHUBBUB_ARB_FRAC_URG_BW_NOM_D; |
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| 132 | uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_A; |
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| 133 | uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_B; |
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| 134 | uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_C; |
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| 135 | uint32_t DCHUBBUB_ARB_FRAC_URG_BW_FLIP_D; |
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| 136 | uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A; |
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| 137 | uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B; |
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| 138 | uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C; |
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| 139 | uint32_t DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D; |
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| 140 | uint32_t DCHUBBUB_ARB_HOSTVM_CNTL; |
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| 141 | uint32_t DCHVM_CTRL0; |
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| 142 | uint32_t DCHVM_MEM_CTRL; |
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| 143 | uint32_t DCHVM_CLK_CTRL; |
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| 144 | uint32_t DCHVM_RIOMMU_CTRL0; |
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| 145 | uint32_t DCHVM_RIOMMU_STAT0; |
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| 146 | uint32_t DCHUBBUB_DET0_CTRL; |
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| 147 | uint32_t DCHUBBUB_DET1_CTRL; |
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| 148 | uint32_t DCHUBBUB_DET2_CTRL; |
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| 149 | uint32_t DCHUBBUB_DET3_CTRL; |
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| 150 | uint32_t DCHUBBUB_COMPBUF_CTRL; |
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| 151 | uint32_t COMPBUF_RESERVED_SPACE; |
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| 152 | uint32_t DCHUBBUB_DEBUG_CTRL_0; |
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| 153 | uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_A; |
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| 154 | uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_A; |
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| 155 | uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_B; |
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| 156 | uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_B; |
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| 157 | uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_C; |
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| 158 | uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_C; |
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| 159 | uint32_t DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_D; |
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| 160 | uint32_t DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_D; |
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| 161 | uint32_t DCHUBBUB_ARB_USR_RETRAINING_CNTL; |
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| 162 | uint32_t DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_A; |
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| 163 | uint32_t DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_B; |
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| 164 | uint32_t DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_C; |
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| 165 | uint32_t DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_D; |
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| 166 | uint32_t DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_A; |
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| 167 | uint32_t DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_B; |
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| 168 | uint32_t DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_C; |
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| 169 | uint32_t DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_D; |
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| 170 | uint32_t DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_A; |
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| 171 | uint32_t DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_B; |
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| 172 | uint32_t DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_C; |
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| 173 | uint32_t DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_D; |
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| 174 | uint32_t DCHUBBUB_ARB_MALL_CNTL; |
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| 175 | uint32_t SDPIF_REQUEST_RATE_LIMIT; |
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| 176 | uint32_t DCHUBBUB_SDPIF_CFG0; |
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| 177 | uint32_t DCHUBBUB_SDPIF_CFG1; |
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| 178 | uint32_t DCHUBBUB_CLOCK_CNTL; |
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| 179 | uint32_t DCHUBBUB_MEM_PWR_MODE_CTRL; |
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| 180 | uint32_t DCHUBBUB_ARB_QOS_FORCE; |
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| 181 | }; |
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| 182 | |
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| 183 | #define HUBBUB_REG_FIELD_LIST_DCN32(type) \ |
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| 184 | type DCHUBBUB_ARB_ALLOW_USR_RETRAINING_FORCE_VALUE;\ |
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| 185 | type DCHUBBUB_ARB_ALLOW_USR_RETRAINING_FORCE_ENABLE;\ |
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| 186 | type DCHUBBUB_ARB_DO_NOT_FORCE_ALLOW_USR_RETRAINING_DURING_PSTATE_CHANGE_REQUEST;\ |
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| 187 | type DCHUBBUB_ARB_DO_NOT_FORCE_ALLOW_USR_RETRAINING_DURING_PRE_CSTATE;\ |
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| 188 | type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_A;\ |
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| 189 | type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_B;\ |
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| 190 | type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_C;\ |
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| 191 | type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_D;\ |
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| 192 | type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_A;\ |
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| 193 | type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_B;\ |
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| 194 | type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_C;\ |
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| 195 | type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_D;\ |
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| 196 | type DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_A;\ |
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| 197 | type DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_B;\ |
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| 198 | type DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_C;\ |
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| 199 | type DCHUBBUB_ARB_FCLK_PSTATE_CHANGE_WATERMARK_D;\ |
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| 200 | type MALL_PREFETCH_COMPLETE;\ |
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| 201 | type MALL_IN_USE |
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| 202 | |
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| 203 | #define HUBBUB_REG_FIELD_LIST_DCN35(type) \ |
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| 204 | type DCHUBBUB_FGCG_REP_DIS;\ |
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| 205 | type DCHUBBUB_ARB_ALLOW_CSTATE_DEEPSLEEP_LEGACY_MODE |
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| 206 | |
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| 207 | /* set field name */ |
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| 208 | #define HUBBUB_SF(reg_name, field_name, post_fix)\ |
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| 209 | .field_name = reg_name ## __ ## field_name ## post_fix |
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| 210 | |
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| 211 | #define HUBBUB_MASK_SH_LIST_DCN_COMMON(mask_sh)\ |
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| 212 | HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, mask_sh), \ |
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| 213 | HUBBUB_SF(DCHUBBUB_SOFT_RESET, DCHUBBUB_GLOBAL_SOFT_RESET, mask_sh), \ |
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| 214 | HUBBUB_SF(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST, mask_sh), \ |
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| 215 | HUBBUB_SF(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, DCHUBBUB_ARB_WATERMARK_CHANGE_DONE_INTERRUPT_DISABLE, mask_sh), \ |
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| 216 | HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_VALUE, mask_sh), \ |
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| 217 | HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_ENABLE, mask_sh), \ |
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| 218 | HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_VALUE, mask_sh), \ |
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| 219 | HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_ENABLE, mask_sh), \ |
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| 220 | HUBBUB_SF(DCHUBBUB_ARB_SAT_LEVEL, DCHUBBUB_ARB_SAT_LEVEL, mask_sh), \ |
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| 221 | HUBBUB_SF(DCHUBBUB_ARB_DF_REQ_OUTSTAND, DCHUBBUB_ARB_MIN_REQ_OUTSTAND, mask_sh), \ |
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| 222 | HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, mask_sh), \ |
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| 223 | HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B, mask_sh), \ |
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| 224 | HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C, mask_sh), \ |
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| 225 | HUBBUB_SF(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D, mask_sh), \ |
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| 226 | HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A, mask_sh), \ |
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| 227 | HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B, mask_sh), \ |
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| 228 | HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C, mask_sh), \ |
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| 229 | HUBBUB_SF(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D, DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D, mask_sh) |
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| 230 | |
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| 231 | #define HUBBUB_MASK_SH_LIST_STUTTER(mask_sh) \ |
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| 232 | HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, mask_sh), \ |
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| 233 | HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B, mask_sh), \ |
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| 234 | HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C, mask_sh), \ |
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| 235 | HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D, DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D, mask_sh), \ |
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| 236 | HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A, mask_sh), \ |
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| 237 | HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B, mask_sh), \ |
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| 238 | HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C, mask_sh), \ |
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| 239 | HUBBUB_SF(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D, DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D, mask_sh) |
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| 240 | |
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| 241 | #define HUBBUB_MASK_SH_LIST_DCN10(mask_sh)\ |
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| 242 | HUBBUB_MASK_SH_LIST_DCN_COMMON(mask_sh), \ |
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| 243 | HUBBUB_MASK_SH_LIST_STUTTER(mask_sh), \ |
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| 244 | HUBBUB_SF(DCHUBBUB_SDPIF_FB_TOP, SDPIF_FB_TOP, mask_sh), \ |
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| 245 | HUBBUB_SF(DCHUBBUB_SDPIF_FB_BASE, SDPIF_FB_BASE, mask_sh), \ |
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| 246 | HUBBUB_SF(DCHUBBUB_SDPIF_FB_OFFSET, SDPIF_FB_OFFSET, mask_sh), \ |
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| 247 | HUBBUB_SF(DCHUBBUB_SDPIF_AGP_BASE, SDPIF_AGP_BASE, mask_sh), \ |
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| 248 | HUBBUB_SF(DCHUBBUB_SDPIF_AGP_BOT, SDPIF_AGP_BOT, mask_sh), \ |
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| 249 | HUBBUB_SF(DCHUBBUB_SDPIF_AGP_TOP, SDPIF_AGP_TOP, mask_sh) |
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| 250 | |
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| 251 | #define DCN_HUBBUB_REG_FIELD_LIST(type) \ |
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| 252 | type DCHUBBUB_GLOBAL_TIMER_ENABLE; \ |
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| 253 | type DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST;\ |
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| 254 | type DCHUBBUB_ARB_WATERMARK_CHANGE_DONE_INTERRUPT_DISABLE;\ |
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| 255 | type DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_VALUE;\ |
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| 256 | type DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_ENABLE;\ |
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| 257 | type DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_VALUE;\ |
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| 258 | type DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_ENABLE;\ |
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| 259 | type DCHUBBUB_ARB_SAT_LEVEL;\ |
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| 260 | type DCHUBBUB_ARB_MIN_REQ_OUTSTAND;\ |
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| 261 | type DCHUBBUB_GLOBAL_TIMER_REFDIV;\ |
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| 262 | type DCHUBBUB_GLOBAL_SOFT_RESET; \ |
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| 263 | type SDPIF_FB_TOP;\ |
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| 264 | type SDPIF_FB_BASE;\ |
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| 265 | type SDPIF_FB_OFFSET;\ |
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| 266 | type SDPIF_AGP_BASE;\ |
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| 267 | type SDPIF_AGP_BOT;\ |
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| 268 | type SDPIF_AGP_TOP;\ |
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| 269 | type FB_BASE;\ |
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| 270 | type FB_TOP;\ |
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| 271 | type FB_OFFSET;\ |
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| 272 | type AGP_BOT;\ |
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| 273 | type AGP_TOP;\ |
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| 274 | type AGP_BASE;\ |
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| 275 | type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A;\ |
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| 276 | type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B;\ |
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| 277 | type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C;\ |
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| 278 | type DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D;\ |
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| 279 | type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A;\ |
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| 280 | type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B;\ |
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| 281 | type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C;\ |
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| 282 | type DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D;\ |
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| 283 | type DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_MSB;\ |
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| 284 | type DCN_VM_PROTECTION_FAULT_DEFAULT_ADDR_LSB;\ |
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| 285 | type DCN_VM_FAULT_ADDR_MSB;\ |
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| 286 | type DCN_VM_FAULT_ADDR_LSB;\ |
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| 287 | type DCN_VM_ERROR_STATUS_CLEAR;\ |
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| 288 | type DCN_VM_ERROR_STATUS_MODE;\ |
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| 289 | type DCN_VM_ERROR_INTERRUPT_ENABLE;\ |
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| 290 | type DCN_VM_RANGE_FAULT_DISABLE;\ |
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| 291 | type DCN_VM_PRQ_FAULT_DISABLE;\ |
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| 292 | type DCN_VM_ERROR_STATUS;\ |
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| 293 | type DCN_VM_ERROR_VMID;\ |
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| 294 | type DCN_VM_ERROR_TABLE_LEVEL;\ |
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| 295 | type DCN_VM_ERROR_PIPE;\ |
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| 296 | type DCN_VM_ERROR_INTERRUPT_STATUS |
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| 297 | |
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| 298 | #define HUBBUB_STUTTER_REG_FIELD_LIST(type) \ |
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| 299 | type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A;\ |
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| 300 | type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B;\ |
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| 301 | type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C;\ |
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| 302 | type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D;\ |
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| 303 | type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A;\ |
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| 304 | type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B;\ |
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| 305 | type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C;\ |
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| 306 | type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_D |
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| 307 | |
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| 308 | #define HUBBUB_HVM_REG_FIELD_LIST(type) \ |
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| 309 | type DCHUBBUB_ARB_MIN_REQ_OUTSTAND_COMMIT_THRESHOLD;\ |
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| 310 | type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_A;\ |
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| 311 | type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_B;\ |
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| 312 | type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_C;\ |
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| 313 | type DCHUBBUB_ARB_VM_ROW_URGENCY_WATERMARK_D;\ |
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| 314 | type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_A;\ |
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| 315 | type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_B;\ |
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| 316 | type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_C;\ |
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| 317 | type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_ENTER_WATERMARK_D;\ |
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| 318 | type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_A;\ |
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| 319 | type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_B;\ |
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| 320 | type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_C;\ |
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| 321 | type DCHUBBUB_ARB_VM_ROW_ALLOW_SR_EXIT_WATERMARK_D;\ |
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| 322 | type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A;\ |
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| 323 | type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B;\ |
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| 324 | type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C;\ |
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| 325 | type DCHUBBUB_ARB_VM_ROW_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D;\ |
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| 326 | type DCHUBBUB_ARB_FRAC_URG_BW_NOM_A;\ |
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| 327 | type DCHUBBUB_ARB_FRAC_URG_BW_NOM_B;\ |
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| 328 | type DCHUBBUB_ARB_FRAC_URG_BW_NOM_C;\ |
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| 329 | type DCHUBBUB_ARB_FRAC_URG_BW_NOM_D;\ |
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| 330 | type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_A;\ |
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| 331 | type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_B;\ |
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| 332 | type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_C;\ |
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| 333 | type DCHUBBUB_ARB_FRAC_URG_BW_FLIP_D;\ |
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| 334 | type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A;\ |
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| 335 | type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B;\ |
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| 336 | type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C;\ |
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| 337 | type DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D;\ |
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| 338 | type DCHUBBUB_ARB_MAX_QOS_COMMIT_THRESHOLD;\ |
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| 339 | type HOSTVM_INIT_REQ; \ |
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| 340 | type HVM_GPUVMRET_PWR_REQ_DIS; \ |
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| 341 | type HVM_GPUVMRET_FORCE_REQ; \ |
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| 342 | type HVM_GPUVMRET_POWER_STATUS; \ |
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| 343 | type HVM_DISPCLK_R_GATE_DIS; \ |
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| 344 | type HVM_DISPCLK_G_GATE_DIS; \ |
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| 345 | type HVM_DCFCLK_R_GATE_DIS; \ |
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| 346 | type HVM_DCFCLK_G_GATE_DIS; \ |
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| 347 | type TR_REQ_REQCLKREQ_MODE; \ |
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| 348 | type TW_RSP_COMPCLKREQ_MODE; \ |
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| 349 | type HOSTVM_PREFETCH_REQ; \ |
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| 350 | type HOSTVM_POWERSTATUS; \ |
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| 351 | type RIOMMU_ACTIVE; \ |
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| 352 | type HOSTVM_PREFETCH_DONE |
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| 353 | |
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| 354 | #define HUBBUB_RET_REG_FIELD_LIST(type) \ |
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| 355 | type DET_DEPTH;\ |
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| 356 | type DET0_SIZE;\ |
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| 357 | type DET1_SIZE;\ |
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| 358 | type DET2_SIZE;\ |
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| 359 | type DET3_SIZE;\ |
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| 360 | type DET0_SIZE_CURRENT;\ |
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| 361 | type DET1_SIZE_CURRENT;\ |
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| 362 | type DET2_SIZE_CURRENT;\ |
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| 363 | type DET3_SIZE_CURRENT;\ |
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| 364 | type COMPBUF_SIZE;\ |
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| 365 | type COMPBUF_SIZE_CURRENT;\ |
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| 366 | type CONFIG_ERROR;\ |
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| 367 | type COMPBUF_RESERVED_SPACE_64B;\ |
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| 368 | type COMPBUF_RESERVED_SPACE_ZS;\ |
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| 369 | type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_A;\ |
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| 370 | type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_A;\ |
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| 371 | type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_B;\ |
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| 372 | type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_B;\ |
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| 373 | type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_C;\ |
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| 374 | type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_C;\ |
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| 375 | type DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_Z8_D;\ |
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| 376 | type DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_Z8_D;\ |
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| 377 | type SDPIF_REQUEST_RATE_LIMIT;\ |
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| 378 | type DISPCLK_R_DCHUBBUB_GATE_DIS;\ |
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| 379 | type DCFCLK_R_DCHUBBUB_GATE_DIS;\ |
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| 380 | type SDPIF_MAX_NUM_OUTSTANDING;\ |
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| 381 | type DCHUBBUB_ARB_MAX_REQ_OUTSTAND;\ |
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| 382 | type SDPIF_PORT_CONTROL;\ |
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| 383 | type DET_MEM_PWR_LS_MODE |
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| 384 | |
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| 385 | |
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| 386 | struct dcn_hubbub_shift { |
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| 387 | DCN_HUBBUB_REG_FIELD_LIST(uint8_t); |
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| 388 | HUBBUB_STUTTER_REG_FIELD_LIST(uint8_t); |
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| 389 | HUBBUB_HVM_REG_FIELD_LIST(uint8_t); |
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| 390 | HUBBUB_RET_REG_FIELD_LIST(uint8_t); |
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| 391 | HUBBUB_REG_FIELD_LIST_DCN32(uint8_t); |
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| 392 | HUBBUB_REG_FIELD_LIST_DCN35(uint8_t); |
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| 393 | }; |
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| 394 | |
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| 395 | struct dcn_hubbub_mask { |
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| 396 | DCN_HUBBUB_REG_FIELD_LIST(uint32_t); |
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| 397 | HUBBUB_STUTTER_REG_FIELD_LIST(uint32_t); |
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| 398 | HUBBUB_HVM_REG_FIELD_LIST(uint32_t); |
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| 399 | HUBBUB_RET_REG_FIELD_LIST(uint32_t); |
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| 400 | HUBBUB_REG_FIELD_LIST_DCN32(uint32_t); |
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| 401 | HUBBUB_REG_FIELD_LIST_DCN35(uint32_t); |
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| 402 | }; |
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| 403 | |
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| 404 | struct dc; |
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| 405 | |
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| 406 | struct dcn10_hubbub { |
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| 407 | struct hubbub base; |
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| 408 | const struct dcn_hubbub_registers *regs; |
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| 409 | const struct dcn_hubbub_shift *shifts; |
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| 410 | const struct dcn_hubbub_mask *masks; |
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| 411 | unsigned int debug_test_index_pstate; |
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| 412 | struct dcn_watermark_set watermarks; |
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| 413 | }; |
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| 414 | |
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| 415 | void hubbub1_update_dchub( |
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| 416 | struct hubbub *hubbub, |
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| 417 | struct dchub_init_data *dh_data); |
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| 418 | |
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| 419 | bool hubbub1_verify_allow_pstate_change_high( |
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| 420 | struct hubbub *hubbub); |
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| 421 | |
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| 422 | void hubbub1_wm_change_req_wa(struct hubbub *hubbub); |
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| 423 | |
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| 424 | bool hubbub1_program_watermarks( |
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| 425 | struct hubbub *hubbub, |
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| 426 | struct dcn_watermark_set *watermarks, |
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| 427 | unsigned int refclk_mhz, |
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| 428 | bool safe_to_lower); |
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| 429 | |
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| 430 | void hubbub1_allow_self_refresh_control(struct hubbub *hubbub, bool allow); |
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| 431 | |
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| 432 | bool hubbub1_is_allow_self_refresh_enabled(struct hubbub *hubub); |
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| 433 | |
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| 434 | void hubbub1_toggle_watermark_change_req( |
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| 435 | struct hubbub *hubbub); |
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| 436 | |
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| 437 | void hubbub1_wm_read_state(struct hubbub *hubbub, |
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| 438 | struct dcn_hubbub_wm *wm); |
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| 439 | |
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| 440 | void hubbub1_soft_reset(struct hubbub *hubbub, bool reset); |
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| 441 | void hubbub1_construct(struct hubbub *hubbub, |
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| 442 | struct dc_context *ctx, |
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| 443 | const struct dcn_hubbub_registers *hubbub_regs, |
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| 444 | const struct dcn_hubbub_shift *hubbub_shift, |
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| 445 | const struct dcn_hubbub_mask *hubbub_mask); |
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| 446 | |
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| 447 | bool hubbub1_program_urgent_watermarks( |
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| 448 | struct hubbub *hubbub, |
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| 449 | struct dcn_watermark_set *watermarks, |
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| 450 | unsigned int refclk_mhz, |
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| 451 | bool safe_to_lower); |
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| 452 | bool hubbub1_program_stutter_watermarks( |
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| 453 | struct hubbub *hubbub, |
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| 454 | struct dcn_watermark_set *watermarks, |
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| 455 | unsigned int refclk_mhz, |
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| 456 | bool safe_to_lower); |
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| 457 | bool hubbub1_program_pstate_watermarks( |
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| 458 | struct hubbub *hubbub, |
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| 459 | struct dcn_watermark_set *watermarks, |
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| 460 | unsigned int refclk_mhz, |
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| 461 | bool safe_to_lower); |
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| 462 | |
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| 463 | #endif |
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| 464 | |
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