1/*
2 * Copyright 2020 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#include "reg_helper.h"
27#include "core_types.h"
28#include "dcn30_dccg.h"
29
30#define TO_DCN_DCCG(dccg)\
31 container_of(dccg, struct dcn_dccg, base)
32
33#define REG(reg) \
34 (dccg_dcn->regs->reg)
35
36#undef FN
37#define FN(reg_name, field_name) \
38 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
39
40#define CTX \
41 dccg_dcn->base.ctx
42#define DC_LOGGER \
43 dccg->ctx->logger
44
45
46static const struct dccg_funcs dccg3_funcs = {
47 .update_dpp_dto = dccg2_update_dpp_dto,
48 .get_dccg_ref_freq = dccg2_get_dccg_ref_freq,
49 .set_fifo_errdet_ovr_en = dccg2_set_fifo_errdet_ovr_en,
50 .otg_add_pixel = dccg2_otg_add_pixel,
51 .otg_drop_pixel = dccg2_otg_drop_pixel,
52 .dccg_init = dccg2_init
53};
54
55struct dccg *dccg3_create(
56 struct dc_context *ctx,
57 const struct dccg_registers *regs,
58 const struct dccg_shift *dccg_shift,
59 const struct dccg_mask *dccg_mask)
60{
61 struct dcn_dccg *dccg_dcn = kzalloc(size: sizeof(*dccg_dcn), GFP_KERNEL);
62 struct dccg *base;
63
64 if (dccg_dcn == NULL) {
65 BREAK_TO_DEBUGGER();
66 return NULL;
67 }
68
69 base = &dccg_dcn->base;
70 base->ctx = ctx;
71 base->funcs = &dccg3_funcs;
72
73 dccg_dcn->regs = regs;
74 dccg_dcn->dccg_shift = dccg_shift;
75 dccg_dcn->dccg_mask = dccg_mask;
76
77 return &dccg_dcn->base;
78}
79
80struct dccg *dccg30_create(
81 struct dc_context *ctx,
82 const struct dccg_registers *regs,
83 const struct dccg_shift *dccg_shift,
84 const struct dccg_mask *dccg_mask)
85{
86 struct dcn_dccg *dccg_dcn = kzalloc(size: sizeof(*dccg_dcn), GFP_KERNEL);
87 struct dccg *base;
88
89 if (dccg_dcn == NULL) {
90 BREAK_TO_DEBUGGER();
91 return NULL;
92 }
93
94 base = &dccg_dcn->base;
95 base->ctx = ctx;
96 base->funcs = &dccg3_funcs;
97
98 dccg_dcn->regs = regs;
99 dccg_dcn->dccg_shift = dccg_shift;
100 dccg_dcn->dccg_mask = dccg_mask;
101
102 return &dccg_dcn->base;
103}
104

source code of linux/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dccg.c