1 | /* |
2 | * Copyright 2013-15 Advanced Micro Devices, Inc. |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
11 | * The above copyright notice and this permission notice shall be included in |
12 | * all copies or substantial portions of the Software. |
13 | * |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
20 | * OTHER DEALINGS IN THE SOFTWARE. |
21 | * |
22 | * Authors: AMD |
23 | * |
24 | */ |
25 | |
26 | #include "dm_services.h" |
27 | #include "include/gpio_types.h" |
28 | #include "../hw_factory.h" |
29 | |
30 | |
31 | #include "../hw_gpio.h" |
32 | #include "../hw_ddc.h" |
33 | #include "../hw_hpd.h" |
34 | #include "../hw_generic.h" |
35 | |
36 | #include "hw_factory_dcn10.h" |
37 | |
38 | #include "dcn/dcn_1_0_offset.h" |
39 | #include "dcn/dcn_1_0_sh_mask.h" |
40 | #include "soc15_hw_ip.h" |
41 | #include "vega10_ip_offset.h" |
42 | |
43 | #define block HPD |
44 | #define reg_num 0 |
45 | |
46 | /* set field name */ |
47 | #define SF_HPD(reg_name, field_name, post_fix)\ |
48 | .field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix |
49 | |
50 | #define BASE_INNER(seg) \ |
51 | DCE_BASE__INST0_SEG ## seg |
52 | |
53 | /* compile time expand base address. */ |
54 | #define BASE(seg) \ |
55 | BASE_INNER(seg) |
56 | |
57 | #define REG(reg_name)\ |
58 | BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name |
59 | |
60 | #define REGI(reg_name, block, id)\ |
61 | BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \ |
62 | mm ## block ## id ## _ ## reg_name |
63 | |
64 | #include "reg_helper.h" |
65 | #include "../hpd_regs.h" |
66 | |
67 | #define hpd_regs(id) \ |
68 | {\ |
69 | HPD_REG_LIST(id)\ |
70 | } |
71 | |
72 | static const struct hpd_registers hpd_regs[] = { |
73 | hpd_regs(0), |
74 | hpd_regs(1), |
75 | hpd_regs(2), |
76 | hpd_regs(3), |
77 | hpd_regs(4), |
78 | hpd_regs(5) |
79 | }; |
80 | |
81 | static const struct hpd_sh_mask hpd_shift = { |
82 | HPD_MASK_SH_LIST(__SHIFT) |
83 | }; |
84 | |
85 | static const struct hpd_sh_mask hpd_mask = { |
86 | HPD_MASK_SH_LIST(_MASK) |
87 | }; |
88 | |
89 | #include "../ddc_regs.h" |
90 | |
91 | /* set field name */ |
92 | #define SF_DDC(reg_name, field_name, post_fix)\ |
93 | .field_name = reg_name ## __ ## field_name ## post_fix |
94 | |
95 | static const struct ddc_registers ddc_data_regs[] = { |
96 | ddc_data_regs(1), |
97 | ddc_data_regs(2), |
98 | ddc_data_regs(3), |
99 | ddc_data_regs(4), |
100 | ddc_data_regs(5), |
101 | ddc_data_regs(6), |
102 | ddc_vga_data_regs, |
103 | ddc_i2c_data_regs |
104 | }; |
105 | |
106 | static const struct ddc_registers ddc_clk_regs[] = { |
107 | ddc_clk_regs(1), |
108 | ddc_clk_regs(2), |
109 | ddc_clk_regs(3), |
110 | ddc_clk_regs(4), |
111 | ddc_clk_regs(5), |
112 | ddc_clk_regs(6), |
113 | ddc_vga_clk_regs, |
114 | ddc_i2c_clk_regs |
115 | }; |
116 | |
117 | static const struct ddc_sh_mask ddc_shift = { |
118 | DDC_MASK_SH_LIST(__SHIFT) |
119 | }; |
120 | |
121 | static const struct ddc_sh_mask ddc_mask = { |
122 | DDC_MASK_SH_LIST(_MASK) |
123 | }; |
124 | |
125 | #include "../generic_regs.h" |
126 | |
127 | /* set field name */ |
128 | #define SF_GENERIC(reg_name, field_name, post_fix)\ |
129 | .field_name = reg_name ## __ ## field_name ## post_fix |
130 | |
131 | #define generic_regs(id) \ |
132 | {\ |
133 | GENERIC_REG_LIST(id)\ |
134 | } |
135 | |
136 | static const struct generic_registers generic_regs[] = { |
137 | generic_regs(A), |
138 | generic_regs(B), |
139 | }; |
140 | |
141 | static const struct generic_sh_mask generic_shift[] = { |
142 | GENERIC_MASK_SH_LIST(__SHIFT, A), |
143 | GENERIC_MASK_SH_LIST(__SHIFT, B), |
144 | }; |
145 | |
146 | static const struct generic_sh_mask generic_mask[] = { |
147 | GENERIC_MASK_SH_LIST(_MASK, A), |
148 | GENERIC_MASK_SH_LIST(_MASK, B), |
149 | }; |
150 | |
151 | static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en) |
152 | { |
153 | struct hw_generic *generic = HW_GENERIC_FROM_BASE(pin); |
154 | |
155 | generic->regs = &generic_regs[en]; |
156 | generic->shifts = &generic_shift[en]; |
157 | generic->masks = &generic_mask[en]; |
158 | generic->base.regs = &generic_regs[en].gpio; |
159 | } |
160 | |
161 | static void define_ddc_registers( |
162 | struct hw_gpio_pin *pin, |
163 | uint32_t en) |
164 | { |
165 | struct hw_ddc *ddc = HW_DDC_FROM_BASE(pin); |
166 | |
167 | switch (pin->id) { |
168 | case GPIO_ID_DDC_DATA: |
169 | ddc->regs = &ddc_data_regs[en]; |
170 | ddc->base.regs = &ddc_data_regs[en].gpio; |
171 | break; |
172 | case GPIO_ID_DDC_CLOCK: |
173 | ddc->regs = &ddc_clk_regs[en]; |
174 | ddc->base.regs = &ddc_clk_regs[en].gpio; |
175 | break; |
176 | default: |
177 | ASSERT_CRITICAL(false); |
178 | return; |
179 | } |
180 | |
181 | ddc->shifts = &ddc_shift; |
182 | ddc->masks = &ddc_mask; |
183 | |
184 | } |
185 | |
186 | static void define_hpd_registers(struct hw_gpio_pin *pin, uint32_t en) |
187 | { |
188 | struct hw_hpd *hpd = HW_HPD_FROM_BASE(pin); |
189 | |
190 | hpd->regs = &hpd_regs[en]; |
191 | hpd->shifts = &hpd_shift; |
192 | hpd->masks = &hpd_mask; |
193 | hpd->base.regs = &hpd_regs[en].gpio; |
194 | } |
195 | |
196 | |
197 | /* function table */ |
198 | static const struct hw_factory_funcs funcs = { |
199 | .init_ddc_data = dal_hw_ddc_init, |
200 | .init_generic = dal_hw_generic_init, |
201 | .init_hpd = dal_hw_hpd_init, |
202 | .get_ddc_pin = dal_hw_ddc_get_pin, |
203 | .get_hpd_pin = dal_hw_hpd_get_pin, |
204 | .get_generic_pin = dal_hw_generic_get_pin, |
205 | .define_hpd_registers = define_hpd_registers, |
206 | .define_ddc_registers = define_ddc_registers, |
207 | .define_generic_registers = define_generic_registers |
208 | }; |
209 | /* |
210 | * dal_hw_factory_dcn10_init |
211 | * |
212 | * @brief |
213 | * Initialize HW factory function pointers and pin info |
214 | * |
215 | * @param |
216 | * struct hw_factory *factory - [out] struct of function pointers |
217 | */ |
218 | void dal_hw_factory_dcn10_init(struct hw_factory *factory) |
219 | { |
220 | /*TODO check ASIC CAPs*/ |
221 | factory->number_of_pins[GPIO_ID_DDC_DATA] = 8; |
222 | factory->number_of_pins[GPIO_ID_DDC_CLOCK] = 8; |
223 | factory->number_of_pins[GPIO_ID_GENERIC] = 7; |
224 | factory->number_of_pins[GPIO_ID_HPD] = 6; |
225 | factory->number_of_pins[GPIO_ID_GPIO_PAD] = 31; |
226 | factory->number_of_pins[GPIO_ID_VIP_PAD] = 0; |
227 | factory->number_of_pins[GPIO_ID_SYNC] = 2; |
228 | factory->number_of_pins[GPIO_ID_GSL] = 4; |
229 | |
230 | factory->funcs = &funcs; |
231 | } |
232 | |