1/*
2 * Copyright 2022 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25#include "link_hwss_hpo_dp.h"
26#include "dm_helpers.h"
27#include "core_types.h"
28#include "dccg.h"
29#include "clk_mgr.h"
30
31void set_hpo_dp_throttled_vcp_size(struct pipe_ctx *pipe_ctx,
32 struct fixed31_32 throttled_vcp_size)
33{
34 struct hpo_dp_stream_encoder *hpo_dp_stream_encoder =
35 pipe_ctx->stream_res.hpo_dp_stream_enc;
36 struct hpo_dp_link_encoder *hpo_dp_link_encoder =
37 pipe_ctx->link_res.hpo_dp_link_enc;
38
39 hpo_dp_link_encoder->funcs->set_throttled_vcp_size(hpo_dp_link_encoder,
40 hpo_dp_stream_encoder->inst,
41 throttled_vcp_size);
42}
43
44void set_hpo_dp_hblank_min_symbol_width(struct pipe_ctx *pipe_ctx,
45 const struct dc_link_settings *link_settings,
46 struct fixed31_32 throttled_vcp_size)
47{
48 struct hpo_dp_stream_encoder *hpo_dp_stream_encoder =
49 pipe_ctx->stream_res.hpo_dp_stream_enc;
50 struct dc_crtc_timing *timing = &pipe_ctx->stream->timing;
51 struct fixed31_32 h_blank_in_ms, time_slot_in_ms, mtp_cnt_per_h_blank;
52 uint32_t link_bw_in_kbps =
53 hpo_dp_stream_encoder->ctx->dc->link_srv->dp_link_bandwidth_kbps(
54 pipe_ctx->stream->link, link_settings);
55 uint16_t hblank_min_symbol_width = 0;
56
57 if (link_bw_in_kbps > 0) {
58 h_blank_in_ms = dc_fixpt_div(arg1: dc_fixpt_from_int(
59 arg: timing->h_total - timing->h_addressable),
60 arg2: dc_fixpt_from_fraction(numerator: timing->pix_clk_100hz, denominator: 10));
61 time_slot_in_ms = dc_fixpt_from_fraction(numerator: 32 * 4, denominator: link_bw_in_kbps);
62 mtp_cnt_per_h_blank = dc_fixpt_div(arg1: h_blank_in_ms,
63 arg2: dc_fixpt_mul_int(arg1: time_slot_in_ms, arg2: 64));
64 hblank_min_symbol_width = dc_fixpt_floor(
65 arg: dc_fixpt_mul(arg1: mtp_cnt_per_h_blank, arg2: throttled_vcp_size));
66 }
67
68 hpo_dp_stream_encoder->funcs->set_hblank_min_symbol_width(hpo_dp_stream_encoder,
69 hblank_min_symbol_width);
70}
71
72void setup_hpo_dp_stream_encoder(struct pipe_ctx *pipe_ctx)
73{
74 struct hpo_dp_stream_encoder *stream_enc = pipe_ctx->stream_res.hpo_dp_stream_enc;
75 struct hpo_dp_link_encoder *link_enc = pipe_ctx->link_res.hpo_dp_link_enc;
76
77 stream_enc->funcs->enable_stream(stream_enc);
78 stream_enc->funcs->map_stream_to_link(stream_enc, stream_enc->inst, link_enc->inst);
79}
80
81void reset_hpo_dp_stream_encoder(struct pipe_ctx *pipe_ctx)
82{
83 struct hpo_dp_stream_encoder *stream_enc = pipe_ctx->stream_res.hpo_dp_stream_enc;
84
85 stream_enc->funcs->disable(stream_enc);
86}
87
88void setup_hpo_dp_stream_attribute(struct pipe_ctx *pipe_ctx)
89{
90 struct hpo_dp_stream_encoder *stream_enc = pipe_ctx->stream_res.hpo_dp_stream_enc;
91 struct dc_stream_state *stream = pipe_ctx->stream;
92 struct dc_link *link = stream->link;
93
94 stream_enc->funcs->set_stream_attribute(
95 stream_enc,
96 &stream->timing,
97 stream->output_color_space,
98 stream->use_vsc_sdp_for_colorimetry,
99 stream->timing.flags.DSC,
100 false);
101 link->dc->link_srv->dp_trace_source_sequence(link,
102 DPCD_SOURCE_SEQ_AFTER_DP_STREAM_ATTR);
103}
104
105void enable_hpo_dp_link_output(struct dc_link *link,
106 const struct link_resource *link_res,
107 enum signal_type signal,
108 enum clock_source_id clock_source,
109 const struct dc_link_settings *link_settings)
110{
111 if (link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating)
112 link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating(
113 link->dc->res_pool->dccg,
114 link_res->hpo_dp_link_enc->inst,
115 true);
116 link_res->hpo_dp_link_enc->funcs->enable_link_phy(
117 link_res->hpo_dp_link_enc,
118 link_settings,
119 link->link_enc->transmitter,
120 link->link_enc->hpd_source);
121}
122
123void disable_hpo_dp_link_output(struct dc_link *link,
124 const struct link_resource *link_res,
125 enum signal_type signal)
126{
127 link_res->hpo_dp_link_enc->funcs->link_disable(link_res->hpo_dp_link_enc);
128 link_res->hpo_dp_link_enc->funcs->disable_link_phy(
129 link_res->hpo_dp_link_enc, signal);
130 if (link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating)
131 link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating(
132 link->dc->res_pool->dccg,
133 link_res->hpo_dp_link_enc->inst,
134 false);
135}
136
137static void set_hpo_dp_link_test_pattern(struct dc_link *link,
138 const struct link_resource *link_res,
139 struct encoder_set_dp_phy_pattern_param *tp_params)
140{
141 link_res->hpo_dp_link_enc->funcs->set_link_test_pattern(
142 link_res->hpo_dp_link_enc, tp_params);
143 link->dc->link_srv->dp_trace_source_sequence(link, DPCD_SOURCE_SEQ_AFTER_SET_SOURCE_PATTERN);
144}
145
146static void set_hpo_dp_lane_settings(struct dc_link *link,
147 const struct link_resource *link_res,
148 const struct dc_link_settings *link_settings,
149 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX])
150{
151 link_res->hpo_dp_link_enc->funcs->set_ffe(
152 link_res->hpo_dp_link_enc,
153 link_settings,
154 lane_settings[0].FFE_PRESET.raw);
155}
156
157void update_hpo_dp_stream_allocation_table(struct dc_link *link,
158 const struct link_resource *link_res,
159 const struct link_mst_stream_allocation_table *table)
160{
161 link_res->hpo_dp_link_enc->funcs->update_stream_allocation_table(
162 link_res->hpo_dp_link_enc,
163 table);
164}
165
166void setup_hpo_dp_audio_output(struct pipe_ctx *pipe_ctx,
167 struct audio_output *audio_output, uint32_t audio_inst)
168{
169 pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_audio_setup(
170 pipe_ctx->stream_res.hpo_dp_stream_enc,
171 audio_inst,
172 &pipe_ctx->stream->audio_info);
173}
174
175void enable_hpo_dp_audio_packet(struct pipe_ctx *pipe_ctx)
176{
177 pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_audio_enable(
178 pipe_ctx->stream_res.hpo_dp_stream_enc);
179}
180
181void disable_hpo_dp_audio_packet(struct pipe_ctx *pipe_ctx)
182{
183 if (pipe_ctx->stream_res.audio)
184 pipe_ctx->stream_res.hpo_dp_stream_enc->funcs->dp_audio_disable(
185 pipe_ctx->stream_res.hpo_dp_stream_enc);
186}
187
188static const struct link_hwss hpo_dp_link_hwss = {
189 .setup_stream_encoder = setup_hpo_dp_stream_encoder,
190 .reset_stream_encoder = reset_hpo_dp_stream_encoder,
191 .setup_stream_attribute = setup_hpo_dp_stream_attribute,
192 .disable_link_output = disable_hpo_dp_link_output,
193 .setup_audio_output = setup_hpo_dp_audio_output,
194 .enable_audio_packet = enable_hpo_dp_audio_packet,
195 .disable_audio_packet = disable_hpo_dp_audio_packet,
196 .ext = {
197 .set_throttled_vcp_size = set_hpo_dp_throttled_vcp_size,
198 .set_hblank_min_symbol_width = set_hpo_dp_hblank_min_symbol_width,
199 .enable_dp_link_output = enable_hpo_dp_link_output,
200 .set_dp_link_test_pattern = set_hpo_dp_link_test_pattern,
201 .set_dp_lane_settings = set_hpo_dp_lane_settings,
202 .update_stream_allocation_table = update_hpo_dp_stream_allocation_table,
203 },
204};
205
206bool can_use_hpo_dp_link_hwss(const struct dc_link *link,
207 const struct link_resource *link_res)
208{
209 return link_res->hpo_dp_link_enc != NULL;
210}
211
212const struct link_hwss *get_hpo_dp_link_hwss(void)
213{
214 return &hpo_dp_link_hwss;
215}
216
217

source code of linux/drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_dp.c