| 1 | // SPDX-License-Identifier: MIT |
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| 2 | /* |
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| 3 | * Copyright © 2023 Intel Corporation |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef __INTEL_CX0_PHY_H__ |
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| 7 | #define __INTEL_CX0_PHY_H__ |
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| 8 | |
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| 9 | #include <linux/types.h> |
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| 10 | #include <linux/bitfield.h> |
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| 11 | #include <linux/bits.h> |
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| 12 | |
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| 13 | enum icl_port_dpll_id; |
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| 14 | enum phy; |
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| 15 | struct drm_i915_private; |
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| 16 | struct intel_atomic_state; |
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| 17 | struct intel_c10pll_state; |
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| 18 | struct intel_c20pll_state; |
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| 19 | struct intel_cx0pll_state; |
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| 20 | struct intel_crtc; |
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| 21 | struct intel_crtc_state; |
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| 22 | struct intel_encoder; |
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| 23 | struct intel_hdmi; |
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| 24 | |
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| 25 | bool intel_is_c10phy(struct drm_i915_private *dev_priv, enum phy phy); |
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| 26 | void intel_mtl_pll_enable(struct intel_encoder *encoder, |
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| 27 | const struct intel_crtc_state *crtc_state); |
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| 28 | void intel_mtl_pll_disable(struct intel_encoder *encoder); |
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| 29 | enum icl_port_dpll_id |
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| 30 | intel_mtl_port_pll_type(struct intel_encoder *encoder, |
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| 31 | const struct intel_crtc_state *crtc_state); |
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| 32 | |
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| 33 | int intel_cx0pll_calc_state(struct intel_crtc_state *crtc_state, struct intel_encoder *encoder); |
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| 34 | void intel_cx0pll_readout_hw_state(struct intel_encoder *encoder, |
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| 35 | struct intel_cx0pll_state *pll_state); |
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| 36 | int intel_cx0pll_calc_port_clock(struct intel_encoder *encoder, |
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| 37 | const struct intel_cx0pll_state *pll_state); |
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| 38 | |
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| 39 | void intel_c10pll_dump_hw_state(struct drm_i915_private *dev_priv, |
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| 40 | const struct intel_c10pll_state *hw_state); |
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| 41 | void intel_cx0pll_state_verify(struct intel_atomic_state *state, |
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| 42 | struct intel_crtc *crtc); |
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| 43 | void intel_c20pll_dump_hw_state(struct drm_i915_private *i915, |
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| 44 | const struct intel_c20pll_state *hw_state); |
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| 45 | void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder, |
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| 46 | const struct intel_crtc_state *crtc_state); |
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| 47 | int intel_cx0_phy_check_hdmi_link_rate(struct intel_hdmi *hdmi, int clock); |
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| 48 | int intel_mtl_tbt_calc_port_clock(struct intel_encoder *encoder); |
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| 49 | |
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| 50 | #endif /* __INTEL_CX0_PHY_H__ */ |
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| 51 | |
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