| 1 | /* SPDX-License-Identifier: MIT */ |
|---|---|
| 2 | /* |
| 3 | * Copyright © 2019 Intel Corporation |
| 4 | */ |
| 5 | |
| 6 | #ifndef __INTEL_SNPS_PHY_H__ |
| 7 | #define __INTEL_SNPS_PHY_H__ |
| 8 | |
| 9 | #include <linux/types.h> |
| 10 | |
| 11 | enum phy; |
| 12 | struct intel_atomic_state; |
| 13 | struct intel_crtc; |
| 14 | struct intel_crtc_state; |
| 15 | struct intel_display; |
| 16 | struct intel_encoder; |
| 17 | struct intel_mpllb_state; |
| 18 | |
| 19 | void intel_snps_phy_wait_for_calibration(struct intel_display *display); |
| 20 | void intel_snps_phy_update_psr_power_state(struct intel_encoder *encoder, |
| 21 | bool enable); |
| 22 | |
| 23 | int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state, |
| 24 | struct intel_encoder *encoder); |
| 25 | void intel_mpllb_enable(struct intel_encoder *encoder, |
| 26 | const struct intel_crtc_state *crtc_state); |
| 27 | void intel_mpllb_disable(struct intel_encoder *encoder); |
| 28 | void intel_mpllb_readout_hw_state(struct intel_encoder *encoder, |
| 29 | struct intel_mpllb_state *pll_state); |
| 30 | int intel_mpllb_calc_port_clock(struct intel_encoder *encoder, |
| 31 | const struct intel_mpllb_state *pll_state); |
| 32 | |
| 33 | void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder, |
| 34 | const struct intel_crtc_state *crtc_state); |
| 35 | void intel_mpllb_state_verify(struct intel_atomic_state *state, |
| 36 | struct intel_crtc *crtc); |
| 37 | |
| 38 | #endif /* __INTEL_SNPS_PHY_H__ */ |
| 39 |