1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* |
3 | * IIO driver for PAC1934 Multi-Channel DC Power/Energy Monitor |
4 | * |
5 | * Copyright (C) 2017-2024 Microchip Technology Inc. and its subsidiaries |
6 | * |
7 | * Author: Bogdan Bolocan <bogdan.bolocan@microchip.com> |
8 | * Author: Victor Tudose |
9 | * Author: Marius Cristea <marius.cristea@microchip.com> |
10 | * |
11 | * Datasheet for PAC1931, PAC1932, PAC1933 and PAC1934 can be found here: |
12 | * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/PAC1931-Family-Data-Sheet-DS20005850E.pdf |
13 | */ |
14 | |
15 | #include <linux/acpi.h> |
16 | #include <linux/bitfield.h> |
17 | #include <linux/delay.h> |
18 | #include <linux/device.h> |
19 | #include <linux/i2c.h> |
20 | #include <linux/iio/iio.h> |
21 | #include <linux/iio/sysfs.h> |
22 | #include <asm/unaligned.h> |
23 | |
24 | /* |
25 | * maximum accumulation time should be (17 * 60 * 1000) around 17 minutes@1024 sps |
26 | * till PAC1934 accumulation registers starts to saturate |
27 | */ |
28 | #define PAC1934_MAX_RFSH_LIMIT_MS 60000 |
29 | /* 50msec is the timeout for validity of the cached registers */ |
30 | #define PAC1934_MIN_POLLING_TIME_MS 50 |
31 | /* |
32 | * 1000usec is the minimum wait time for normal conversions when sample |
33 | * rate doesn't change |
34 | */ |
35 | #define PAC1934_MIN_UPDATE_WAIT_TIME_US 1000 |
36 | |
37 | /* 32000mV */ |
38 | #define PAC1934_VOLTAGE_MILLIVOLTS_MAX 32000 |
39 | /* voltage bits resolution when set for unsigned values */ |
40 | #define PAC1934_VOLTAGE_U_RES 16 |
41 | /* voltage bits resolution when set for signed values */ |
42 | #define PAC1934_VOLTAGE_S_RES 15 |
43 | |
44 | /* |
45 | * max signed value that can be stored on 32 bits and 8 digits fractional value |
46 | * (2^31 - 1) * 10^8 + 99999999 |
47 | */ |
48 | #define PAC_193X_MAX_POWER_ACC 214748364799999999LL |
49 | /* |
50 | * min signed value that can be stored on 32 bits and 8 digits fractional value |
51 | * -(2^31) * 10^8 - 99999999 |
52 | */ |
53 | #define PAC_193X_MIN_POWER_ACC -214748364899999999LL |
54 | |
55 | #define PAC1934_MAX_NUM_CHANNELS 4 |
56 | |
57 | #define PAC1934_MEAS_REG_LEN 76 |
58 | #define PAC1934_CTRL_REG_LEN 12 |
59 | |
60 | #define PAC1934_DEFAULT_CHIP_SAMP_SPEED_HZ 1024 |
61 | |
62 | /* I2C address map */ |
63 | #define PAC1934_REFRESH_REG_ADDR 0x00 |
64 | #define PAC1934_CTRL_REG_ADDR 0x01 |
65 | #define PAC1934_ACC_COUNT_REG_ADDR 0x02 |
66 | #define PAC1934_VPOWER_ACC_1_ADDR 0x03 |
67 | #define PAC1934_VPOWER_ACC_2_ADDR 0x04 |
68 | #define PAC1934_VPOWER_ACC_3_ADDR 0x05 |
69 | #define PAC1934_VPOWER_ACC_4_ADDR 0x06 |
70 | #define PAC1934_VBUS_1_ADDR 0x07 |
71 | #define PAC1934_VBUS_2_ADDR 0x08 |
72 | #define PAC1934_VBUS_3_ADDR 0x09 |
73 | #define PAC1934_VBUS_4_ADDR 0x0A |
74 | #define PAC1934_VSENSE_1_ADDR 0x0B |
75 | #define PAC1934_VSENSE_2_ADDR 0x0C |
76 | #define PAC1934_VSENSE_3_ADDR 0x0D |
77 | #define PAC1934_VSENSE_4_ADDR 0x0E |
78 | #define PAC1934_VBUS_AVG_1_ADDR 0x0F |
79 | #define PAC1934_VBUS_AVG_2_ADDR 0x10 |
80 | #define PAC1934_VBUS_AVG_3_ADDR 0x11 |
81 | #define PAC1934_VBUS_AVG_4_ADDR 0x12 |
82 | #define PAC1934_VSENSE_AVG_1_ADDR 0x13 |
83 | #define PAC1934_VSENSE_AVG_2_ADDR 0x14 |
84 | #define PAC1934_VSENSE_AVG_3_ADDR 0x15 |
85 | #define PAC1934_VSENSE_AVG_4_ADDR 0x16 |
86 | #define PAC1934_VPOWER_1_ADDR 0x17 |
87 | #define PAC1934_VPOWER_2_ADDR 0x18 |
88 | #define PAC1934_VPOWER_3_ADDR 0x19 |
89 | #define PAC1934_VPOWER_4_ADDR 0x1A |
90 | #define PAC1934_REFRESH_V_REG_ADDR 0x1F |
91 | #define PAC1934_CTRL_STAT_REGS_ADDR 0x1C |
92 | #define PAC1934_PID_REG_ADDR 0xFD |
93 | #define PAC1934_MID_REG_ADDR 0xFE |
94 | #define PAC1934_RID_REG_ADDR 0xFF |
95 | |
96 | /* PRODUCT ID REGISTER + MANUFACTURER ID REGISTER + REVISION ID REGISTER */ |
97 | #define PAC1934_ID_REG_LEN 3 |
98 | #define PAC1934_PID_IDX 0 |
99 | #define PAC1934_MID_IDX 1 |
100 | #define PAC1934_RID_IDX 2 |
101 | |
102 | #define PAC1934_ACPI_GET_NAMES_AND_MOHMS_VALS 1 |
103 | #define PAC1934_ACPI_GET_UOHMS_VALS 2 |
104 | #define PAC1934_ACPI_GET_BIPOLAR_SETTINGS 4 |
105 | #define PAC1934_ACPI_GET_SAMP 5 |
106 | |
107 | #define PAC1934_SAMPLE_RATE_SHIFT 6 |
108 | |
109 | #define PAC1934_VBUS_SENSE_REG_LEN 2 |
110 | #define PAC1934_ACC_REG_LEN 3 |
111 | #define PAC1934_VPOWER_REG_LEN 4 |
112 | #define PAC1934_VPOWER_ACC_REG_LEN 6 |
113 | #define PAC1934_MAX_REGISTER_LENGTH 6 |
114 | |
115 | #define PAC1934_CUSTOM_ATTR_FOR_CHANNEL 1 |
116 | |
117 | /* |
118 | * relative offsets when using multi-byte reads/writes even though these |
119 | * bytes are read one after the other, they are not at adjacent memory |
120 | * locations within the I2C memory map. The chip can skip some addresses |
121 | */ |
122 | #define PAC1934_CHANNEL_DIS_REG_OFF 0 |
123 | #define PAC1934_NEG_PWR_REG_OFF 1 |
124 | |
125 | /* |
126 | * when reading/writing multiple bytes from offset PAC1934_CHANNEL_DIS_REG_OFF, |
127 | * the chip jumps over the 0x1E (REFRESH_G) and 0x1F (REFRESH_V) offsets |
128 | */ |
129 | #define PAC1934_SLOW_REG_OFF 2 |
130 | #define PAC1934_CTRL_ACT_REG_OFF 3 |
131 | #define PAC1934_CHANNEL_DIS_ACT_REG_OFF 4 |
132 | #define PAC1934_NEG_PWR_ACT_REG_OFF 5 |
133 | #define PAC1934_CTRL_LAT_REG_OFF 6 |
134 | #define PAC1934_CHANNEL_DIS_LAT_REG_OFF 7 |
135 | #define PAC1934_NEG_PWR_LAT_REG_OFF 8 |
136 | #define PAC1934_PID_REG_OFF 9 |
137 | #define PAC1934_MID_REG_OFF 10 |
138 | #define PAC1934_REV_REG_OFF 11 |
139 | #define PAC1934_CTRL_STATUS_INFO_LEN 12 |
140 | |
141 | #define PAC1934_MID 0x5D |
142 | #define PAC1931_PID 0x58 |
143 | #define PAC1932_PID 0x59 |
144 | #define PAC1933_PID 0x5A |
145 | #define PAC1934_PID 0x5B |
146 | |
147 | /* Scale constant = (10^3 * 3.2 * 10^9 / 2^28) for mili Watt-second */ |
148 | #define PAC1934_SCALE_CONSTANT 11921 |
149 | |
150 | #define PAC1934_MAX_VPOWER_RSHIFTED_BY_28B 11921 |
151 | #define PAC1934_MAX_VSENSE_RSHIFTED_BY_16B 1525 |
152 | |
153 | #define PAC1934_DEV_ATTR(name) (&iio_dev_attr_##name.dev_attr.attr) |
154 | |
155 | #define PAC1934_CRTL_SAMPLE_RATE_MASK GENMASK(7, 6) |
156 | #define PAC1934_CHAN_SLEEP_MASK BIT(5) |
157 | #define PAC1934_CHAN_SLEEP_SET BIT(5) |
158 | #define PAC1934_CHAN_SINGLE_MASK BIT(4) |
159 | #define PAC1934_CHAN_SINGLE_SHOT_SET BIT(4) |
160 | #define PAC1934_CHAN_ALERT_MASK BIT(3) |
161 | #define PAC1934_CHAN_ALERT_EN BIT(3) |
162 | #define PAC1934_CHAN_ALERT_CC_MASK BIT(2) |
163 | #define PAC1934_CHAN_ALERT_CC_EN BIT(2) |
164 | #define PAC1934_CHAN_OVF_ALERT_MASK BIT(1) |
165 | #define PAC1934_CHAN_OVF_ALERT_EN BIT(1) |
166 | #define PAC1934_CHAN_OVF_MASK BIT(0) |
167 | |
168 | #define PAC1934_CHAN_DIS_CH1_OFF_MASK BIT(7) |
169 | #define PAC1934_CHAN_DIS_CH2_OFF_MASK BIT(6) |
170 | #define PAC1934_CHAN_DIS_CH3_OFF_MASK BIT(5) |
171 | #define PAC1934_CHAN_DIS_CH4_OFF_MASK BIT(4) |
172 | #define PAC1934_SMBUS_TIMEOUT_MASK BIT(3) |
173 | #define PAC1934_SMBUS_BYTECOUNT_MASK BIT(2) |
174 | #define PAC1934_SMBUS_NO_SKIP_MASK BIT(1) |
175 | |
176 | #define PAC1934_NEG_PWR_CH1_BIDI_MASK BIT(7) |
177 | #define PAC1934_NEG_PWR_CH2_BIDI_MASK BIT(6) |
178 | #define PAC1934_NEG_PWR_CH3_BIDI_MASK BIT(5) |
179 | #define PAC1934_NEG_PWR_CH4_BIDI_MASK BIT(4) |
180 | #define PAC1934_NEG_PWR_CH1_BIDV_MASK BIT(3) |
181 | #define PAC1934_NEG_PWR_CH2_BIDV_MASK BIT(2) |
182 | #define PAC1934_NEG_PWR_CH3_BIDV_MASK BIT(1) |
183 | #define PAC1934_NEG_PWR_CH4_BIDV_MASK BIT(0) |
184 | |
185 | /* |
186 | * Universal Unique Identifier (UUID), |
187 | * 033771E0-1705-47B4-9535-D1BBE14D9A09, |
188 | * is reserved to Microchip for the PAC1934. |
189 | */ |
190 | #define PAC1934_DSM_UUID "033771E0-1705-47B4-9535-D1BBE14D9A09" |
191 | |
192 | enum pac1934_ids { |
193 | PAC1931, |
194 | PAC1932, |
195 | PAC1933, |
196 | PAC1934 |
197 | }; |
198 | |
199 | enum pac1934_samps { |
200 | PAC1934_SAMP_1024SPS, |
201 | PAC1934_SAMP_256SPS, |
202 | PAC1934_SAMP_64SPS, |
203 | PAC1934_SAMP_8SPS |
204 | }; |
205 | |
206 | /* |
207 | * these indexes are exactly describing the element order within a single |
208 | * PAC1934 phys channel IIO channel descriptor; see the static const struct |
209 | * iio_chan_spec pac1934_single_channel[] declaration |
210 | */ |
211 | enum pac1934_ch_idx { |
212 | PAC1934_CH_ENERGY, |
213 | PAC1934_CH_POWER, |
214 | PAC1934_CH_VOLTAGE, |
215 | PAC1934_CH_CURRENT, |
216 | PAC1934_CH_VOLTAGE_AVERAGE, |
217 | PAC1934_CH_CURRENT_AVERAGE |
218 | }; |
219 | |
220 | /** |
221 | * struct pac1934_features - features of a pac1934 instance |
222 | * @phys_channels: number of physical channels supported by the chip |
223 | * @name: chip's name |
224 | */ |
225 | struct pac1934_features { |
226 | u8 phys_channels; |
227 | const char *name; |
228 | }; |
229 | |
230 | struct samp_rate_mapping { |
231 | u16 samp_rate; |
232 | u8 shift2value; |
233 | }; |
234 | |
235 | static const unsigned int samp_rate_map_tbl[] = { |
236 | [PAC1934_SAMP_1024SPS] = 1024, |
237 | [PAC1934_SAMP_256SPS] = 256, |
238 | [PAC1934_SAMP_64SPS] = 64, |
239 | [PAC1934_SAMP_8SPS] = 8, |
240 | }; |
241 | |
242 | static const struct pac1934_features pac1934_chip_config[] = { |
243 | [PAC1931] = { |
244 | .phys_channels = 1, |
245 | .name = "pac1931" , |
246 | }, |
247 | [PAC1932] = { |
248 | .phys_channels = 2, |
249 | .name = "pac1932" , |
250 | }, |
251 | [PAC1933] = { |
252 | .phys_channels = 3, |
253 | .name = "pac1933" , |
254 | }, |
255 | [PAC1934] = { |
256 | .phys_channels = 4, |
257 | .name = "pac1934" , |
258 | }, |
259 | }; |
260 | |
261 | /** |
262 | * struct reg_data - data from the registers |
263 | * @meas_regs: snapshot of raw measurements registers |
264 | * @ctrl_regs: snapshot of control registers |
265 | * @energy_sec_acc: snapshot of energy values |
266 | * @vpower_acc: accumulated vpower values |
267 | * @vpower: snapshot of vpower registers |
268 | * @vbus: snapshot of vbus registers |
269 | * @vbus_avg: averages of vbus registers |
270 | * @vsense: snapshot of vsense registers |
271 | * @vsense_avg: averages of vsense registers |
272 | * @num_enabled_channels: count of how many chip channels are currently enabled |
273 | */ |
274 | struct reg_data { |
275 | u8 meas_regs[PAC1934_MEAS_REG_LEN]; |
276 | u8 ctrl_regs[PAC1934_CTRL_REG_LEN]; |
277 | s64 energy_sec_acc[PAC1934_MAX_NUM_CHANNELS]; |
278 | s64 vpower_acc[PAC1934_MAX_NUM_CHANNELS]; |
279 | s32 vpower[PAC1934_MAX_NUM_CHANNELS]; |
280 | s32 vbus[PAC1934_MAX_NUM_CHANNELS]; |
281 | s32 vbus_avg[PAC1934_MAX_NUM_CHANNELS]; |
282 | s32 vsense[PAC1934_MAX_NUM_CHANNELS]; |
283 | s32 vsense_avg[PAC1934_MAX_NUM_CHANNELS]; |
284 | u8 num_enabled_channels; |
285 | }; |
286 | |
287 | /** |
288 | * struct pac1934_chip_info - information about the chip |
289 | * @client: the i2c-client attached to the device |
290 | * @lock: synchronize access to driver's state members |
291 | * @work_chip_rfsh: work queue used for refresh commands |
292 | * @phys_channels: phys channels count |
293 | * @active_channels: array of values, true means that channel is active |
294 | * @enable_energy: array of values, true means that channel energy is measured |
295 | * @bi_dir: array of bools, true means that channel is bidirectional |
296 | * @chip_variant: chip variant |
297 | * @chip_revision: chip revision |
298 | * @shunts: shunts |
299 | * @chip_reg_data: chip reg data |
300 | * @sample_rate_value: sampling frequency |
301 | * @labels: table with channels labels |
302 | * @iio_info: iio_info |
303 | * @tstamp: chip's uptime |
304 | */ |
305 | struct pac1934_chip_info { |
306 | struct i2c_client *client; |
307 | struct mutex lock; /* synchronize access to driver's state members */ |
308 | struct delayed_work work_chip_rfsh; |
309 | u8 phys_channels; |
310 | bool active_channels[PAC1934_MAX_NUM_CHANNELS]; |
311 | bool enable_energy[PAC1934_MAX_NUM_CHANNELS]; |
312 | bool bi_dir[PAC1934_MAX_NUM_CHANNELS]; |
313 | u8 chip_variant; |
314 | u8 chip_revision; |
315 | u32 shunts[PAC1934_MAX_NUM_CHANNELS]; |
316 | struct reg_data chip_reg_data; |
317 | s32 sample_rate_value; |
318 | char *labels[PAC1934_MAX_NUM_CHANNELS]; |
319 | struct iio_info iio_info; |
320 | unsigned long tstamp; |
321 | }; |
322 | |
323 | #define TO_PAC1934_CHIP_INFO(d) container_of(d, struct pac1934_chip_info, work_chip_rfsh) |
324 | |
325 | #define PAC1934_VPOWER_ACC_CHANNEL(_index, _si, _address) { \ |
326 | .type = IIO_ENERGY, \ |
327 | .address = (_address), \ |
328 | .indexed = 1, \ |
329 | .channel = (_index), \ |
330 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ |
331 | BIT(IIO_CHAN_INFO_SCALE) | \ |
332 | BIT(IIO_CHAN_INFO_ENABLE), \ |
333 | .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
334 | .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
335 | .scan_index = (_si), \ |
336 | .scan_type = { \ |
337 | .sign = 'u', \ |
338 | .realbits = 48, \ |
339 | .storagebits = 64, \ |
340 | .endianness = IIO_CPU, \ |
341 | } \ |
342 | } |
343 | |
344 | #define PAC1934_VBUS_CHANNEL(_index, _si, _address) { \ |
345 | .type = IIO_VOLTAGE, \ |
346 | .address = (_address), \ |
347 | .indexed = 1, \ |
348 | .channel = (_index), \ |
349 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ |
350 | BIT(IIO_CHAN_INFO_SCALE), \ |
351 | .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
352 | .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
353 | .scan_index = (_si), \ |
354 | .scan_type = { \ |
355 | .sign = 'u', \ |
356 | .realbits = 16, \ |
357 | .storagebits = 16, \ |
358 | .endianness = IIO_CPU, \ |
359 | } \ |
360 | } |
361 | |
362 | #define PAC1934_VBUS_AVG_CHANNEL(_index, _si, _address) { \ |
363 | .type = IIO_VOLTAGE, \ |
364 | .address = (_address), \ |
365 | .indexed = 1, \ |
366 | .channel = (_index), \ |
367 | .info_mask_separate = BIT(IIO_CHAN_INFO_AVERAGE_RAW) | \ |
368 | BIT(IIO_CHAN_INFO_SCALE), \ |
369 | .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
370 | .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
371 | .scan_index = (_si), \ |
372 | .scan_type = { \ |
373 | .sign = 'u', \ |
374 | .realbits = 16, \ |
375 | .storagebits = 16, \ |
376 | .endianness = IIO_CPU, \ |
377 | } \ |
378 | } |
379 | |
380 | #define PAC1934_VSENSE_CHANNEL(_index, _si, _address) { \ |
381 | .type = IIO_CURRENT, \ |
382 | .address = (_address), \ |
383 | .indexed = 1, \ |
384 | .channel = (_index), \ |
385 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ |
386 | BIT(IIO_CHAN_INFO_SCALE), \ |
387 | .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
388 | .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
389 | .scan_index = (_si), \ |
390 | .scan_type = { \ |
391 | .sign = 'u', \ |
392 | .realbits = 16, \ |
393 | .storagebits = 16, \ |
394 | .endianness = IIO_CPU, \ |
395 | } \ |
396 | } |
397 | |
398 | #define PAC1934_VSENSE_AVG_CHANNEL(_index, _si, _address) { \ |
399 | .type = IIO_CURRENT, \ |
400 | .address = (_address), \ |
401 | .indexed = 1, \ |
402 | .channel = (_index), \ |
403 | .info_mask_separate = BIT(IIO_CHAN_INFO_AVERAGE_RAW) | \ |
404 | BIT(IIO_CHAN_INFO_SCALE), \ |
405 | .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
406 | .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
407 | .scan_index = (_si), \ |
408 | .scan_type = { \ |
409 | .sign = 'u', \ |
410 | .realbits = 16, \ |
411 | .storagebits = 16, \ |
412 | .endianness = IIO_CPU, \ |
413 | } \ |
414 | } |
415 | |
416 | #define PAC1934_VPOWER_CHANNEL(_index, _si, _address) { \ |
417 | .type = IIO_POWER, \ |
418 | .address = (_address), \ |
419 | .indexed = 1, \ |
420 | .channel = (_index), \ |
421 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ |
422 | BIT(IIO_CHAN_INFO_SCALE), \ |
423 | .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
424 | .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
425 | .scan_index = (_si), \ |
426 | .scan_type = { \ |
427 | .sign = 'u', \ |
428 | .realbits = 28, \ |
429 | .storagebits = 32, \ |
430 | .shift = 4, \ |
431 | .endianness = IIO_CPU, \ |
432 | } \ |
433 | } |
434 | |
435 | static const struct iio_chan_spec pac1934_single_channel[] = { |
436 | PAC1934_VPOWER_ACC_CHANNEL(0, 0, PAC1934_VPOWER_ACC_1_ADDR), |
437 | PAC1934_VPOWER_CHANNEL(0, 0, PAC1934_VPOWER_1_ADDR), |
438 | PAC1934_VBUS_CHANNEL(0, 0, PAC1934_VBUS_1_ADDR), |
439 | PAC1934_VSENSE_CHANNEL(0, 0, PAC1934_VSENSE_1_ADDR), |
440 | PAC1934_VBUS_AVG_CHANNEL(0, 0, PAC1934_VBUS_AVG_1_ADDR), |
441 | PAC1934_VSENSE_AVG_CHANNEL(0, 0, PAC1934_VSENSE_AVG_1_ADDR), |
442 | }; |
443 | |
444 | /* Low-level I2c functions used to transfer up to 76 bytes at once */ |
445 | static int pac1934_i2c_read(struct i2c_client *client, u8 reg_addr, |
446 | void *databuf, u8 len) |
447 | { |
448 | int ret; |
449 | struct i2c_msg msgs[2] = { |
450 | { |
451 | .addr = client->addr, |
452 | .len = 1, |
453 | .buf = (u8 *)®_addr, |
454 | }, |
455 | { |
456 | .addr = client->addr, |
457 | .len = len, |
458 | .buf = databuf, |
459 | .flags = I2C_M_RD |
460 | } |
461 | }; |
462 | |
463 | ret = i2c_transfer(adap: client->adapter, msgs, ARRAY_SIZE(msgs)); |
464 | if (ret < 0) |
465 | return ret; |
466 | |
467 | return 0; |
468 | } |
469 | |
470 | static int pac1934_get_samp_rate_idx(struct pac1934_chip_info *info, |
471 | u32 new_samp_rate) |
472 | { |
473 | int cnt; |
474 | |
475 | for (cnt = 0; cnt < ARRAY_SIZE(samp_rate_map_tbl); cnt++) |
476 | if (new_samp_rate == samp_rate_map_tbl[cnt]) |
477 | return cnt; |
478 | |
479 | /* not a valid sample rate value */ |
480 | return -EINVAL; |
481 | } |
482 | |
483 | static ssize_t pac1934_shunt_value_show(struct device *dev, |
484 | struct device_attribute *attr, |
485 | char *buf) |
486 | { |
487 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
488 | struct pac1934_chip_info *info = iio_priv(indio_dev); |
489 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
490 | |
491 | return sysfs_emit(buf, fmt: "%u\n" , info->shunts[this_attr->address]); |
492 | } |
493 | |
494 | static ssize_t pac1934_shunt_value_store(struct device *dev, |
495 | struct device_attribute *attr, |
496 | const char *buf, size_t count) |
497 | { |
498 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); |
499 | struct pac1934_chip_info *info = iio_priv(indio_dev); |
500 | struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); |
501 | int sh_val; |
502 | |
503 | if (kstrtouint(s: buf, base: 10, res: &sh_val)) { |
504 | dev_err(dev, "Shunt value is not valid\n" ); |
505 | return -EINVAL; |
506 | } |
507 | |
508 | scoped_guard(mutex, &info->lock) |
509 | info->shunts[this_attr->address] = sh_val; |
510 | |
511 | return count; |
512 | } |
513 | |
514 | static int pac1934_read_avail(struct iio_dev *indio_dev, |
515 | struct iio_chan_spec const *channel, |
516 | const int **vals, int *type, int *length, long mask) |
517 | { |
518 | switch (mask) { |
519 | case IIO_CHAN_INFO_SAMP_FREQ: |
520 | *type = IIO_VAL_INT; |
521 | *vals = samp_rate_map_tbl; |
522 | *length = ARRAY_SIZE(samp_rate_map_tbl); |
523 | return IIO_AVAIL_LIST; |
524 | } |
525 | |
526 | return -EINVAL; |
527 | } |
528 | |
529 | static int pac1934_send_refresh(struct pac1934_chip_info *info, |
530 | u8 refresh_cmd, u32 wait_time) |
531 | { |
532 | /* this function only sends REFRESH or REFRESH_V */ |
533 | struct i2c_client *client = info->client; |
534 | int ret; |
535 | u8 bidir_reg; |
536 | bool revision_bug = false; |
537 | |
538 | if (info->chip_revision == 2 || info->chip_revision == 3) { |
539 | /* |
540 | * chip rev 2 and 3 bug workaround |
541 | * see: PAC1934 Family Data Sheet Errata DS80000836A.pdf |
542 | */ |
543 | revision_bug = true; |
544 | |
545 | bidir_reg = |
546 | FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDI_MASK, info->bi_dir[0]) | |
547 | FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDI_MASK, info->bi_dir[1]) | |
548 | FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDI_MASK, info->bi_dir[2]) | |
549 | FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDI_MASK, info->bi_dir[3]) | |
550 | FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDV_MASK, info->bi_dir[0]) | |
551 | FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDV_MASK, info->bi_dir[1]) | |
552 | FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDV_MASK, info->bi_dir[2]) | |
553 | FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDV_MASK, info->bi_dir[3]); |
554 | |
555 | ret = i2c_smbus_write_byte_data(client, |
556 | PAC1934_CTRL_STAT_REGS_ADDR + |
557 | PAC1934_NEG_PWR_REG_OFF, |
558 | value: bidir_reg); |
559 | if (ret) |
560 | return ret; |
561 | } |
562 | |
563 | ret = i2c_smbus_write_byte(client, value: refresh_cmd); |
564 | if (ret) { |
565 | dev_err(&client->dev, "%s - cannot send 0x%02X\n" , |
566 | __func__, refresh_cmd); |
567 | return ret; |
568 | } |
569 | |
570 | if (revision_bug) { |
571 | /* |
572 | * chip rev 2 and 3 bug workaround - write again the same |
573 | * register write the updated registers back |
574 | */ |
575 | ret = i2c_smbus_write_byte_data(client, |
576 | PAC1934_CTRL_STAT_REGS_ADDR + |
577 | PAC1934_NEG_PWR_REG_OFF, value: bidir_reg); |
578 | if (ret) |
579 | return ret; |
580 | } |
581 | |
582 | /* register data retrieval timestamp */ |
583 | info->tstamp = jiffies; |
584 | |
585 | /* wait till the data is available */ |
586 | usleep_range(min: wait_time, max: wait_time + 100); |
587 | |
588 | return ret; |
589 | } |
590 | |
591 | static int pac1934_reg_snapshot(struct pac1934_chip_info *info, |
592 | bool do_refresh, u8 refresh_cmd, u32 wait_time) |
593 | { |
594 | int ret; |
595 | struct i2c_client *client = info->client; |
596 | u8 samp_shift, ctrl_regs_tmp; |
597 | u8 *offset_reg_data_p; |
598 | u16 tmp_value; |
599 | u32 samp_rate, cnt, tmp; |
600 | s64 curr_energy, inc; |
601 | u64 tmp_energy; |
602 | struct reg_data *reg_data; |
603 | |
604 | guard(mutex)(T: &info->lock); |
605 | |
606 | if (do_refresh) { |
607 | ret = pac1934_send_refresh(info, refresh_cmd, wait_time); |
608 | if (ret < 0) { |
609 | dev_err(&client->dev, |
610 | "%s - cannot send refresh\n" , |
611 | __func__); |
612 | return ret; |
613 | } |
614 | } |
615 | |
616 | ret = i2c_smbus_read_i2c_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR, |
617 | PAC1934_CTRL_REG_LEN, |
618 | values: (u8 *)info->chip_reg_data.ctrl_regs); |
619 | if (ret < 0) { |
620 | dev_err(&client->dev, |
621 | "%s - cannot read ctrl/status registers\n" , |
622 | __func__); |
623 | return ret; |
624 | } |
625 | |
626 | reg_data = &info->chip_reg_data; |
627 | |
628 | /* read the data registers */ |
629 | ret = pac1934_i2c_read(client, PAC1934_ACC_COUNT_REG_ADDR, |
630 | databuf: (u8 *)reg_data->meas_regs, PAC1934_MEAS_REG_LEN); |
631 | if (ret) { |
632 | dev_err(&client->dev, |
633 | "%s - cannot read ACC_COUNT register: %d:%d\n" , |
634 | __func__, ret, PAC1934_MEAS_REG_LEN); |
635 | return ret; |
636 | } |
637 | |
638 | /* see how much shift is required by the sample rate */ |
639 | samp_rate = samp_rate_map_tbl[((reg_data->ctrl_regs[PAC1934_CTRL_LAT_REG_OFF]) >> 6)]; |
640 | samp_shift = get_count_order(count: samp_rate); |
641 | |
642 | ctrl_regs_tmp = reg_data->ctrl_regs[PAC1934_CHANNEL_DIS_LAT_REG_OFF]; |
643 | offset_reg_data_p = ®_data->meas_regs[PAC1934_ACC_REG_LEN]; |
644 | |
645 | /* start with VPOWER_ACC */ |
646 | for (cnt = 0; cnt < info->phys_channels; cnt++) { |
647 | /* check if the channel is active, skip all fields if disabled */ |
648 | if ((ctrl_regs_tmp << cnt) & 0x80) |
649 | continue; |
650 | |
651 | /* skip if the energy accumulation is disabled */ |
652 | if (info->enable_energy[cnt]) { |
653 | curr_energy = info->chip_reg_data.energy_sec_acc[cnt]; |
654 | |
655 | tmp_energy = get_unaligned_be48(p: offset_reg_data_p); |
656 | |
657 | if (info->bi_dir[cnt]) |
658 | reg_data->vpower_acc[cnt] = sign_extend64(value: tmp_energy, index: 47); |
659 | else |
660 | reg_data->vpower_acc[cnt] = tmp_energy; |
661 | |
662 | /* |
663 | * compute the scaled to 1 second accumulated energy value; |
664 | * energy accumulator scaled to 1sec = VPOWER_ACC/2^samp_shift |
665 | * the chip's sampling rate is 2^samp_shift samples/sec |
666 | */ |
667 | inc = (reg_data->vpower_acc[cnt] >> samp_shift); |
668 | |
669 | /* add the power_acc field */ |
670 | curr_energy += inc; |
671 | |
672 | clamp(curr_energy, PAC_193X_MIN_POWER_ACC, PAC_193X_MAX_POWER_ACC); |
673 | |
674 | reg_data->energy_sec_acc[cnt] = curr_energy; |
675 | } |
676 | |
677 | offset_reg_data_p += PAC1934_VPOWER_ACC_REG_LEN; |
678 | } |
679 | |
680 | /* continue with VBUS */ |
681 | for (cnt = 0; cnt < info->phys_channels; cnt++) { |
682 | if ((ctrl_regs_tmp << cnt) & 0x80) |
683 | continue; |
684 | |
685 | tmp_value = get_unaligned_be16(p: offset_reg_data_p); |
686 | |
687 | if (info->bi_dir[cnt]) |
688 | reg_data->vbus[cnt] = sign_extend32(value: (u32)(tmp_value), index: 15); |
689 | else |
690 | reg_data->vbus[cnt] = tmp_value; |
691 | |
692 | offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; |
693 | } |
694 | |
695 | /* VSENSE */ |
696 | for (cnt = 0; cnt < info->phys_channels; cnt++) { |
697 | if ((ctrl_regs_tmp << cnt) & 0x80) |
698 | continue; |
699 | |
700 | tmp_value = get_unaligned_be16(p: offset_reg_data_p); |
701 | |
702 | if (info->bi_dir[cnt]) |
703 | reg_data->vsense[cnt] = sign_extend32(value: (u32)(tmp_value), index: 15); |
704 | else |
705 | reg_data->vsense[cnt] = tmp_value; |
706 | |
707 | offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; |
708 | } |
709 | |
710 | /* VBUS_AVG */ |
711 | for (cnt = 0; cnt < info->phys_channels; cnt++) { |
712 | if ((ctrl_regs_tmp << cnt) & 0x80) |
713 | continue; |
714 | |
715 | tmp_value = get_unaligned_be16(p: offset_reg_data_p); |
716 | |
717 | if (info->bi_dir[cnt]) |
718 | reg_data->vbus_avg[cnt] = sign_extend32(value: (u32)(tmp_value), index: 15); |
719 | else |
720 | reg_data->vbus_avg[cnt] = tmp_value; |
721 | |
722 | offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; |
723 | } |
724 | |
725 | /* VSENSE_AVG */ |
726 | for (cnt = 0; cnt < info->phys_channels; cnt++) { |
727 | if ((ctrl_regs_tmp << cnt) & 0x80) |
728 | continue; |
729 | |
730 | tmp_value = get_unaligned_be16(p: offset_reg_data_p); |
731 | |
732 | if (info->bi_dir[cnt]) |
733 | reg_data->vsense_avg[cnt] = sign_extend32(value: (u32)(tmp_value), index: 15); |
734 | else |
735 | reg_data->vsense_avg[cnt] = tmp_value; |
736 | |
737 | offset_reg_data_p += PAC1934_VBUS_SENSE_REG_LEN; |
738 | } |
739 | |
740 | /* VPOWER */ |
741 | for (cnt = 0; cnt < info->phys_channels; cnt++) { |
742 | if ((ctrl_regs_tmp << cnt) & 0x80) |
743 | continue; |
744 | |
745 | tmp = get_unaligned_be32(p: offset_reg_data_p) >> 4; |
746 | |
747 | if (info->bi_dir[cnt]) |
748 | reg_data->vpower[cnt] = sign_extend32(value: tmp, index: 27); |
749 | else |
750 | reg_data->vpower[cnt] = tmp; |
751 | |
752 | offset_reg_data_p += PAC1934_VPOWER_REG_LEN; |
753 | } |
754 | |
755 | return 0; |
756 | } |
757 | |
758 | static int pac1934_retrieve_data(struct pac1934_chip_info *info, |
759 | u32 wait_time) |
760 | { |
761 | int ret = 0; |
762 | |
763 | /* |
764 | * check if the minimal elapsed time has passed and if so, |
765 | * re-read the chip, otherwise the cached info is just fine |
766 | */ |
767 | if (time_after(jiffies, info->tstamp + msecs_to_jiffies(PAC1934_MIN_POLLING_TIME_MS))) { |
768 | ret = pac1934_reg_snapshot(info, do_refresh: true, PAC1934_REFRESH_REG_ADDR, |
769 | wait_time); |
770 | |
771 | /* |
772 | * Re-schedule the work for the read registers on timeout |
773 | * (to prevent chip registers saturation) |
774 | */ |
775 | mod_delayed_work(wq: system_wq, dwork: &info->work_chip_rfsh, |
776 | delay: msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS)); |
777 | } |
778 | |
779 | return ret; |
780 | } |
781 | |
782 | static int pac1934_read_raw(struct iio_dev *indio_dev, |
783 | struct iio_chan_spec const *chan, int *val, |
784 | int *val2, long mask) |
785 | { |
786 | struct pac1934_chip_info *info = iio_priv(indio_dev); |
787 | s64 curr_energy; |
788 | int ret, channel = chan->channel - 1; |
789 | |
790 | ret = pac1934_retrieve_data(info, PAC1934_MIN_UPDATE_WAIT_TIME_US); |
791 | if (ret < 0) |
792 | return ret; |
793 | |
794 | switch (mask) { |
795 | case IIO_CHAN_INFO_RAW: |
796 | switch (chan->type) { |
797 | case IIO_VOLTAGE: |
798 | *val = info->chip_reg_data.vbus[channel]; |
799 | return IIO_VAL_INT; |
800 | case IIO_CURRENT: |
801 | *val = info->chip_reg_data.vsense[channel]; |
802 | return IIO_VAL_INT; |
803 | case IIO_POWER: |
804 | *val = info->chip_reg_data.vpower[channel]; |
805 | return IIO_VAL_INT; |
806 | case IIO_ENERGY: |
807 | curr_energy = info->chip_reg_data.energy_sec_acc[channel]; |
808 | *val = (u32)curr_energy; |
809 | *val2 = (u32)(curr_energy >> 32); |
810 | return IIO_VAL_INT_64; |
811 | default: |
812 | return -EINVAL; |
813 | } |
814 | case IIO_CHAN_INFO_AVERAGE_RAW: |
815 | switch (chan->type) { |
816 | case IIO_VOLTAGE: |
817 | *val = info->chip_reg_data.vbus_avg[channel]; |
818 | return IIO_VAL_INT; |
819 | case IIO_CURRENT: |
820 | *val = info->chip_reg_data.vsense_avg[channel]; |
821 | return IIO_VAL_INT; |
822 | default: |
823 | return -EINVAL; |
824 | } |
825 | case IIO_CHAN_INFO_SCALE: |
826 | switch (chan->address) { |
827 | /* Voltages - scale for millivolts */ |
828 | case PAC1934_VBUS_1_ADDR: |
829 | case PAC1934_VBUS_2_ADDR: |
830 | case PAC1934_VBUS_3_ADDR: |
831 | case PAC1934_VBUS_4_ADDR: |
832 | case PAC1934_VBUS_AVG_1_ADDR: |
833 | case PAC1934_VBUS_AVG_2_ADDR: |
834 | case PAC1934_VBUS_AVG_3_ADDR: |
835 | case PAC1934_VBUS_AVG_4_ADDR: |
836 | *val = PAC1934_VOLTAGE_MILLIVOLTS_MAX; |
837 | if (chan->scan_type.sign == 'u') |
838 | *val2 = PAC1934_VOLTAGE_U_RES; |
839 | else |
840 | *val2 = PAC1934_VOLTAGE_S_RES; |
841 | return IIO_VAL_FRACTIONAL_LOG2; |
842 | /* |
843 | * Currents - scale for mA - depends on the |
844 | * channel's shunt value |
845 | * (100mV * 1000000) / (2^16 * shunt(uohm)) |
846 | */ |
847 | case PAC1934_VSENSE_1_ADDR: |
848 | case PAC1934_VSENSE_2_ADDR: |
849 | case PAC1934_VSENSE_3_ADDR: |
850 | case PAC1934_VSENSE_4_ADDR: |
851 | case PAC1934_VSENSE_AVG_1_ADDR: |
852 | case PAC1934_VSENSE_AVG_2_ADDR: |
853 | case PAC1934_VSENSE_AVG_3_ADDR: |
854 | case PAC1934_VSENSE_AVG_4_ADDR: |
855 | *val = PAC1934_MAX_VSENSE_RSHIFTED_BY_16B; |
856 | if (chan->scan_type.sign == 'u') |
857 | *val2 = info->shunts[channel]; |
858 | else |
859 | *val2 = info->shunts[channel] >> 1; |
860 | return IIO_VAL_FRACTIONAL; |
861 | /* |
862 | * Power - uW - it will use the combined scale |
863 | * for current and voltage |
864 | * current(mA) * voltage(mV) = power (uW) |
865 | */ |
866 | case PAC1934_VPOWER_1_ADDR: |
867 | case PAC1934_VPOWER_2_ADDR: |
868 | case PAC1934_VPOWER_3_ADDR: |
869 | case PAC1934_VPOWER_4_ADDR: |
870 | *val = PAC1934_MAX_VPOWER_RSHIFTED_BY_28B; |
871 | if (chan->scan_type.sign == 'u') |
872 | *val2 = info->shunts[channel]; |
873 | else |
874 | *val2 = info->shunts[channel] >> 1; |
875 | return IIO_VAL_FRACTIONAL; |
876 | case PAC1934_VPOWER_ACC_1_ADDR: |
877 | case PAC1934_VPOWER_ACC_2_ADDR: |
878 | case PAC1934_VPOWER_ACC_3_ADDR: |
879 | case PAC1934_VPOWER_ACC_4_ADDR: |
880 | /* |
881 | * expresses the 32 bit scale value here compute |
882 | * the scale for energy (miliWatt-second or miliJoule) |
883 | */ |
884 | *val = PAC1934_SCALE_CONSTANT; |
885 | |
886 | if (chan->scan_type.sign == 'u') |
887 | *val2 = info->shunts[channel]; |
888 | else |
889 | *val2 = info->shunts[channel] >> 1; |
890 | return IIO_VAL_FRACTIONAL; |
891 | default: |
892 | return -EINVAL; |
893 | } |
894 | case IIO_CHAN_INFO_SAMP_FREQ: |
895 | *val = info->sample_rate_value; |
896 | return IIO_VAL_INT; |
897 | case IIO_CHAN_INFO_ENABLE: |
898 | *val = info->enable_energy[channel]; |
899 | return IIO_VAL_INT; |
900 | default: |
901 | return -EINVAL; |
902 | } |
903 | } |
904 | |
905 | static int pac1934_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, |
906 | int val, int val2, long mask) |
907 | { |
908 | struct pac1934_chip_info *info = iio_priv(indio_dev); |
909 | struct i2c_client *client = info->client; |
910 | int ret = -EINVAL; |
911 | s32 old_samp_rate; |
912 | u8 ctrl_reg; |
913 | |
914 | switch (mask) { |
915 | case IIO_CHAN_INFO_SAMP_FREQ: |
916 | ret = pac1934_get_samp_rate_idx(info, new_samp_rate: val); |
917 | if (ret < 0) |
918 | return ret; |
919 | |
920 | /* write the new sampling value and trigger a snapshot(incl refresh) */ |
921 | scoped_guard(mutex, &info->lock) { |
922 | ctrl_reg = FIELD_PREP(PAC1934_CRTL_SAMPLE_RATE_MASK, ret); |
923 | ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_REG_ADDR, value: ctrl_reg); |
924 | if (ret) { |
925 | dev_err(&client->dev, |
926 | "%s - can't update sample rate\n" , |
927 | __func__); |
928 | return ret; |
929 | } |
930 | } |
931 | |
932 | old_samp_rate = info->sample_rate_value; |
933 | info->sample_rate_value = val; |
934 | |
935 | /* |
936 | * now, force a snapshot with refresh - call retrieve |
937 | * data in order to update the refresh timer |
938 | * alter the timestamp in order to force trigger a |
939 | * register snapshot and a timestamp update |
940 | */ |
941 | info->tstamp -= msecs_to_jiffies(PAC1934_MIN_POLLING_TIME_MS); |
942 | ret = pac1934_retrieve_data(info, wait_time: (1024 / old_samp_rate) * 1000); |
943 | if (ret < 0) { |
944 | dev_err(&client->dev, |
945 | "%s - cannot snapshot ctrl and measurement regs\n" , |
946 | __func__); |
947 | return ret; |
948 | } |
949 | |
950 | return 0; |
951 | case IIO_CHAN_INFO_ENABLE: |
952 | scoped_guard(mutex, &info->lock) { |
953 | info->enable_energy[chan->channel - 1] = val ? true : false; |
954 | if (!val) |
955 | info->chip_reg_data.energy_sec_acc[chan->channel - 1] = 0; |
956 | } |
957 | |
958 | return 0; |
959 | default: |
960 | return -EINVAL; |
961 | } |
962 | } |
963 | |
964 | static int pac1934_read_label(struct iio_dev *indio_dev, |
965 | struct iio_chan_spec const *chan, char *label) |
966 | { |
967 | struct pac1934_chip_info *info = iio_priv(indio_dev); |
968 | |
969 | switch (chan->address) { |
970 | case PAC1934_VBUS_1_ADDR: |
971 | case PAC1934_VBUS_2_ADDR: |
972 | case PAC1934_VBUS_3_ADDR: |
973 | case PAC1934_VBUS_4_ADDR: |
974 | return sysfs_emit(buf: label, fmt: "%s_VBUS_%d\n" , |
975 | info->labels[chan->scan_index], |
976 | chan->scan_index + 1); |
977 | case PAC1934_VBUS_AVG_1_ADDR: |
978 | case PAC1934_VBUS_AVG_2_ADDR: |
979 | case PAC1934_VBUS_AVG_3_ADDR: |
980 | case PAC1934_VBUS_AVG_4_ADDR: |
981 | return sysfs_emit(buf: label, fmt: "%s_VBUS_AVG_%d\n" , |
982 | info->labels[chan->scan_index], |
983 | chan->scan_index + 1); |
984 | case PAC1934_VSENSE_1_ADDR: |
985 | case PAC1934_VSENSE_2_ADDR: |
986 | case PAC1934_VSENSE_3_ADDR: |
987 | case PAC1934_VSENSE_4_ADDR: |
988 | return sysfs_emit(buf: label, fmt: "%s_IBUS_%d\n" , |
989 | info->labels[chan->scan_index], |
990 | chan->scan_index + 1); |
991 | case PAC1934_VSENSE_AVG_1_ADDR: |
992 | case PAC1934_VSENSE_AVG_2_ADDR: |
993 | case PAC1934_VSENSE_AVG_3_ADDR: |
994 | case PAC1934_VSENSE_AVG_4_ADDR: |
995 | return sysfs_emit(buf: label, fmt: "%s_IBUS_AVG_%d\n" , |
996 | info->labels[chan->scan_index], |
997 | chan->scan_index + 1); |
998 | case PAC1934_VPOWER_1_ADDR: |
999 | case PAC1934_VPOWER_2_ADDR: |
1000 | case PAC1934_VPOWER_3_ADDR: |
1001 | case PAC1934_VPOWER_4_ADDR: |
1002 | return sysfs_emit(buf: label, fmt: "%s_POWER_%d\n" , |
1003 | info->labels[chan->scan_index], |
1004 | chan->scan_index + 1); |
1005 | case PAC1934_VPOWER_ACC_1_ADDR: |
1006 | case PAC1934_VPOWER_ACC_2_ADDR: |
1007 | case PAC1934_VPOWER_ACC_3_ADDR: |
1008 | case PAC1934_VPOWER_ACC_4_ADDR: |
1009 | return sysfs_emit(buf: label, fmt: "%s_ENERGY_%d\n" , |
1010 | info->labels[chan->scan_index], |
1011 | chan->scan_index + 1); |
1012 | } |
1013 | |
1014 | return 0; |
1015 | } |
1016 | |
1017 | static void pac1934_work_periodic_rfsh(struct work_struct *work) |
1018 | { |
1019 | struct pac1934_chip_info *info = TO_PAC1934_CHIP_INFO((struct delayed_work *)work); |
1020 | struct device *dev = &info->client->dev; |
1021 | |
1022 | dev_dbg(dev, "%s - Periodic refresh\n" , __func__); |
1023 | |
1024 | /* do a REFRESH, then read */ |
1025 | pac1934_reg_snapshot(info, do_refresh: true, PAC1934_REFRESH_REG_ADDR, |
1026 | PAC1934_MIN_UPDATE_WAIT_TIME_US); |
1027 | |
1028 | schedule_delayed_work(dwork: &info->work_chip_rfsh, |
1029 | delay: msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS)); |
1030 | } |
1031 | |
1032 | static int pac1934_read_revision(struct pac1934_chip_info *info, u8 *buf) |
1033 | { |
1034 | int ret; |
1035 | struct i2c_client *client = info->client; |
1036 | |
1037 | ret = i2c_smbus_read_i2c_block_data(client, PAC1934_PID_REG_ADDR, |
1038 | PAC1934_ID_REG_LEN, |
1039 | values: buf); |
1040 | if (ret < 0) { |
1041 | dev_err(&client->dev, "cannot read revision\n" ); |
1042 | return ret; |
1043 | } |
1044 | |
1045 | return 0; |
1046 | } |
1047 | |
1048 | static int pac1934_chip_identify(struct pac1934_chip_info *info) |
1049 | { |
1050 | u8 rev_info[PAC1934_ID_REG_LEN]; |
1051 | struct device *dev = &info->client->dev; |
1052 | int ret = 0; |
1053 | |
1054 | ret = pac1934_read_revision(info, buf: (u8 *)rev_info); |
1055 | if (ret) |
1056 | return ret; |
1057 | |
1058 | info->chip_variant = rev_info[PAC1934_PID_IDX]; |
1059 | info->chip_revision = rev_info[PAC1934_RID_IDX]; |
1060 | |
1061 | dev_dbg(dev, "Chip variant: 0x%02X\n" , info->chip_variant); |
1062 | dev_dbg(dev, "Chip revision: 0x%02X\n" , info->chip_revision); |
1063 | |
1064 | switch (info->chip_variant) { |
1065 | case PAC1934_PID: |
1066 | return PAC1934; |
1067 | case PAC1933_PID: |
1068 | return PAC1933; |
1069 | case PAC1932_PID: |
1070 | return PAC1932; |
1071 | case PAC1931_PID: |
1072 | return PAC1931; |
1073 | default: |
1074 | return -EINVAL; |
1075 | } |
1076 | } |
1077 | |
1078 | /* |
1079 | * documentation related to the ACPI device definition |
1080 | * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ApplicationNotes/ApplicationNotes/PAC1934-Integration-Notes-for-Microsoft-Windows-10-and-Windows-11-Driver-Support-DS00002534.pdf |
1081 | */ |
1082 | static bool pac1934_acpi_parse_channel_config(struct i2c_client *client, |
1083 | struct pac1934_chip_info *info) |
1084 | { |
1085 | acpi_handle handle; |
1086 | union acpi_object *rez; |
1087 | struct device *dev = &client->dev; |
1088 | unsigned short bi_dir_mask; |
1089 | int idx, i; |
1090 | guid_t guid; |
1091 | |
1092 | handle = ACPI_HANDLE(dev); |
1093 | |
1094 | guid_parse(PAC1934_DSM_UUID, u: &guid); |
1095 | |
1096 | rez = acpi_evaluate_dsm(handle, guid: &guid, rev: 0, PAC1934_ACPI_GET_NAMES_AND_MOHMS_VALS, NULL); |
1097 | if (!rez) |
1098 | return false; |
1099 | |
1100 | for (i = 0; i < rez->package.count; i += 2) { |
1101 | idx = i / 2; |
1102 | info->labels[idx] = |
1103 | devm_kmemdup(dev, src: rez->package.elements[i].string.pointer, |
1104 | len: (size_t)rez->package.elements[i].string.length + 1, |
1105 | GFP_KERNEL); |
1106 | info->labels[idx][rez->package.elements[i].string.length] = '\0'; |
1107 | info->shunts[idx] = rez->package.elements[i + 1].integer.value * 1000; |
1108 | info->active_channels[idx] = (info->shunts[idx] != 0); |
1109 | } |
1110 | |
1111 | ACPI_FREE(rez); |
1112 | |
1113 | rez = acpi_evaluate_dsm(handle, guid: &guid, rev: 1, PAC1934_ACPI_GET_UOHMS_VALS, NULL); |
1114 | if (!rez) { |
1115 | /* |
1116 | * initializing with default values |
1117 | * we assume all channels are unidirectional(the mask is zero) |
1118 | * and assign the default sampling rate |
1119 | */ |
1120 | info->sample_rate_value = PAC1934_DEFAULT_CHIP_SAMP_SPEED_HZ; |
1121 | return true; |
1122 | } |
1123 | |
1124 | for (i = 0; i < rez->package.count; i++) { |
1125 | idx = i; |
1126 | info->shunts[idx] = rez->package.elements[i].integer.value; |
1127 | info->active_channels[idx] = (info->shunts[idx] != 0); |
1128 | } |
1129 | |
1130 | ACPI_FREE(rez); |
1131 | |
1132 | rez = acpi_evaluate_dsm(handle, guid: &guid, rev: 1, PAC1934_ACPI_GET_BIPOLAR_SETTINGS, NULL); |
1133 | if (!rez) |
1134 | return false; |
1135 | |
1136 | bi_dir_mask = rez->package.elements[0].integer.value; |
1137 | info->bi_dir[0] = ((bi_dir_mask & (1 << 3)) | (bi_dir_mask & (1 << 7))) != 0; |
1138 | info->bi_dir[1] = ((bi_dir_mask & (1 << 2)) | (bi_dir_mask & (1 << 6))) != 0; |
1139 | info->bi_dir[2] = ((bi_dir_mask & (1 << 1)) | (bi_dir_mask & (1 << 5))) != 0; |
1140 | info->bi_dir[3] = ((bi_dir_mask & (1 << 0)) | (bi_dir_mask & (1 << 4))) != 0; |
1141 | |
1142 | ACPI_FREE(rez); |
1143 | |
1144 | rez = acpi_evaluate_dsm(handle, guid: &guid, rev: 1, PAC1934_ACPI_GET_SAMP, NULL); |
1145 | if (!rez) |
1146 | return false; |
1147 | |
1148 | info->sample_rate_value = rez->package.elements[0].integer.value; |
1149 | |
1150 | ACPI_FREE(rez); |
1151 | |
1152 | return true; |
1153 | } |
1154 | |
1155 | static bool pac1934_of_parse_channel_config(struct i2c_client *client, |
1156 | struct pac1934_chip_info *info) |
1157 | { |
1158 | struct fwnode_handle *node, *fwnode; |
1159 | struct device *dev = &client->dev; |
1160 | unsigned int current_channel; |
1161 | int idx, ret; |
1162 | |
1163 | info->sample_rate_value = 1024; |
1164 | current_channel = 1; |
1165 | |
1166 | fwnode = dev_fwnode(dev); |
1167 | fwnode_for_each_available_child_node(fwnode, node) { |
1168 | ret = fwnode_property_read_u32(fwnode: node, propname: "reg" , val: &idx); |
1169 | if (ret) { |
1170 | dev_err_probe(dev, err: ret, |
1171 | fmt: "reading invalid channel index\n" ); |
1172 | goto err_fwnode; |
1173 | } |
1174 | /* adjust idx to match channel index (1 to 4) from the datasheet */ |
1175 | idx--; |
1176 | |
1177 | if (current_channel >= (info->phys_channels + 1) || |
1178 | idx >= info->phys_channels || idx < 0) { |
1179 | dev_err_probe(dev, err: -EINVAL, |
1180 | fmt: "%s: invalid channel_index %d value\n" , |
1181 | fwnode_get_name(fwnode: node), idx); |
1182 | goto err_fwnode; |
1183 | } |
1184 | |
1185 | /* enable channel */ |
1186 | info->active_channels[idx] = true; |
1187 | |
1188 | ret = fwnode_property_read_u32(fwnode: node, propname: "shunt-resistor-micro-ohms" , |
1189 | val: &info->shunts[idx]); |
1190 | if (ret) { |
1191 | dev_err_probe(dev, err: ret, |
1192 | fmt: "%s: invalid shunt-resistor value: %d\n" , |
1193 | fwnode_get_name(fwnode: node), info->shunts[idx]); |
1194 | goto err_fwnode; |
1195 | } |
1196 | |
1197 | if (fwnode_property_present(fwnode: node, propname: "label" )) { |
1198 | ret = fwnode_property_read_string(fwnode: node, propname: "label" , |
1199 | val: (const char **)&info->labels[idx]); |
1200 | if (ret) { |
1201 | dev_err_probe(dev, err: ret, |
1202 | fmt: "%s: invalid rail-name value\n" , |
1203 | fwnode_get_name(fwnode: node)); |
1204 | goto err_fwnode; |
1205 | } |
1206 | } |
1207 | |
1208 | info->bi_dir[idx] = fwnode_property_read_bool(fwnode: node, propname: "bipolar" ); |
1209 | |
1210 | current_channel++; |
1211 | } |
1212 | |
1213 | return true; |
1214 | |
1215 | err_fwnode: |
1216 | fwnode_handle_put(fwnode: node); |
1217 | |
1218 | return false; |
1219 | } |
1220 | |
1221 | static void pac1934_cancel_delayed_work(void *dwork) |
1222 | { |
1223 | cancel_delayed_work_sync(dwork); |
1224 | } |
1225 | |
1226 | static int pac1934_chip_configure(struct pac1934_chip_info *info) |
1227 | { |
1228 | int cnt, ret; |
1229 | struct i2c_client *client = info->client; |
1230 | u8 regs[PAC1934_CTRL_STATUS_INFO_LEN], idx, ctrl_reg; |
1231 | u32 wait_time; |
1232 | |
1233 | info->chip_reg_data.num_enabled_channels = 0; |
1234 | for (cnt = 0; cnt < info->phys_channels; cnt++) { |
1235 | if (info->active_channels[cnt]) |
1236 | info->chip_reg_data.num_enabled_channels++; |
1237 | } |
1238 | |
1239 | /* |
1240 | * read whatever information was gathered before the driver was loaded |
1241 | * establish which channels are enabled/disabled and then establish the |
1242 | * information retrieval mode (using SKIP or no). |
1243 | * Read the chip ID values |
1244 | */ |
1245 | ret = i2c_smbus_read_i2c_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR, |
1246 | ARRAY_SIZE(regs), |
1247 | values: (u8 *)regs); |
1248 | if (ret < 0) { |
1249 | dev_err_probe(dev: &client->dev, err: ret, |
1250 | fmt: "%s - cannot read regs from 0x%02X\n" , |
1251 | __func__, PAC1934_CTRL_STAT_REGS_ADDR); |
1252 | return ret; |
1253 | } |
1254 | |
1255 | /* write the CHANNEL_DIS and the NEG_PWR registers */ |
1256 | regs[PAC1934_CHANNEL_DIS_REG_OFF] = |
1257 | FIELD_PREP(PAC1934_CHAN_DIS_CH1_OFF_MASK, info->active_channels[0] ? 0 : 1) | |
1258 | FIELD_PREP(PAC1934_CHAN_DIS_CH2_OFF_MASK, info->active_channels[1] ? 0 : 1) | |
1259 | FIELD_PREP(PAC1934_CHAN_DIS_CH3_OFF_MASK, info->active_channels[2] ? 0 : 1) | |
1260 | FIELD_PREP(PAC1934_CHAN_DIS_CH4_OFF_MASK, info->active_channels[3] ? 0 : 1) | |
1261 | FIELD_PREP(PAC1934_SMBUS_TIMEOUT_MASK, 0) | |
1262 | FIELD_PREP(PAC1934_SMBUS_BYTECOUNT_MASK, 0) | |
1263 | FIELD_PREP(PAC1934_SMBUS_NO_SKIP_MASK, 0); |
1264 | |
1265 | regs[PAC1934_NEG_PWR_REG_OFF] = |
1266 | FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDI_MASK, info->bi_dir[0]) | |
1267 | FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDI_MASK, info->bi_dir[1]) | |
1268 | FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDI_MASK, info->bi_dir[2]) | |
1269 | FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDI_MASK, info->bi_dir[3]) | |
1270 | FIELD_PREP(PAC1934_NEG_PWR_CH1_BIDV_MASK, info->bi_dir[0]) | |
1271 | FIELD_PREP(PAC1934_NEG_PWR_CH2_BIDV_MASK, info->bi_dir[1]) | |
1272 | FIELD_PREP(PAC1934_NEG_PWR_CH3_BIDV_MASK, info->bi_dir[2]) | |
1273 | FIELD_PREP(PAC1934_NEG_PWR_CH4_BIDV_MASK, info->bi_dir[3]); |
1274 | |
1275 | /* no SLOW triggered REFRESH, clear POR */ |
1276 | regs[PAC1934_SLOW_REG_OFF] = 0; |
1277 | |
1278 | ret = i2c_smbus_write_block_data(client, PAC1934_CTRL_STAT_REGS_ADDR, |
1279 | ARRAY_SIZE(regs), values: (u8 *)regs); |
1280 | if (ret) |
1281 | return ret; |
1282 | |
1283 | /* Default sampling rate */ |
1284 | ctrl_reg = FIELD_PREP(PAC1934_CRTL_SAMPLE_RATE_MASK, PAC1934_SAMP_1024SPS); |
1285 | |
1286 | ret = i2c_smbus_write_byte_data(client, PAC1934_CTRL_REG_ADDR, value: ctrl_reg); |
1287 | if (ret) |
1288 | return ret; |
1289 | |
1290 | /* |
1291 | * send a REFRESH to the chip, so the new settings take place |
1292 | * as well as resetting the accumulators |
1293 | */ |
1294 | ret = i2c_smbus_write_byte(client, PAC1934_REFRESH_REG_ADDR); |
1295 | if (ret) { |
1296 | dev_err(&client->dev, |
1297 | "%s - cannot send 0x%02X\n" , |
1298 | __func__, PAC1934_REFRESH_REG_ADDR); |
1299 | return ret; |
1300 | } |
1301 | |
1302 | /* |
1303 | * get the current(in the chip) sampling speed and compute the |
1304 | * required timeout based on its value |
1305 | * the timeout is 1/sampling_speed |
1306 | */ |
1307 | idx = regs[PAC1934_CTRL_ACT_REG_OFF] >> PAC1934_SAMPLE_RATE_SHIFT; |
1308 | wait_time = (1024 / samp_rate_map_tbl[idx]) * 1000; |
1309 | |
1310 | /* |
1311 | * wait the maximum amount of time to be on the safe side |
1312 | * the maximum wait time is for 8sps |
1313 | */ |
1314 | usleep_range(min: wait_time, max: wait_time + 100); |
1315 | |
1316 | INIT_DELAYED_WORK(&info->work_chip_rfsh, pac1934_work_periodic_rfsh); |
1317 | /* Setup the latest moment for reading the regs before saturation */ |
1318 | schedule_delayed_work(dwork: &info->work_chip_rfsh, |
1319 | delay: msecs_to_jiffies(PAC1934_MAX_RFSH_LIMIT_MS)); |
1320 | |
1321 | return devm_add_action_or_reset(&client->dev, pac1934_cancel_delayed_work, |
1322 | &info->work_chip_rfsh); |
1323 | } |
1324 | |
1325 | static int pac1934_prep_iio_channels(struct pac1934_chip_info *info, struct iio_dev *indio_dev) |
1326 | { |
1327 | struct iio_chan_spec *ch_sp; |
1328 | int channel_size, attribute_count, cnt; |
1329 | void *dyn_ch_struct, *tmp_data; |
1330 | struct device *dev = &info->client->dev; |
1331 | |
1332 | /* find out dynamically how many IIO channels we need */ |
1333 | attribute_count = 0; |
1334 | channel_size = 0; |
1335 | for (cnt = 0; cnt < info->phys_channels; cnt++) { |
1336 | if (!info->active_channels[cnt]) |
1337 | continue; |
1338 | |
1339 | /* add the size of the properties of one chip physical channel */ |
1340 | channel_size += sizeof(pac1934_single_channel); |
1341 | /* count how many enabled channels we have */ |
1342 | attribute_count += ARRAY_SIZE(pac1934_single_channel); |
1343 | dev_dbg(dev, ":%s: Channel %d active\n" , __func__, cnt + 1); |
1344 | } |
1345 | |
1346 | dyn_ch_struct = devm_kzalloc(dev, size: channel_size, GFP_KERNEL); |
1347 | if (!dyn_ch_struct) |
1348 | return -EINVAL; |
1349 | |
1350 | tmp_data = dyn_ch_struct; |
1351 | |
1352 | /* populate the dynamic channels and make all the adjustments */ |
1353 | for (cnt = 0; cnt < info->phys_channels; cnt++) { |
1354 | if (!info->active_channels[cnt]) |
1355 | continue; |
1356 | |
1357 | memcpy(tmp_data, pac1934_single_channel, sizeof(pac1934_single_channel)); |
1358 | ch_sp = (struct iio_chan_spec *)tmp_data; |
1359 | ch_sp[PAC1934_CH_ENERGY].channel = cnt + 1; |
1360 | ch_sp[PAC1934_CH_ENERGY].scan_index = cnt; |
1361 | ch_sp[PAC1934_CH_ENERGY].address = cnt + PAC1934_VPOWER_ACC_1_ADDR; |
1362 | ch_sp[PAC1934_CH_POWER].channel = cnt + 1; |
1363 | ch_sp[PAC1934_CH_POWER].scan_index = cnt; |
1364 | ch_sp[PAC1934_CH_POWER].address = cnt + PAC1934_VPOWER_1_ADDR; |
1365 | ch_sp[PAC1934_CH_VOLTAGE].channel = cnt + 1; |
1366 | ch_sp[PAC1934_CH_VOLTAGE].scan_index = cnt; |
1367 | ch_sp[PAC1934_CH_VOLTAGE].address = cnt + PAC1934_VBUS_1_ADDR; |
1368 | ch_sp[PAC1934_CH_CURRENT].channel = cnt + 1; |
1369 | ch_sp[PAC1934_CH_CURRENT].scan_index = cnt; |
1370 | ch_sp[PAC1934_CH_CURRENT].address = cnt + PAC1934_VSENSE_1_ADDR; |
1371 | |
1372 | /* |
1373 | * In order to be able to use labels for PAC1934_CH_VOLTAGE, and |
1374 | * PAC1934_CH_VOLTAGE_AVERAGE,respectively PAC1934_CH_CURRENT |
1375 | * and PAC1934_CH_CURRENT_AVERAGE we need to use different |
1376 | * channel numbers. We will add +5 (+1 to maximum PAC channels). |
1377 | */ |
1378 | ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].channel = cnt + 5; |
1379 | ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_index = cnt; |
1380 | ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].address = cnt + PAC1934_VBUS_AVG_1_ADDR; |
1381 | ch_sp[PAC1934_CH_CURRENT_AVERAGE].channel = cnt + 5; |
1382 | ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_index = cnt; |
1383 | ch_sp[PAC1934_CH_CURRENT_AVERAGE].address = cnt + PAC1934_VSENSE_AVG_1_ADDR; |
1384 | |
1385 | /* |
1386 | * now modify the parameters in all channels if the |
1387 | * whole chip rail(channel) is bi-directional |
1388 | */ |
1389 | if (info->bi_dir[cnt]) { |
1390 | ch_sp[PAC1934_CH_ENERGY].scan_type.sign = 's'; |
1391 | ch_sp[PAC1934_CH_ENERGY].scan_type.realbits = 47; |
1392 | ch_sp[PAC1934_CH_POWER].scan_type.sign = 's'; |
1393 | ch_sp[PAC1934_CH_POWER].scan_type.realbits = 27; |
1394 | ch_sp[PAC1934_CH_VOLTAGE].scan_type.sign = 's'; |
1395 | ch_sp[PAC1934_CH_VOLTAGE].scan_type.realbits = 15; |
1396 | ch_sp[PAC1934_CH_CURRENT].scan_type.sign = 's'; |
1397 | ch_sp[PAC1934_CH_CURRENT].scan_type.realbits = 15; |
1398 | ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_type.sign = 's'; |
1399 | ch_sp[PAC1934_CH_VOLTAGE_AVERAGE].scan_type.realbits = 15; |
1400 | ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_type.sign = 's'; |
1401 | ch_sp[PAC1934_CH_CURRENT_AVERAGE].scan_type.realbits = 15; |
1402 | } |
1403 | tmp_data += sizeof(pac1934_single_channel); |
1404 | } |
1405 | |
1406 | /* |
1407 | * send the updated dynamic channel structure information towards IIO |
1408 | * prepare the required field for IIO class registration |
1409 | */ |
1410 | indio_dev->num_channels = attribute_count; |
1411 | indio_dev->channels = (const struct iio_chan_spec *)dyn_ch_struct; |
1412 | |
1413 | return 0; |
1414 | } |
1415 | |
1416 | static IIO_DEVICE_ATTR(in_shunt_resistor1, 0644, |
1417 | pac1934_shunt_value_show, pac1934_shunt_value_store, 0); |
1418 | static IIO_DEVICE_ATTR(in_shunt_resistor2, 0644, |
1419 | pac1934_shunt_value_show, pac1934_shunt_value_store, 1); |
1420 | static IIO_DEVICE_ATTR(in_shunt_resistor3, 0644, |
1421 | pac1934_shunt_value_show, pac1934_shunt_value_store, 2); |
1422 | static IIO_DEVICE_ATTR(in_shunt_resistor4, 0644, |
1423 | pac1934_shunt_value_show, pac1934_shunt_value_store, 3); |
1424 | |
1425 | static int pac1934_prep_custom_attributes(struct pac1934_chip_info *info, |
1426 | struct iio_dev *indio_dev) |
1427 | { |
1428 | int i, active_channels_count = 0; |
1429 | struct attribute **pac1934_custom_attr; |
1430 | struct attribute_group *pac1934_group; |
1431 | struct device *dev = &info->client->dev; |
1432 | |
1433 | for (i = 0 ; i < info->phys_channels; i++) |
1434 | if (info->active_channels[i]) |
1435 | active_channels_count++; |
1436 | |
1437 | pac1934_group = devm_kzalloc(dev, size: sizeof(*pac1934_group), GFP_KERNEL); |
1438 | if (!pac1934_group) |
1439 | return -ENOMEM; |
1440 | |
1441 | pac1934_custom_attr = devm_kzalloc(dev, |
1442 | size: (PAC1934_CUSTOM_ATTR_FOR_CHANNEL * |
1443 | active_channels_count) |
1444 | * sizeof(*pac1934_group) + 1, |
1445 | GFP_KERNEL); |
1446 | if (!pac1934_custom_attr) |
1447 | return -ENOMEM; |
1448 | |
1449 | i = 0; |
1450 | if (info->active_channels[0]) |
1451 | pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor1); |
1452 | |
1453 | if (info->active_channels[1]) |
1454 | pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor2); |
1455 | |
1456 | if (info->active_channels[2]) |
1457 | pac1934_custom_attr[i++] = PAC1934_DEV_ATTR(in_shunt_resistor3); |
1458 | |
1459 | if (info->active_channels[3]) |
1460 | pac1934_custom_attr[i] = PAC1934_DEV_ATTR(in_shunt_resistor4); |
1461 | |
1462 | pac1934_group->attrs = pac1934_custom_attr; |
1463 | info->iio_info.attrs = pac1934_group; |
1464 | |
1465 | return 0; |
1466 | } |
1467 | |
1468 | static void pac1934_mutex_destroy(void *data) |
1469 | { |
1470 | struct mutex *lock = data; |
1471 | |
1472 | mutex_destroy(lock); |
1473 | } |
1474 | |
1475 | static const struct iio_info pac1934_info = { |
1476 | .read_raw = pac1934_read_raw, |
1477 | .write_raw = pac1934_write_raw, |
1478 | .read_avail = pac1934_read_avail, |
1479 | .read_label = pac1934_read_label, |
1480 | }; |
1481 | |
1482 | static int pac1934_probe(struct i2c_client *client) |
1483 | { |
1484 | struct pac1934_chip_info *info; |
1485 | const struct pac1934_features *chip; |
1486 | struct iio_dev *indio_dev; |
1487 | int cnt, ret; |
1488 | bool match = false; |
1489 | struct device *dev = &client->dev; |
1490 | |
1491 | indio_dev = devm_iio_device_alloc(parent: dev, sizeof_priv: sizeof(*info)); |
1492 | if (!indio_dev) |
1493 | return -ENOMEM; |
1494 | |
1495 | info = iio_priv(indio_dev); |
1496 | |
1497 | info->client = client; |
1498 | |
1499 | /* always start with energy accumulation enabled */ |
1500 | for (cnt = 0; cnt < PAC1934_MAX_NUM_CHANNELS; cnt++) |
1501 | info->enable_energy[cnt] = true; |
1502 | |
1503 | ret = pac1934_chip_identify(info); |
1504 | if (ret < 0) { |
1505 | /* |
1506 | * If failed to identify the hardware based on internal |
1507 | * registers, try using fallback compatible in device tree |
1508 | * to deal with some newer part number. |
1509 | */ |
1510 | chip = i2c_get_match_data(client); |
1511 | if (!chip) |
1512 | return -EINVAL; |
1513 | |
1514 | info->phys_channels = chip->phys_channels; |
1515 | indio_dev->name = chip->name; |
1516 | } else { |
1517 | info->phys_channels = pac1934_chip_config[ret].phys_channels; |
1518 | indio_dev->name = pac1934_chip_config[ret].name; |
1519 | } |
1520 | |
1521 | if (acpi_match_device(ids: dev->driver->acpi_match_table, dev)) |
1522 | match = pac1934_acpi_parse_channel_config(client, info); |
1523 | else |
1524 | /* |
1525 | * This makes it possible to use also ACPI PRP0001 for |
1526 | * registering the device using device tree properties. |
1527 | */ |
1528 | match = pac1934_of_parse_channel_config(client, info); |
1529 | |
1530 | if (!match) |
1531 | return dev_err_probe(dev, err: -EINVAL, |
1532 | fmt: "parameter parsing returned an error\n" ); |
1533 | |
1534 | mutex_init(&info->lock); |
1535 | ret = devm_add_action_or_reset(dev, pac1934_mutex_destroy, |
1536 | &info->lock); |
1537 | if (ret < 0) |
1538 | return ret; |
1539 | |
1540 | /* |
1541 | * do now any chip specific initialization (e.g. read/write |
1542 | * some registers), enable/disable certain channels, change the sampling |
1543 | * rate to the requested value |
1544 | */ |
1545 | ret = pac1934_chip_configure(info); |
1546 | if (ret < 0) |
1547 | return ret; |
1548 | |
1549 | /* prepare the channel information */ |
1550 | ret = pac1934_prep_iio_channels(info, indio_dev); |
1551 | if (ret < 0) |
1552 | return ret; |
1553 | |
1554 | info->iio_info = pac1934_info; |
1555 | indio_dev->info = &info->iio_info; |
1556 | indio_dev->modes = INDIO_DIRECT_MODE; |
1557 | |
1558 | ret = pac1934_prep_custom_attributes(info, indio_dev); |
1559 | if (ret < 0) |
1560 | return dev_err_probe(dev, err: ret, |
1561 | fmt: "Can't configure custom attributes for PAC1934 device\n" ); |
1562 | |
1563 | /* |
1564 | * read whatever has been accumulated in the chip so far |
1565 | * and reset the accumulators |
1566 | */ |
1567 | ret = pac1934_reg_snapshot(info, do_refresh: true, PAC1934_REFRESH_REG_ADDR, |
1568 | PAC1934_MIN_UPDATE_WAIT_TIME_US); |
1569 | if (ret < 0) |
1570 | return ret; |
1571 | |
1572 | ret = devm_iio_device_register(dev, indio_dev); |
1573 | if (ret < 0) |
1574 | return dev_err_probe(dev, err: ret, |
1575 | fmt: "Can't register IIO device\n" ); |
1576 | |
1577 | return 0; |
1578 | } |
1579 | |
1580 | static const struct i2c_device_id pac1934_id[] = { |
1581 | { .name = "pac1931" , .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1931] }, |
1582 | { .name = "pac1932" , .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1932] }, |
1583 | { .name = "pac1933" , .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1933] }, |
1584 | { .name = "pac1934" , .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1934] }, |
1585 | {} |
1586 | }; |
1587 | MODULE_DEVICE_TABLE(i2c, pac1934_id); |
1588 | |
1589 | static const struct of_device_id pac1934_of_match[] = { |
1590 | { |
1591 | .compatible = "microchip,pac1931" , |
1592 | .data = &pac1934_chip_config[PAC1931] |
1593 | }, |
1594 | { |
1595 | .compatible = "microchip,pac1932" , |
1596 | .data = &pac1934_chip_config[PAC1932] |
1597 | }, |
1598 | { |
1599 | .compatible = "microchip,pac1933" , |
1600 | .data = &pac1934_chip_config[PAC1933] |
1601 | }, |
1602 | { |
1603 | .compatible = "microchip,pac1934" , |
1604 | .data = &pac1934_chip_config[PAC1934] |
1605 | }, |
1606 | {} |
1607 | }; |
1608 | MODULE_DEVICE_TABLE(of, pac1934_of_match); |
1609 | |
1610 | /* |
1611 | * using MCHP1930 to be compatible with BIOS ACPI. See example: |
1612 | * https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ApplicationNotes/ApplicationNotes/PAC1934-Integration-Notes-for-Microsoft-Windows-10-and-Windows-11-Driver-Support-DS00002534.pdf |
1613 | */ |
1614 | static const struct acpi_device_id pac1934_acpi_match[] = { |
1615 | { "MCHP1930" , .driver_data = (kernel_ulong_t)&pac1934_chip_config[PAC1934] }, |
1616 | {} |
1617 | }; |
1618 | MODULE_DEVICE_TABLE(acpi, pac1934_acpi_match); |
1619 | |
1620 | static struct i2c_driver pac1934_driver = { |
1621 | .driver = { |
1622 | .name = "pac1934" , |
1623 | .of_match_table = pac1934_of_match, |
1624 | .acpi_match_table = pac1934_acpi_match |
1625 | }, |
1626 | .probe = pac1934_probe, |
1627 | .id_table = pac1934_id, |
1628 | }; |
1629 | |
1630 | module_i2c_driver(pac1934_driver); |
1631 | |
1632 | MODULE_AUTHOR("Bogdan Bolocan <bogdan.bolocan@microchip.com>" ); |
1633 | MODULE_AUTHOR("Victor Tudose" ); |
1634 | MODULE_AUTHOR("Marius Cristea <marius.cristea@microchip.com>" ); |
1635 | MODULE_DESCRIPTION("IIO driver for PAC1934 Multi-Channel DC Power/Energy Monitor" ); |
1636 | MODULE_LICENSE("GPL" ); |
1637 | |