1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* |
3 | * Copyright (C) 2014 Angelo Compagnucci <angelo.compagnucci@gmail.com> |
4 | * |
5 | * Driver for Texas Instruments' ADC128S052, ADC122S021 and ADC124S021 ADC chip. |
6 | * Datasheets can be found here: |
7 | * https://www.ti.com/lit/ds/symlink/adc128s052.pdf |
8 | * https://www.ti.com/lit/ds/symlink/adc122s021.pdf |
9 | * https://www.ti.com/lit/ds/symlink/adc124s021.pdf |
10 | */ |
11 | |
12 | #include <linux/cleanup.h> |
13 | #include <linux/err.h> |
14 | #include <linux/iio/iio.h> |
15 | #include <linux/mod_devicetable.h> |
16 | #include <linux/module.h> |
17 | #include <linux/property.h> |
18 | #include <linux/regulator/consumer.h> |
19 | #include <linux/spi/spi.h> |
20 | |
21 | struct adc128_configuration { |
22 | const struct iio_chan_spec *channels; |
23 | u8 num_channels; |
24 | const char *refname; |
25 | int num_other_regulators; |
26 | const char * const (*other_regulators)[]; |
27 | }; |
28 | |
29 | struct adc128 { |
30 | struct spi_device *spi; |
31 | |
32 | /* |
33 | * Serialize the SPI 'write-channel + read data' accesses and protect |
34 | * the shared buffer. |
35 | */ |
36 | struct mutex lock; |
37 | int vref_mv; |
38 | union { |
39 | __be16 buffer16; |
40 | u8 buffer[2]; |
41 | } __aligned(IIO_DMA_MINALIGN); |
42 | }; |
43 | |
44 | static int adc128_adc_conversion(struct adc128 *adc, u8 channel) |
45 | { |
46 | int ret; |
47 | |
48 | guard(mutex)(T: &adc->lock); |
49 | |
50 | adc->buffer[0] = channel << 3; |
51 | adc->buffer[1] = 0; |
52 | |
53 | ret = spi_write(spi: adc->spi, buf: &adc->buffer, len: sizeof(adc->buffer)); |
54 | if (ret < 0) |
55 | return ret; |
56 | |
57 | ret = spi_read(spi: adc->spi, buf: &adc->buffer16, len: sizeof(adc->buffer16)); |
58 | if (ret < 0) |
59 | return ret; |
60 | |
61 | return be16_to_cpu(adc->buffer16) & 0xFFF; |
62 | } |
63 | |
64 | static int adc128_read_raw(struct iio_dev *indio_dev, |
65 | struct iio_chan_spec const *channel, int *val, |
66 | int *val2, long mask) |
67 | { |
68 | struct adc128 *adc = iio_priv(indio_dev); |
69 | int ret; |
70 | |
71 | switch (mask) { |
72 | case IIO_CHAN_INFO_RAW: |
73 | |
74 | ret = adc128_adc_conversion(adc, channel: channel->channel); |
75 | if (ret < 0) |
76 | return ret; |
77 | |
78 | *val = ret; |
79 | return IIO_VAL_INT; |
80 | |
81 | case IIO_CHAN_INFO_SCALE: |
82 | |
83 | *val = adc->vref_mv; |
84 | *val2 = 12; |
85 | return IIO_VAL_FRACTIONAL_LOG2; |
86 | |
87 | default: |
88 | return -EINVAL; |
89 | } |
90 | |
91 | } |
92 | |
93 | #define ADC128_VOLTAGE_CHANNEL(num) \ |
94 | { \ |
95 | .type = IIO_VOLTAGE, \ |
96 | .indexed = 1, \ |
97 | .channel = (num), \ |
98 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ |
99 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ |
100 | } |
101 | |
102 | static const struct iio_chan_spec adc128s052_channels[] = { |
103 | ADC128_VOLTAGE_CHANNEL(0), |
104 | ADC128_VOLTAGE_CHANNEL(1), |
105 | ADC128_VOLTAGE_CHANNEL(2), |
106 | ADC128_VOLTAGE_CHANNEL(3), |
107 | ADC128_VOLTAGE_CHANNEL(4), |
108 | ADC128_VOLTAGE_CHANNEL(5), |
109 | ADC128_VOLTAGE_CHANNEL(6), |
110 | ADC128_VOLTAGE_CHANNEL(7), |
111 | }; |
112 | |
113 | static const struct iio_chan_spec adc122s021_channels[] = { |
114 | ADC128_VOLTAGE_CHANNEL(0), |
115 | ADC128_VOLTAGE_CHANNEL(1), |
116 | }; |
117 | |
118 | static const struct iio_chan_spec adc124s021_channels[] = { |
119 | ADC128_VOLTAGE_CHANNEL(0), |
120 | ADC128_VOLTAGE_CHANNEL(1), |
121 | ADC128_VOLTAGE_CHANNEL(2), |
122 | ADC128_VOLTAGE_CHANNEL(3), |
123 | }; |
124 | |
125 | static const char * const bd79104_regulators[] = { "iovdd" }; |
126 | |
127 | static const struct adc128_configuration adc128_config[] = { |
128 | { |
129 | .channels = adc128s052_channels, |
130 | .num_channels = ARRAY_SIZE(adc128s052_channels), |
131 | .refname = "vref" , |
132 | }, { |
133 | .channels = adc122s021_channels, |
134 | .num_channels = ARRAY_SIZE(adc122s021_channels), |
135 | .refname = "vref" , |
136 | }, { |
137 | .channels = adc124s021_channels, |
138 | .num_channels = ARRAY_SIZE(adc124s021_channels), |
139 | .refname = "vref" , |
140 | }, { |
141 | .channels = adc128s052_channels, |
142 | .num_channels = ARRAY_SIZE(adc128s052_channels), |
143 | .refname = "vdd" , |
144 | .other_regulators = &bd79104_regulators, |
145 | .num_other_regulators = 1, |
146 | }, |
147 | }; |
148 | |
149 | static const struct iio_info adc128_info = { |
150 | .read_raw = adc128_read_raw, |
151 | }; |
152 | |
153 | static int adc128_probe(struct spi_device *spi) |
154 | { |
155 | const struct adc128_configuration *config; |
156 | struct iio_dev *indio_dev; |
157 | struct adc128 *adc; |
158 | int ret; |
159 | |
160 | indio_dev = devm_iio_device_alloc(parent: &spi->dev, sizeof_priv: sizeof(*adc)); |
161 | if (!indio_dev) |
162 | return -ENOMEM; |
163 | |
164 | adc = iio_priv(indio_dev); |
165 | adc->spi = spi; |
166 | |
167 | indio_dev->name = spi_get_device_id(sdev: spi)->name; |
168 | indio_dev->modes = INDIO_DIRECT_MODE; |
169 | indio_dev->info = &adc128_info; |
170 | |
171 | config = spi_get_device_match_data(sdev: spi); |
172 | |
173 | indio_dev->channels = config->channels; |
174 | indio_dev->num_channels = config->num_channels; |
175 | |
176 | ret = devm_regulator_get_enable_read_voltage(dev: &spi->dev, |
177 | id: config->refname); |
178 | if (ret < 0) |
179 | return dev_err_probe(dev: &spi->dev, err: ret, |
180 | fmt: "failed to read '%s' voltage" , |
181 | config->refname); |
182 | |
183 | adc->vref_mv = ret / 1000; |
184 | |
185 | if (config->num_other_regulators) { |
186 | ret = devm_regulator_bulk_get_enable(dev: &spi->dev, |
187 | num_consumers: config->num_other_regulators, |
188 | id: *config->other_regulators); |
189 | if (ret) |
190 | return dev_err_probe(dev: &spi->dev, err: ret, |
191 | fmt: "Failed to enable regulators\n" ); |
192 | } |
193 | |
194 | ret = devm_mutex_init(&spi->dev, &adc->lock); |
195 | if (ret) |
196 | return ret; |
197 | |
198 | return devm_iio_device_register(&spi->dev, indio_dev); |
199 | } |
200 | |
201 | static const struct of_device_id adc128_of_match[] = { |
202 | { .compatible = "ti,adc128s052" , .data = &adc128_config[0] }, |
203 | { .compatible = "ti,adc122s021" , .data = &adc128_config[1] }, |
204 | { .compatible = "ti,adc122s051" , .data = &adc128_config[1] }, |
205 | { .compatible = "ti,adc122s101" , .data = &adc128_config[1] }, |
206 | { .compatible = "ti,adc124s021" , .data = &adc128_config[2] }, |
207 | { .compatible = "ti,adc124s051" , .data = &adc128_config[2] }, |
208 | { .compatible = "ti,adc124s101" , .data = &adc128_config[2] }, |
209 | { .compatible = "rohm,bd79104" , .data = &adc128_config[3] }, |
210 | { } |
211 | }; |
212 | MODULE_DEVICE_TABLE(of, adc128_of_match); |
213 | |
214 | static const struct spi_device_id adc128_id[] = { |
215 | { "adc128s052" , (kernel_ulong_t)&adc128_config[0] }, |
216 | { "adc122s021" , (kernel_ulong_t)&adc128_config[1] }, |
217 | { "adc122s051" , (kernel_ulong_t)&adc128_config[1] }, |
218 | { "adc122s101" , (kernel_ulong_t)&adc128_config[1] }, |
219 | { "adc124s021" , (kernel_ulong_t)&adc128_config[2] }, |
220 | { "adc124s051" , (kernel_ulong_t)&adc128_config[2] }, |
221 | { "adc124s101" , (kernel_ulong_t)&adc128_config[2] }, |
222 | { "bd79104" , (kernel_ulong_t)&adc128_config[3] }, |
223 | { } |
224 | }; |
225 | MODULE_DEVICE_TABLE(spi, adc128_id); |
226 | |
227 | static const struct acpi_device_id adc128_acpi_match[] = { |
228 | { "AANT1280" , (kernel_ulong_t)&adc128_config[2] }, |
229 | { } |
230 | }; |
231 | MODULE_DEVICE_TABLE(acpi, adc128_acpi_match); |
232 | |
233 | static struct spi_driver adc128_driver = { |
234 | .driver = { |
235 | .name = "adc128s052" , |
236 | .of_match_table = adc128_of_match, |
237 | .acpi_match_table = adc128_acpi_match, |
238 | }, |
239 | .probe = adc128_probe, |
240 | .id_table = adc128_id, |
241 | }; |
242 | module_spi_driver(adc128_driver); |
243 | |
244 | MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>" ); |
245 | MODULE_DESCRIPTION("Texas Instruments ADC128S052" ); |
246 | MODULE_LICENSE("GPL v2" ); |
247 | |