1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * AD5721, AD5721R, AD5761, AD5761R, Voltage Output Digital to Analog Converter
4 *
5 * Copyright 2016 Qtechnology A/S
6 * 2016 Ricardo Ribalda <ribalda@kernel.org>
7 */
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/spi/spi.h>
11#include <linux/bitops.h>
12#include <linux/iio/iio.h>
13#include <linux/iio/sysfs.h>
14#include <linux/regulator/consumer.h>
15#include <linux/platform_data/ad5761.h>
16
17#define AD5761_ADDR(addr) ((addr & 0xf) << 16)
18#define AD5761_ADDR_NOOP 0x0
19#define AD5761_ADDR_DAC_WRITE 0x3
20#define AD5761_ADDR_CTRL_WRITE_REG 0x4
21#define AD5761_ADDR_SW_DATA_RESET 0x7
22#define AD5761_ADDR_DAC_READ 0xb
23#define AD5761_ADDR_CTRL_READ_REG 0xc
24#define AD5761_ADDR_SW_FULL_RESET 0xf
25
26#define AD5761_CTRL_USE_INTVREF BIT(5)
27#define AD5761_CTRL_ETS BIT(6)
28
29/**
30 * struct ad5761_chip_info - chip specific information
31 * @int_vref: Value of the internal reference voltage in mV - 0 if external
32 * reference voltage is used
33 * @channel: channel specification
34*/
35
36struct ad5761_chip_info {
37 unsigned long int_vref;
38 const struct iio_chan_spec channel;
39};
40
41struct ad5761_range_params {
42 int m;
43 int c;
44};
45
46enum ad5761_supported_device_ids {
47 ID_AD5721,
48 ID_AD5721R,
49 ID_AD5761,
50 ID_AD5761R,
51};
52
53/**
54 * struct ad5761_state - driver instance specific data
55 * @spi: spi_device
56 * @use_intref: true when the internal voltage reference is used
57 * @vref: actual voltage reference in mVolts
58 * @range: output range mode used
59 * @lock: lock to protect the data buffer during SPI ops
60 * @data: cache aligned spi buffer
61 */
62struct ad5761_state {
63 struct spi_device *spi;
64 struct mutex lock;
65
66 bool use_intref;
67 int vref;
68 enum ad5761_voltage_range range;
69
70 /*
71 * DMA (thus cache coherency maintenance) may require the
72 * transfer buffers to live in their own cache lines.
73 */
74 union {
75 __be32 d32;
76 u8 d8[4];
77 } data[3] __aligned(IIO_DMA_MINALIGN);
78};
79
80static const struct ad5761_range_params ad5761_range_params[] = {
81 [AD5761_VOLTAGE_RANGE_M10V_10V] = {
82 .m = 80,
83 .c = 40,
84 },
85 [AD5761_VOLTAGE_RANGE_0V_10V] = {
86 .m = 40,
87 .c = 0,
88 },
89 [AD5761_VOLTAGE_RANGE_M5V_5V] = {
90 .m = 40,
91 .c = 20,
92 },
93 [AD5761_VOLTAGE_RANGE_0V_5V] = {
94 .m = 20,
95 .c = 0,
96 },
97 [AD5761_VOLTAGE_RANGE_M2V5_7V5] = {
98 .m = 40,
99 .c = 10,
100 },
101 [AD5761_VOLTAGE_RANGE_M3V_3V] = {
102 .m = 24,
103 .c = 12,
104 },
105 [AD5761_VOLTAGE_RANGE_0V_16V] = {
106 .m = 64,
107 .c = 0,
108 },
109 [AD5761_VOLTAGE_RANGE_0V_20V] = {
110 .m = 80,
111 .c = 0,
112 },
113};
114
115static int _ad5761_spi_write(struct ad5761_state *st, u8 addr, u16 val)
116{
117 st->data[0].d32 = cpu_to_be32(AD5761_ADDR(addr) | val);
118
119 return spi_write(spi: st->spi, buf: &st->data[0].d8[1], len: 3);
120}
121
122static int ad5761_spi_write(struct iio_dev *indio_dev, u8 addr, u16 val)
123{
124 struct ad5761_state *st = iio_priv(indio_dev);
125 int ret;
126
127 mutex_lock(&st->lock);
128 ret = _ad5761_spi_write(st, addr, val);
129 mutex_unlock(lock: &st->lock);
130
131 return ret;
132}
133
134static int _ad5761_spi_read(struct ad5761_state *st, u8 addr, u16 *val)
135{
136 int ret;
137 struct spi_transfer xfers[] = {
138 {
139 .tx_buf = &st->data[0].d8[1],
140 .len = 3,
141 .cs_change = true,
142 }, {
143 .tx_buf = &st->data[1].d8[1],
144 .rx_buf = &st->data[2].d8[1],
145 .len = 3,
146 },
147 };
148
149 st->data[0].d32 = cpu_to_be32(AD5761_ADDR(addr));
150 st->data[1].d32 = cpu_to_be32(AD5761_ADDR(AD5761_ADDR_NOOP));
151
152 ret = spi_sync_transfer(spi: st->spi, xfers, ARRAY_SIZE(xfers));
153
154 *val = be32_to_cpu(st->data[2].d32);
155
156 return ret;
157}
158
159static int ad5761_spi_read(struct iio_dev *indio_dev, u8 addr, u16 *val)
160{
161 struct ad5761_state *st = iio_priv(indio_dev);
162 int ret;
163
164 mutex_lock(&st->lock);
165 ret = _ad5761_spi_read(st, addr, val);
166 mutex_unlock(lock: &st->lock);
167
168 return ret;
169}
170
171static int ad5761_spi_set_range(struct ad5761_state *st,
172 enum ad5761_voltage_range range)
173{
174 u16 aux;
175 int ret;
176
177 aux = (range & 0x7) | AD5761_CTRL_ETS;
178
179 if (st->use_intref)
180 aux |= AD5761_CTRL_USE_INTVREF;
181
182 ret = _ad5761_spi_write(st, AD5761_ADDR_SW_FULL_RESET, val: 0);
183 if (ret)
184 return ret;
185
186 ret = _ad5761_spi_write(st, AD5761_ADDR_CTRL_WRITE_REG, val: aux);
187 if (ret)
188 return ret;
189
190 st->range = range;
191
192 return 0;
193}
194
195static int ad5761_read_raw(struct iio_dev *indio_dev,
196 struct iio_chan_spec const *chan,
197 int *val,
198 int *val2,
199 long mask)
200{
201 struct ad5761_state *st;
202 int ret;
203 u16 aux;
204
205 switch (mask) {
206 case IIO_CHAN_INFO_RAW:
207 ret = ad5761_spi_read(indio_dev, AD5761_ADDR_DAC_READ, val: &aux);
208 if (ret)
209 return ret;
210 *val = aux >> chan->scan_type.shift;
211 return IIO_VAL_INT;
212 case IIO_CHAN_INFO_SCALE:
213 st = iio_priv(indio_dev);
214 *val = st->vref * ad5761_range_params[st->range].m;
215 *val /= 10;
216 *val2 = chan->scan_type.realbits;
217 return IIO_VAL_FRACTIONAL_LOG2;
218 case IIO_CHAN_INFO_OFFSET:
219 st = iio_priv(indio_dev);
220 *val = -(1 << chan->scan_type.realbits);
221 *val *= ad5761_range_params[st->range].c;
222 *val /= ad5761_range_params[st->range].m;
223 return IIO_VAL_INT;
224 default:
225 return -EINVAL;
226 }
227}
228
229static int ad5761_write_raw(struct iio_dev *indio_dev,
230 struct iio_chan_spec const *chan,
231 int val,
232 int val2,
233 long mask)
234{
235 u16 aux;
236
237 if (mask != IIO_CHAN_INFO_RAW)
238 return -EINVAL;
239
240 if (val2 || (val << chan->scan_type.shift) > 0xffff || val < 0)
241 return -EINVAL;
242
243 aux = val << chan->scan_type.shift;
244
245 return ad5761_spi_write(indio_dev, AD5761_ADDR_DAC_WRITE, val: aux);
246}
247
248static const struct iio_info ad5761_info = {
249 .read_raw = &ad5761_read_raw,
250 .write_raw = &ad5761_write_raw,
251};
252
253#define AD5761_CHAN(_bits) { \
254 .type = IIO_VOLTAGE, \
255 .output = 1, \
256 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
257 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
258 BIT(IIO_CHAN_INFO_OFFSET), \
259 .scan_type = { \
260 .sign = 'u', \
261 .realbits = (_bits), \
262 .storagebits = 16, \
263 .shift = 16 - (_bits), \
264 }, \
265}
266
267static const struct ad5761_chip_info ad5761_chip_infos[] = {
268 [ID_AD5721] = {
269 .int_vref = 0,
270 .channel = AD5761_CHAN(12),
271 },
272 [ID_AD5721R] = {
273 .int_vref = 2500,
274 .channel = AD5761_CHAN(12),
275 },
276 [ID_AD5761] = {
277 .int_vref = 0,
278 .channel = AD5761_CHAN(16),
279 },
280 [ID_AD5761R] = {
281 .int_vref = 2500,
282 .channel = AD5761_CHAN(16),
283 },
284};
285
286static int ad5761_probe(struct spi_device *spi)
287{
288 struct iio_dev *iio_dev;
289 struct ad5761_state *st;
290 int ret;
291 const struct ad5761_chip_info *chip_info =
292 &ad5761_chip_infos[spi_get_device_id(sdev: spi)->driver_data];
293 enum ad5761_voltage_range voltage_range = AD5761_VOLTAGE_RANGE_0V_5V;
294 struct ad5761_platform_data *pdata = dev_get_platdata(dev: &spi->dev);
295
296 iio_dev = devm_iio_device_alloc(parent: &spi->dev, sizeof_priv: sizeof(*st));
297 if (!iio_dev)
298 return -ENOMEM;
299
300 st = iio_priv(indio_dev: iio_dev);
301
302 st->spi = spi;
303
304 ret = devm_regulator_get_enable_read_voltage(dev: &spi->dev, id: "vref");
305 if (ret < 0 && ret != -ENODEV)
306 return dev_err_probe(dev: &spi->dev, err: ret,
307 fmt: "Failed to get voltage reference value\n");
308 if (ret == -ENODEV) {
309 /* Use Internal regulator */
310 if (!chip_info->int_vref)
311 return dev_err_probe(dev: &spi->dev, err: -EIO,
312 fmt: "Voltage reference not found\n");
313
314 st->use_intref = true;
315 st->vref = chip_info->int_vref;
316 } else {
317 if (ret < 2000000 || ret > 3000000)
318 return dev_err_probe(dev: &spi->dev, err: -EIO,
319 fmt: "Invalid external voltage ref. value %d uV\n",
320 ret);
321
322 st->use_intref = false;
323 st->vref = ret / 1000;
324 }
325
326 if (pdata)
327 voltage_range = pdata->voltage_range;
328
329 mutex_init(&st->lock);
330
331 ret = ad5761_spi_set_range(st, range: voltage_range);
332 if (ret)
333 return ret;
334
335 iio_dev->info = &ad5761_info;
336 iio_dev->modes = INDIO_DIRECT_MODE;
337 iio_dev->channels = &chip_info->channel;
338 iio_dev->num_channels = 1;
339 iio_dev->name = spi_get_device_id(sdev: st->spi)->name;
340
341 return devm_iio_device_register(&spi->dev, iio_dev);
342}
343
344static const struct spi_device_id ad5761_id[] = {
345 {"ad5721", ID_AD5721},
346 {"ad5721r", ID_AD5721R},
347 {"ad5761", ID_AD5761},
348 {"ad5761r", ID_AD5761R},
349 { }
350};
351MODULE_DEVICE_TABLE(spi, ad5761_id);
352
353static struct spi_driver ad5761_driver = {
354 .driver = {
355 .name = "ad5761",
356 },
357 .probe = ad5761_probe,
358 .id_table = ad5761_id,
359};
360module_spi_driver(ad5761_driver);
361
362MODULE_AUTHOR("Ricardo Ribalda <ribalda@kernel.org>");
363MODULE_DESCRIPTION("Analog Devices AD5721, AD5721R, AD5761, AD5761R driver");
364MODULE_LICENSE("GPL v2");
365

source code of linux/drivers/iio/dac/ad5761.c