1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * AFE4403 Heart Rate Monitors and Low-Cost Pulse Oximeters
4 *
5 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
6 * Andrew F. Davis <afd@ti.com>
7 */
8
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/interrupt.h>
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/regmap.h>
15#include <linux/spi/spi.h>
16#include <linux/sysfs.h>
17#include <linux/regulator/consumer.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21#include <linux/iio/buffer.h>
22#include <linux/iio/trigger.h>
23#include <linux/iio/triggered_buffer.h>
24#include <linux/iio/trigger_consumer.h>
25
26#include <asm/unaligned.h>
27
28#include "afe440x.h"
29
30#define AFE4403_DRIVER_NAME "afe4403"
31
32/* AFE4403 Registers */
33#define AFE4403_TIAGAIN 0x20
34#define AFE4403_TIA_AMB_GAIN 0x21
35
36enum afe4403_fields {
37 /* Gains */
38 F_RF_LED1, F_CF_LED1,
39 F_RF_LED, F_CF_LED,
40
41 /* LED Current */
42 F_ILED1, F_ILED2,
43
44 /* sentinel */
45 F_MAX_FIELDS
46};
47
48static const struct reg_field afe4403_reg_fields[] = {
49 /* Gains */
50 [F_RF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 0, 2),
51 [F_CF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 3, 7),
52 [F_RF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 0, 2),
53 [F_CF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 3, 7),
54 /* LED Current */
55 [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 7),
56 [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 8, 15),
57};
58
59/**
60 * struct afe4403_data - AFE4403 device instance data
61 * @dev: Device structure
62 * @spi: SPI device handle
63 * @regmap: Register map of the device
64 * @fields: Register fields of the device
65 * @regulator: Pointer to the regulator for the IC
66 * @trig: IIO trigger for this device
67 * @irq: ADC_RDY line interrupt number
68 * @buffer: Used to construct data layout to push into IIO buffer.
69 */
70struct afe4403_data {
71 struct device *dev;
72 struct spi_device *spi;
73 struct regmap *regmap;
74 struct regmap_field *fields[F_MAX_FIELDS];
75 struct regulator *regulator;
76 struct iio_trigger *trig;
77 int irq;
78 /* Ensure suitable alignment for timestamp */
79 s32 buffer[8] __aligned(8);
80};
81
82enum afe4403_chan_id {
83 LED2 = 1,
84 ALED2,
85 LED1,
86 ALED1,
87 LED2_ALED2,
88 LED1_ALED1,
89};
90
91static const unsigned int afe4403_channel_values[] = {
92 [LED2] = AFE440X_LED2VAL,
93 [ALED2] = AFE440X_ALED2VAL,
94 [LED1] = AFE440X_LED1VAL,
95 [ALED1] = AFE440X_ALED1VAL,
96 [LED2_ALED2] = AFE440X_LED2_ALED2VAL,
97 [LED1_ALED1] = AFE440X_LED1_ALED1VAL,
98};
99
100static const unsigned int afe4403_channel_leds[] = {
101 [LED2] = F_ILED2,
102 [LED1] = F_ILED1,
103};
104
105static const struct iio_chan_spec afe4403_channels[] = {
106 /* ADC values */
107 AFE440X_INTENSITY_CHAN(LED2, 0),
108 AFE440X_INTENSITY_CHAN(ALED2, 0),
109 AFE440X_INTENSITY_CHAN(LED1, 0),
110 AFE440X_INTENSITY_CHAN(ALED1, 0),
111 AFE440X_INTENSITY_CHAN(LED2_ALED2, 0),
112 AFE440X_INTENSITY_CHAN(LED1_ALED1, 0),
113 /* LED current */
114 AFE440X_CURRENT_CHAN(LED2),
115 AFE440X_CURRENT_CHAN(LED1),
116};
117
118static const struct afe440x_val_table afe4403_res_table[] = {
119 { 500000 }, { 250000 }, { 100000 }, { 50000 },
120 { 25000 }, { 10000 }, { 1000000 }, { 0 },
121};
122AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4403_res_table);
123
124static const struct afe440x_val_table afe4403_cap_table[] = {
125 { 0, 5000 }, { 0, 10000 }, { 0, 20000 }, { 0, 25000 },
126 { 0, 30000 }, { 0, 35000 }, { 0, 45000 }, { 0, 50000 },
127 { 0, 55000 }, { 0, 60000 }, { 0, 70000 }, { 0, 75000 },
128 { 0, 80000 }, { 0, 85000 }, { 0, 95000 }, { 0, 100000 },
129 { 0, 155000 }, { 0, 160000 }, { 0, 170000 }, { 0, 175000 },
130 { 0, 180000 }, { 0, 185000 }, { 0, 195000 }, { 0, 200000 },
131 { 0, 205000 }, { 0, 210000 }, { 0, 220000 }, { 0, 225000 },
132 { 0, 230000 }, { 0, 235000 }, { 0, 245000 }, { 0, 250000 },
133};
134AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4403_cap_table);
135
136static ssize_t afe440x_show_register(struct device *dev,
137 struct device_attribute *attr,
138 char *buf)
139{
140 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
141 struct afe4403_data *afe = iio_priv(indio_dev);
142 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
143 unsigned int reg_val;
144 int vals[2];
145 int ret;
146
147 ret = regmap_field_read(field: afe->fields[afe440x_attr->field], val: &reg_val);
148 if (ret)
149 return ret;
150
151 if (reg_val >= afe440x_attr->table_size)
152 return -EINVAL;
153
154 vals[0] = afe440x_attr->val_table[reg_val].integer;
155 vals[1] = afe440x_attr->val_table[reg_val].fract;
156
157 return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, size: 2, vals);
158}
159
160static ssize_t afe440x_store_register(struct device *dev,
161 struct device_attribute *attr,
162 const char *buf, size_t count)
163{
164 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
165 struct afe4403_data *afe = iio_priv(indio_dev);
166 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
167 int val, integer, fract, ret;
168
169 ret = iio_str_to_fixpoint(str: buf, fract_mult: 100000, integer: &integer, fract: &fract);
170 if (ret)
171 return ret;
172
173 for (val = 0; val < afe440x_attr->table_size; val++)
174 if (afe440x_attr->val_table[val].integer == integer &&
175 afe440x_attr->val_table[val].fract == fract)
176 break;
177 if (val == afe440x_attr->table_size)
178 return -EINVAL;
179
180 ret = regmap_field_write(field: afe->fields[afe440x_attr->field], val);
181 if (ret)
182 return ret;
183
184 return count;
185}
186
187static AFE440X_ATTR(in_intensity1_resistance, F_RF_LED, afe4403_res_table);
188static AFE440X_ATTR(in_intensity1_capacitance, F_CF_LED, afe4403_cap_table);
189
190static AFE440X_ATTR(in_intensity2_resistance, F_RF_LED, afe4403_res_table);
191static AFE440X_ATTR(in_intensity2_capacitance, F_CF_LED, afe4403_cap_table);
192
193static AFE440X_ATTR(in_intensity3_resistance, F_RF_LED1, afe4403_res_table);
194static AFE440X_ATTR(in_intensity3_capacitance, F_CF_LED1, afe4403_cap_table);
195
196static AFE440X_ATTR(in_intensity4_resistance, F_RF_LED1, afe4403_res_table);
197static AFE440X_ATTR(in_intensity4_capacitance, F_CF_LED1, afe4403_cap_table);
198
199static struct attribute *afe440x_attributes[] = {
200 &dev_attr_in_intensity_resistance_available.attr,
201 &dev_attr_in_intensity_capacitance_available.attr,
202 &afe440x_attr_in_intensity1_resistance.dev_attr.attr,
203 &afe440x_attr_in_intensity1_capacitance.dev_attr.attr,
204 &afe440x_attr_in_intensity2_resistance.dev_attr.attr,
205 &afe440x_attr_in_intensity2_capacitance.dev_attr.attr,
206 &afe440x_attr_in_intensity3_resistance.dev_attr.attr,
207 &afe440x_attr_in_intensity3_capacitance.dev_attr.attr,
208 &afe440x_attr_in_intensity4_resistance.dev_attr.attr,
209 &afe440x_attr_in_intensity4_capacitance.dev_attr.attr,
210 NULL
211};
212
213static const struct attribute_group afe440x_attribute_group = {
214 .attrs = afe440x_attributes
215};
216
217static int afe4403_read(struct afe4403_data *afe, unsigned int reg, u32 *val)
218{
219 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
220 u8 rx[3];
221 int ret;
222
223 /* Enable reading from the device */
224 ret = spi_write_then_read(spi: afe->spi, txbuf: tx, n_tx: 4, NULL, n_rx: 0);
225 if (ret)
226 return ret;
227
228 ret = spi_write_then_read(spi: afe->spi, txbuf: &reg, n_tx: 1, rxbuf: rx, n_rx: sizeof(rx));
229 if (ret)
230 return ret;
231
232 *val = get_unaligned_be24(p: &rx[0]);
233
234 /* Disable reading from the device */
235 tx[3] = AFE440X_CONTROL0_WRITE;
236 ret = spi_write_then_read(spi: afe->spi, txbuf: tx, n_tx: 4, NULL, n_rx: 0);
237 if (ret)
238 return ret;
239
240 return 0;
241}
242
243static int afe4403_read_raw(struct iio_dev *indio_dev,
244 struct iio_chan_spec const *chan,
245 int *val, int *val2, long mask)
246{
247 struct afe4403_data *afe = iio_priv(indio_dev);
248 unsigned int reg, field;
249 int ret;
250
251 switch (chan->type) {
252 case IIO_INTENSITY:
253 switch (mask) {
254 case IIO_CHAN_INFO_RAW:
255 reg = afe4403_channel_values[chan->address];
256 ret = afe4403_read(afe, reg, val);
257 if (ret)
258 return ret;
259 return IIO_VAL_INT;
260 }
261 break;
262 case IIO_CURRENT:
263 switch (mask) {
264 case IIO_CHAN_INFO_RAW:
265 field = afe4403_channel_leds[chan->address];
266 ret = regmap_field_read(field: afe->fields[field], val);
267 if (ret)
268 return ret;
269 return IIO_VAL_INT;
270 case IIO_CHAN_INFO_SCALE:
271 *val = 0;
272 *val2 = 800000;
273 return IIO_VAL_INT_PLUS_MICRO;
274 }
275 break;
276 default:
277 break;
278 }
279
280 return -EINVAL;
281}
282
283static int afe4403_write_raw(struct iio_dev *indio_dev,
284 struct iio_chan_spec const *chan,
285 int val, int val2, long mask)
286{
287 struct afe4403_data *afe = iio_priv(indio_dev);
288 unsigned int field = afe4403_channel_leds[chan->address];
289
290 switch (chan->type) {
291 case IIO_CURRENT:
292 switch (mask) {
293 case IIO_CHAN_INFO_RAW:
294 return regmap_field_write(field: afe->fields[field], val);
295 }
296 break;
297 default:
298 break;
299 }
300
301 return -EINVAL;
302}
303
304static const struct iio_info afe4403_iio_info = {
305 .attrs = &afe440x_attribute_group,
306 .read_raw = afe4403_read_raw,
307 .write_raw = afe4403_write_raw,
308};
309
310static irqreturn_t afe4403_trigger_handler(int irq, void *private)
311{
312 struct iio_poll_func *pf = private;
313 struct iio_dev *indio_dev = pf->indio_dev;
314 struct afe4403_data *afe = iio_priv(indio_dev);
315 int ret, bit, i = 0;
316 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
317 u8 rx[3];
318
319 /* Enable reading from the device */
320 ret = spi_write_then_read(spi: afe->spi, txbuf: tx, n_tx: 4, NULL, n_rx: 0);
321 if (ret)
322 goto err;
323
324 for_each_set_bit(bit, indio_dev->active_scan_mask,
325 indio_dev->masklength) {
326 ret = spi_write_then_read(spi: afe->spi,
327 txbuf: &afe4403_channel_values[bit], n_tx: 1,
328 rxbuf: rx, n_rx: sizeof(rx));
329 if (ret)
330 goto err;
331
332 afe->buffer[i++] = get_unaligned_be24(p: &rx[0]);
333 }
334
335 /* Disable reading from the device */
336 tx[3] = AFE440X_CONTROL0_WRITE;
337 ret = spi_write_then_read(spi: afe->spi, txbuf: tx, n_tx: 4, NULL, n_rx: 0);
338 if (ret)
339 goto err;
340
341 iio_push_to_buffers_with_timestamp(indio_dev, data: afe->buffer,
342 timestamp: pf->timestamp);
343err:
344 iio_trigger_notify_done(trig: indio_dev->trig);
345
346 return IRQ_HANDLED;
347}
348
349static void afe4403_regulator_disable(void *data)
350{
351 struct regulator *regulator = data;
352
353 regulator_disable(regulator);
354}
355
356#define AFE4403_TIMING_PAIRS \
357 { AFE440X_LED2STC, 0x000050 }, \
358 { AFE440X_LED2ENDC, 0x0003e7 }, \
359 { AFE440X_LED1LEDSTC, 0x0007d0 }, \
360 { AFE440X_LED1LEDENDC, 0x000bb7 }, \
361 { AFE440X_ALED2STC, 0x000438 }, \
362 { AFE440X_ALED2ENDC, 0x0007cf }, \
363 { AFE440X_LED1STC, 0x000820 }, \
364 { AFE440X_LED1ENDC, 0x000bb7 }, \
365 { AFE440X_LED2LEDSTC, 0x000000 }, \
366 { AFE440X_LED2LEDENDC, 0x0003e7 }, \
367 { AFE440X_ALED1STC, 0x000c08 }, \
368 { AFE440X_ALED1ENDC, 0x000f9f }, \
369 { AFE440X_LED2CONVST, 0x0003ef }, \
370 { AFE440X_LED2CONVEND, 0x0007cf }, \
371 { AFE440X_ALED2CONVST, 0x0007d7 }, \
372 { AFE440X_ALED2CONVEND, 0x000bb7 }, \
373 { AFE440X_LED1CONVST, 0x000bbf }, \
374 { AFE440X_LED1CONVEND, 0x009c3f }, \
375 { AFE440X_ALED1CONVST, 0x000fa7 }, \
376 { AFE440X_ALED1CONVEND, 0x001387 }, \
377 { AFE440X_ADCRSTSTCT0, 0x0003e8 }, \
378 { AFE440X_ADCRSTENDCT0, 0x0003eb }, \
379 { AFE440X_ADCRSTSTCT1, 0x0007d0 }, \
380 { AFE440X_ADCRSTENDCT1, 0x0007d3 }, \
381 { AFE440X_ADCRSTSTCT2, 0x000bb8 }, \
382 { AFE440X_ADCRSTENDCT2, 0x000bbb }, \
383 { AFE440X_ADCRSTSTCT3, 0x000fa0 }, \
384 { AFE440X_ADCRSTENDCT3, 0x000fa3 }, \
385 { AFE440X_PRPCOUNT, 0x009c3f }, \
386 { AFE440X_PDNCYCLESTC, 0x001518 }, \
387 { AFE440X_PDNCYCLEENDC, 0x00991f }
388
389static const struct reg_sequence afe4403_reg_sequences[] = {
390 AFE4403_TIMING_PAIRS,
391 { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN },
392 { AFE4403_TIAGAIN, AFE440X_TIAGAIN_ENSEPGAIN },
393};
394
395static const struct regmap_range afe4403_yes_ranges[] = {
396 regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL),
397};
398
399static const struct regmap_access_table afe4403_volatile_table = {
400 .yes_ranges = afe4403_yes_ranges,
401 .n_yes_ranges = ARRAY_SIZE(afe4403_yes_ranges),
402};
403
404static const struct regmap_config afe4403_regmap_config = {
405 .reg_bits = 8,
406 .val_bits = 24,
407
408 .max_register = AFE440X_PDNCYCLEENDC,
409 .cache_type = REGCACHE_RBTREE,
410 .volatile_table = &afe4403_volatile_table,
411};
412
413static const struct of_device_id afe4403_of_match[] = {
414 { .compatible = "ti,afe4403", },
415 { /* sentinel */ }
416};
417MODULE_DEVICE_TABLE(of, afe4403_of_match);
418
419static int afe4403_suspend(struct device *dev)
420{
421 struct iio_dev *indio_dev = spi_get_drvdata(spi: to_spi_device(dev));
422 struct afe4403_data *afe = iio_priv(indio_dev);
423 int ret;
424
425 ret = regmap_update_bits(map: afe->regmap, AFE440X_CONTROL2,
426 AFE440X_CONTROL2_PDN_AFE,
427 AFE440X_CONTROL2_PDN_AFE);
428 if (ret)
429 return ret;
430
431 ret = regulator_disable(regulator: afe->regulator);
432 if (ret) {
433 dev_err(dev, "Unable to disable regulator\n");
434 return ret;
435 }
436
437 return 0;
438}
439
440static int afe4403_resume(struct device *dev)
441{
442 struct iio_dev *indio_dev = spi_get_drvdata(spi: to_spi_device(dev));
443 struct afe4403_data *afe = iio_priv(indio_dev);
444 int ret;
445
446 ret = regulator_enable(regulator: afe->regulator);
447 if (ret) {
448 dev_err(dev, "Unable to enable regulator\n");
449 return ret;
450 }
451
452 ret = regmap_update_bits(map: afe->regmap, AFE440X_CONTROL2,
453 AFE440X_CONTROL2_PDN_AFE, val: 0);
454 if (ret)
455 return ret;
456
457 return 0;
458}
459
460static DEFINE_SIMPLE_DEV_PM_OPS(afe4403_pm_ops, afe4403_suspend,
461 afe4403_resume);
462
463static int afe4403_probe(struct spi_device *spi)
464{
465 struct iio_dev *indio_dev;
466 struct afe4403_data *afe;
467 int i, ret;
468
469 indio_dev = devm_iio_device_alloc(parent: &spi->dev, sizeof_priv: sizeof(*afe));
470 if (!indio_dev)
471 return -ENOMEM;
472
473 afe = iio_priv(indio_dev);
474 spi_set_drvdata(spi, data: indio_dev);
475
476 afe->dev = &spi->dev;
477 afe->spi = spi;
478 afe->irq = spi->irq;
479
480 afe->regmap = devm_regmap_init_spi(spi, &afe4403_regmap_config);
481 if (IS_ERR(ptr: afe->regmap)) {
482 dev_err(afe->dev, "Unable to allocate register map\n");
483 return PTR_ERR(ptr: afe->regmap);
484 }
485
486 for (i = 0; i < F_MAX_FIELDS; i++) {
487 afe->fields[i] = devm_regmap_field_alloc(dev: afe->dev, regmap: afe->regmap,
488 reg_field: afe4403_reg_fields[i]);
489 if (IS_ERR(ptr: afe->fields[i])) {
490 dev_err(afe->dev, "Unable to allocate regmap fields\n");
491 return PTR_ERR(ptr: afe->fields[i]);
492 }
493 }
494
495 afe->regulator = devm_regulator_get(dev: afe->dev, id: "tx_sup");
496 if (IS_ERR(ptr: afe->regulator))
497 return dev_err_probe(dev: afe->dev, err: PTR_ERR(ptr: afe->regulator),
498 fmt: "Unable to get regulator\n");
499
500 ret = regulator_enable(regulator: afe->regulator);
501 if (ret) {
502 dev_err(afe->dev, "Unable to enable regulator\n");
503 return ret;
504 }
505 ret = devm_add_action_or_reset(afe->dev, afe4403_regulator_disable, afe->regulator);
506 if (ret) {
507 dev_err(afe->dev, "Unable to add regulator disable action\n");
508 return ret;
509 }
510
511 ret = regmap_write(map: afe->regmap, AFE440X_CONTROL0,
512 AFE440X_CONTROL0_SW_RESET);
513 if (ret) {
514 dev_err(afe->dev, "Unable to reset device\n");
515 return ret;
516 }
517
518 ret = regmap_multi_reg_write(map: afe->regmap, regs: afe4403_reg_sequences,
519 ARRAY_SIZE(afe4403_reg_sequences));
520 if (ret) {
521 dev_err(afe->dev, "Unable to set register defaults\n");
522 return ret;
523 }
524
525 indio_dev->modes = INDIO_DIRECT_MODE;
526 indio_dev->channels = afe4403_channels;
527 indio_dev->num_channels = ARRAY_SIZE(afe4403_channels);
528 indio_dev->name = AFE4403_DRIVER_NAME;
529 indio_dev->info = &afe4403_iio_info;
530
531 if (afe->irq > 0) {
532 afe->trig = devm_iio_trigger_alloc(afe->dev,
533 "%s-dev%d",
534 indio_dev->name,
535 iio_device_id(indio_dev));
536 if (!afe->trig) {
537 dev_err(afe->dev, "Unable to allocate IIO trigger\n");
538 return -ENOMEM;
539 }
540
541 iio_trigger_set_drvdata(trig: afe->trig, data: indio_dev);
542
543 ret = devm_iio_trigger_register(dev: afe->dev, trig_info: afe->trig);
544 if (ret) {
545 dev_err(afe->dev, "Unable to register IIO trigger\n");
546 return ret;
547 }
548
549 ret = devm_request_threaded_irq(dev: afe->dev, irq: afe->irq,
550 handler: iio_trigger_generic_data_rdy_poll,
551 NULL, IRQF_ONESHOT,
552 AFE4403_DRIVER_NAME,
553 dev_id: afe->trig);
554 if (ret) {
555 dev_err(afe->dev, "Unable to request IRQ\n");
556 return ret;
557 }
558 }
559
560 ret = devm_iio_triggered_buffer_setup(afe->dev, indio_dev,
561 &iio_pollfunc_store_time,
562 afe4403_trigger_handler, NULL);
563 if (ret) {
564 dev_err(afe->dev, "Unable to setup buffer\n");
565 return ret;
566 }
567
568 ret = devm_iio_device_register(afe->dev, indio_dev);
569 if (ret) {
570 dev_err(afe->dev, "Unable to register IIO device\n");
571 return ret;
572 }
573
574 return 0;
575}
576
577static const struct spi_device_id afe4403_ids[] = {
578 { "afe4403", 0 },
579 { /* sentinel */ }
580};
581MODULE_DEVICE_TABLE(spi, afe4403_ids);
582
583static struct spi_driver afe4403_spi_driver = {
584 .driver = {
585 .name = AFE4403_DRIVER_NAME,
586 .of_match_table = afe4403_of_match,
587 .pm = pm_sleep_ptr(&afe4403_pm_ops),
588 },
589 .probe = afe4403_probe,
590 .id_table = afe4403_ids,
591};
592module_spi_driver(afe4403_spi_driver);
593
594MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
595MODULE_DESCRIPTION("TI AFE4403 Heart Rate Monitor and Pulse Oximeter AFE");
596MODULE_LICENSE("GPL v2");
597

source code of linux/drivers/iio/health/afe4403.c