1 | // SPDX-License-Identifier: GPL-2.0-only |
---|---|
2 | /* |
3 | * opt3001.c - Texas Instruments OPT3001 Light Sensor |
4 | * |
5 | * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com |
6 | * |
7 | * Author: Andreas Dannenberg <dannenberg@ti.com> |
8 | * Based on previous work from: Felipe Balbi <balbi@ti.com> |
9 | */ |
10 | |
11 | #include <linux/bitops.h> |
12 | #include <linux/delay.h> |
13 | #include <linux/device.h> |
14 | #include <linux/i2c.h> |
15 | #include <linux/interrupt.h> |
16 | #include <linux/irq.h> |
17 | #include <linux/kernel.h> |
18 | #include <linux/module.h> |
19 | #include <linux/mod_devicetable.h> |
20 | #include <linux/mutex.h> |
21 | #include <linux/slab.h> |
22 | #include <linux/types.h> |
23 | |
24 | #include <linux/iio/events.h> |
25 | #include <linux/iio/iio.h> |
26 | #include <linux/iio/sysfs.h> |
27 | |
28 | #define OPT3001_RESULT 0x00 |
29 | #define OPT3001_CONFIGURATION 0x01 |
30 | #define OPT3001_LOW_LIMIT 0x02 |
31 | #define OPT3001_HIGH_LIMIT 0x03 |
32 | #define OPT3001_MANUFACTURER_ID 0x7e |
33 | #define OPT3001_DEVICE_ID 0x7f |
34 | |
35 | #define OPT3001_CONFIGURATION_RN_MASK (0xf << 12) |
36 | #define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12) |
37 | |
38 | #define OPT3001_CONFIGURATION_CT BIT(11) |
39 | |
40 | #define OPT3001_CONFIGURATION_M_MASK (3 << 9) |
41 | #define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9) |
42 | #define OPT3001_CONFIGURATION_M_SINGLE (1 << 9) |
43 | #define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */ |
44 | |
45 | #define OPT3001_CONFIGURATION_OVF BIT(8) |
46 | #define OPT3001_CONFIGURATION_CRF BIT(7) |
47 | #define OPT3001_CONFIGURATION_FH BIT(6) |
48 | #define OPT3001_CONFIGURATION_FL BIT(5) |
49 | #define OPT3001_CONFIGURATION_L BIT(4) |
50 | #define OPT3001_CONFIGURATION_POL BIT(3) |
51 | #define OPT3001_CONFIGURATION_ME BIT(2) |
52 | |
53 | #define OPT3001_CONFIGURATION_FC_MASK (3 << 0) |
54 | |
55 | /* The end-of-conversion enable is located in the low-limit register */ |
56 | #define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000 |
57 | |
58 | #define OPT3001_REG_EXPONENT(n) ((n) >> 12) |
59 | #define OPT3001_REG_MANTISSA(n) ((n) & 0xfff) |
60 | |
61 | #define OPT3001_INT_TIME_LONG 800000 |
62 | #define OPT3001_INT_TIME_SHORT 100000 |
63 | |
64 | /* |
65 | * Time to wait for conversion result to be ready. The device datasheet |
66 | * sect. 6.5 states results are ready after total integration time plus 3ms. |
67 | * This results in worst-case max values of 113ms or 883ms, respectively. |
68 | * Add some slack to be on the safe side. |
69 | */ |
70 | #define OPT3001_RESULT_READY_SHORT 150 |
71 | #define OPT3001_RESULT_READY_LONG 1000 |
72 | |
73 | struct opt3001_scale { |
74 | int val; |
75 | int val2; |
76 | }; |
77 | |
78 | struct opt3001_chip_info { |
79 | const struct iio_chan_spec (*channels)[2]; |
80 | enum iio_chan_type chan_type; |
81 | int num_channels; |
82 | |
83 | const struct opt3001_scale (*scales)[12]; |
84 | /* |
85 | * Factor as specified by conversion equation in datasheet. |
86 | * eg. 0.01 (scaled to integer 10) for opt3001. |
87 | */ |
88 | int factor_whole; |
89 | /* |
90 | * Factor to compensate for potentially scaled factor_whole. |
91 | */ |
92 | int factor_integer; |
93 | /* |
94 | * Factor used to align decimal part of proccessed value to six decimal |
95 | * places. |
96 | */ |
97 | int factor_decimal; |
98 | |
99 | bool has_id; |
100 | }; |
101 | |
102 | struct opt3001 { |
103 | struct i2c_client *client; |
104 | struct device *dev; |
105 | |
106 | struct mutex lock; |
107 | bool ok_to_ignore_lock; |
108 | bool result_ready; |
109 | wait_queue_head_t result_ready_queue; |
110 | u16 result; |
111 | const struct opt3001_chip_info *chip_info; |
112 | |
113 | u32 int_time; |
114 | u32 mode; |
115 | |
116 | u16 high_thresh_mantissa; |
117 | u16 low_thresh_mantissa; |
118 | |
119 | u8 high_thresh_exp; |
120 | u8 low_thresh_exp; |
121 | |
122 | bool use_irq; |
123 | }; |
124 | |
125 | static const struct opt3001_scale opt3001_scales[] = { |
126 | { |
127 | .val = 40, |
128 | .val2 = 950000, |
129 | }, |
130 | { |
131 | .val = 81, |
132 | .val2 = 900000, |
133 | }, |
134 | { |
135 | .val = 163, |
136 | .val2 = 800000, |
137 | }, |
138 | { |
139 | .val = 327, |
140 | .val2 = 600000, |
141 | }, |
142 | { |
143 | .val = 655, |
144 | .val2 = 200000, |
145 | }, |
146 | { |
147 | .val = 1310, |
148 | .val2 = 400000, |
149 | }, |
150 | { |
151 | .val = 2620, |
152 | .val2 = 800000, |
153 | }, |
154 | { |
155 | .val = 5241, |
156 | .val2 = 600000, |
157 | }, |
158 | { |
159 | .val = 10483, |
160 | .val2 = 200000, |
161 | }, |
162 | { |
163 | .val = 20966, |
164 | .val2 = 400000, |
165 | }, |
166 | { |
167 | .val = 41932, |
168 | .val2 = 800000, |
169 | }, |
170 | { |
171 | .val = 83865, |
172 | .val2 = 600000, |
173 | }, |
174 | }; |
175 | |
176 | static const struct opt3001_scale opt3002_scales[] = { |
177 | { |
178 | .val = 4914, |
179 | .val2 = 0, |
180 | }, |
181 | { |
182 | .val = 9828, |
183 | .val2 = 0, |
184 | }, |
185 | { |
186 | .val = 19656, |
187 | .val2 = 0, |
188 | }, |
189 | { |
190 | .val = 39312, |
191 | .val2 = 0, |
192 | }, |
193 | { |
194 | .val = 78624, |
195 | .val2 = 0, |
196 | }, |
197 | { |
198 | .val = 157248, |
199 | .val2 = 0, |
200 | }, |
201 | { |
202 | .val = 314496, |
203 | .val2 = 0, |
204 | }, |
205 | { |
206 | .val = 628992, |
207 | .val2 = 0, |
208 | }, |
209 | { |
210 | .val = 1257984, |
211 | .val2 = 0, |
212 | }, |
213 | { |
214 | .val = 2515968, |
215 | .val2 = 0, |
216 | }, |
217 | { |
218 | .val = 5031936, |
219 | .val2 = 0, |
220 | }, |
221 | { |
222 | .val = 10063872, |
223 | .val2 = 0, |
224 | }, |
225 | }; |
226 | |
227 | static int opt3001_find_scale(const struct opt3001 *opt, int val, |
228 | int val2, u8 *exponent) |
229 | { |
230 | int i; |
231 | for (i = 0; i < ARRAY_SIZE(*opt->chip_info->scales); i++) { |
232 | const struct opt3001_scale *scale = &(*opt->chip_info->scales)[i]; |
233 | /* |
234 | * Compare the integer and micro parts to determine value scale. |
235 | */ |
236 | if (val < scale->val || |
237 | (val == scale->val && val2 <= scale->val2)) { |
238 | *exponent = i; |
239 | return 0; |
240 | } |
241 | } |
242 | |
243 | return -EINVAL; |
244 | } |
245 | |
246 | static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent, |
247 | u16 mantissa, int *val, int *val2) |
248 | { |
249 | int ret; |
250 | int whole = opt->chip_info->factor_whole; |
251 | int integer = opt->chip_info->factor_integer; |
252 | int decimal = opt->chip_info->factor_decimal; |
253 | |
254 | ret = whole * (mantissa << exponent); |
255 | *val = ret / integer; |
256 | *val2 = (ret - (*val * integer)) * decimal; |
257 | } |
258 | |
259 | static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode) |
260 | { |
261 | *reg &= ~OPT3001_CONFIGURATION_M_MASK; |
262 | *reg |= mode; |
263 | opt->mode = mode; |
264 | } |
265 | |
266 | static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8"); |
267 | |
268 | static struct attribute *opt3001_attributes[] = { |
269 | &iio_const_attr_integration_time_available.dev_attr.attr, |
270 | NULL |
271 | }; |
272 | |
273 | static const struct attribute_group opt3001_attribute_group = { |
274 | .attrs = opt3001_attributes, |
275 | }; |
276 | |
277 | static const struct iio_event_spec opt3001_event_spec[] = { |
278 | { |
279 | .type = IIO_EV_TYPE_THRESH, |
280 | .dir = IIO_EV_DIR_RISING, |
281 | .mask_separate = BIT(IIO_EV_INFO_VALUE) | |
282 | BIT(IIO_EV_INFO_ENABLE), |
283 | }, |
284 | { |
285 | .type = IIO_EV_TYPE_THRESH, |
286 | .dir = IIO_EV_DIR_FALLING, |
287 | .mask_separate = BIT(IIO_EV_INFO_VALUE) | |
288 | BIT(IIO_EV_INFO_ENABLE), |
289 | }, |
290 | }; |
291 | |
292 | static const struct iio_chan_spec opt3001_channels[] = { |
293 | { |
294 | .type = IIO_LIGHT, |
295 | .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | |
296 | BIT(IIO_CHAN_INFO_INT_TIME), |
297 | .event_spec = opt3001_event_spec, |
298 | .num_event_specs = ARRAY_SIZE(opt3001_event_spec), |
299 | }, |
300 | IIO_CHAN_SOFT_TIMESTAMP(1), |
301 | }; |
302 | |
303 | static const struct iio_chan_spec opt3002_channels[] = { |
304 | { |
305 | .type = IIO_INTENSITY, |
306 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | |
307 | BIT(IIO_CHAN_INFO_INT_TIME), |
308 | .event_spec = opt3001_event_spec, |
309 | .num_event_specs = ARRAY_SIZE(opt3001_event_spec), |
310 | }, |
311 | IIO_CHAN_SOFT_TIMESTAMP(1), |
312 | }; |
313 | |
314 | static int opt3001_get_processed(struct opt3001 *opt, int *val, int *val2) |
315 | { |
316 | int ret; |
317 | u16 mantissa; |
318 | u16 reg; |
319 | u8 exponent; |
320 | u16 value; |
321 | long timeout; |
322 | |
323 | if (opt->use_irq) { |
324 | /* |
325 | * Enable the end-of-conversion interrupt mechanism. Note that |
326 | * doing so will overwrite the low-level limit value however we |
327 | * will restore this value later on. |
328 | */ |
329 | ret = i2c_smbus_write_word_swapped(client: opt->client, |
330 | OPT3001_LOW_LIMIT, |
331 | OPT3001_LOW_LIMIT_EOC_ENABLE); |
332 | if (ret < 0) { |
333 | dev_err(opt->dev, "failed to write register %02x\n", |
334 | OPT3001_LOW_LIMIT); |
335 | return ret; |
336 | } |
337 | |
338 | /* Allow IRQ to access the device despite lock being set */ |
339 | opt->ok_to_ignore_lock = true; |
340 | } |
341 | |
342 | /* Reset data-ready indicator flag */ |
343 | opt->result_ready = false; |
344 | |
345 | /* Configure for single-conversion mode and start a new conversion */ |
346 | ret = i2c_smbus_read_word_swapped(client: opt->client, OPT3001_CONFIGURATION); |
347 | if (ret < 0) { |
348 | dev_err(opt->dev, "failed to read register %02x\n", |
349 | OPT3001_CONFIGURATION); |
350 | goto err; |
351 | } |
352 | |
353 | reg = ret; |
354 | opt3001_set_mode(opt, reg: ®, OPT3001_CONFIGURATION_M_SINGLE); |
355 | |
356 | ret = i2c_smbus_write_word_swapped(client: opt->client, OPT3001_CONFIGURATION, |
357 | value: reg); |
358 | if (ret < 0) { |
359 | dev_err(opt->dev, "failed to write register %02x\n", |
360 | OPT3001_CONFIGURATION); |
361 | goto err; |
362 | } |
363 | |
364 | if (opt->use_irq) { |
365 | /* Wait for the IRQ to indicate the conversion is complete */ |
366 | ret = wait_event_timeout(opt->result_ready_queue, |
367 | opt->result_ready, |
368 | msecs_to_jiffies(OPT3001_RESULT_READY_LONG)); |
369 | if (ret == 0) |
370 | return -ETIMEDOUT; |
371 | } else { |
372 | /* Sleep for result ready time */ |
373 | timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ? |
374 | OPT3001_RESULT_READY_SHORT : OPT3001_RESULT_READY_LONG; |
375 | msleep(msecs: timeout); |
376 | |
377 | /* Check result ready flag */ |
378 | ret = i2c_smbus_read_word_swapped(client: opt->client, |
379 | OPT3001_CONFIGURATION); |
380 | if (ret < 0) { |
381 | dev_err(opt->dev, "failed to read register %02x\n", |
382 | OPT3001_CONFIGURATION); |
383 | goto err; |
384 | } |
385 | |
386 | if (!(ret & OPT3001_CONFIGURATION_CRF)) { |
387 | ret = -ETIMEDOUT; |
388 | goto err; |
389 | } |
390 | |
391 | /* Obtain value */ |
392 | ret = i2c_smbus_read_word_swapped(client: opt->client, OPT3001_RESULT); |
393 | if (ret < 0) { |
394 | dev_err(opt->dev, "failed to read register %02x\n", |
395 | OPT3001_RESULT); |
396 | goto err; |
397 | } |
398 | opt->result = ret; |
399 | opt->result_ready = true; |
400 | } |
401 | |
402 | err: |
403 | if (opt->use_irq) |
404 | /* Disallow IRQ to access the device while lock is active */ |
405 | opt->ok_to_ignore_lock = false; |
406 | |
407 | if (ret < 0) |
408 | return ret; |
409 | |
410 | if (opt->use_irq) { |
411 | /* |
412 | * Disable the end-of-conversion interrupt mechanism by |
413 | * restoring the low-level limit value (clearing |
414 | * OPT3001_LOW_LIMIT_EOC_ENABLE). Note that selectively clearing |
415 | * those enable bits would affect the actual limit value due to |
416 | * bit-overlap and therefore can't be done. |
417 | */ |
418 | value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa; |
419 | ret = i2c_smbus_write_word_swapped(client: opt->client, |
420 | OPT3001_LOW_LIMIT, |
421 | value); |
422 | if (ret < 0) { |
423 | dev_err(opt->dev, "failed to write register %02x\n", |
424 | OPT3001_LOW_LIMIT); |
425 | return ret; |
426 | } |
427 | } |
428 | |
429 | exponent = OPT3001_REG_EXPONENT(opt->result); |
430 | mantissa = OPT3001_REG_MANTISSA(opt->result); |
431 | |
432 | opt3001_to_iio_ret(opt, exponent, mantissa, val, val2); |
433 | |
434 | return IIO_VAL_INT_PLUS_MICRO; |
435 | } |
436 | |
437 | static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2) |
438 | { |
439 | *val = 0; |
440 | *val2 = opt->int_time; |
441 | |
442 | return IIO_VAL_INT_PLUS_MICRO; |
443 | } |
444 | |
445 | static int opt3001_set_int_time(struct opt3001 *opt, int time) |
446 | { |
447 | int ret; |
448 | u16 reg; |
449 | |
450 | ret = i2c_smbus_read_word_swapped(client: opt->client, OPT3001_CONFIGURATION); |
451 | if (ret < 0) { |
452 | dev_err(opt->dev, "failed to read register %02x\n", |
453 | OPT3001_CONFIGURATION); |
454 | return ret; |
455 | } |
456 | |
457 | reg = ret; |
458 | |
459 | switch (time) { |
460 | case OPT3001_INT_TIME_SHORT: |
461 | reg &= ~OPT3001_CONFIGURATION_CT; |
462 | opt->int_time = OPT3001_INT_TIME_SHORT; |
463 | break; |
464 | case OPT3001_INT_TIME_LONG: |
465 | reg |= OPT3001_CONFIGURATION_CT; |
466 | opt->int_time = OPT3001_INT_TIME_LONG; |
467 | break; |
468 | default: |
469 | return -EINVAL; |
470 | } |
471 | |
472 | return i2c_smbus_write_word_swapped(client: opt->client, OPT3001_CONFIGURATION, |
473 | value: reg); |
474 | } |
475 | |
476 | static int opt3001_read_raw(struct iio_dev *iio, |
477 | struct iio_chan_spec const *chan, int *val, int *val2, |
478 | long mask) |
479 | { |
480 | struct opt3001 *opt = iio_priv(indio_dev: iio); |
481 | int ret; |
482 | |
483 | if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) |
484 | return -EBUSY; |
485 | |
486 | if (chan->type != opt->chip_info->chan_type) |
487 | return -EINVAL; |
488 | |
489 | mutex_lock(&opt->lock); |
490 | |
491 | switch (mask) { |
492 | case IIO_CHAN_INFO_RAW: |
493 | case IIO_CHAN_INFO_PROCESSED: |
494 | ret = opt3001_get_processed(opt, val, val2); |
495 | break; |
496 | case IIO_CHAN_INFO_INT_TIME: |
497 | ret = opt3001_get_int_time(opt, val, val2); |
498 | break; |
499 | default: |
500 | ret = -EINVAL; |
501 | } |
502 | |
503 | mutex_unlock(lock: &opt->lock); |
504 | |
505 | return ret; |
506 | } |
507 | |
508 | static int opt3001_write_raw(struct iio_dev *iio, |
509 | struct iio_chan_spec const *chan, int val, int val2, |
510 | long mask) |
511 | { |
512 | struct opt3001 *opt = iio_priv(indio_dev: iio); |
513 | int ret; |
514 | |
515 | if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) |
516 | return -EBUSY; |
517 | |
518 | if (chan->type != opt->chip_info->chan_type) |
519 | return -EINVAL; |
520 | |
521 | if (mask != IIO_CHAN_INFO_INT_TIME) |
522 | return -EINVAL; |
523 | |
524 | if (val != 0) |
525 | return -EINVAL; |
526 | |
527 | mutex_lock(&opt->lock); |
528 | ret = opt3001_set_int_time(opt, time: val2); |
529 | mutex_unlock(lock: &opt->lock); |
530 | |
531 | return ret; |
532 | } |
533 | |
534 | static int opt3001_read_event_value(struct iio_dev *iio, |
535 | const struct iio_chan_spec *chan, enum iio_event_type type, |
536 | enum iio_event_direction dir, enum iio_event_info info, |
537 | int *val, int *val2) |
538 | { |
539 | struct opt3001 *opt = iio_priv(indio_dev: iio); |
540 | int ret = IIO_VAL_INT_PLUS_MICRO; |
541 | |
542 | mutex_lock(&opt->lock); |
543 | |
544 | switch (dir) { |
545 | case IIO_EV_DIR_RISING: |
546 | opt3001_to_iio_ret(opt, exponent: opt->high_thresh_exp, |
547 | mantissa: opt->high_thresh_mantissa, val, val2); |
548 | break; |
549 | case IIO_EV_DIR_FALLING: |
550 | opt3001_to_iio_ret(opt, exponent: opt->low_thresh_exp, |
551 | mantissa: opt->low_thresh_mantissa, val, val2); |
552 | break; |
553 | default: |
554 | ret = -EINVAL; |
555 | } |
556 | |
557 | mutex_unlock(lock: &opt->lock); |
558 | |
559 | return ret; |
560 | } |
561 | |
562 | static int opt3001_write_event_value(struct iio_dev *iio, |
563 | const struct iio_chan_spec *chan, enum iio_event_type type, |
564 | enum iio_event_direction dir, enum iio_event_info info, |
565 | int val, int val2) |
566 | { |
567 | struct opt3001 *opt = iio_priv(indio_dev: iio); |
568 | int ret; |
569 | int whole; |
570 | int integer; |
571 | int decimal; |
572 | |
573 | u16 mantissa; |
574 | u16 value; |
575 | u16 reg; |
576 | |
577 | u8 exponent; |
578 | |
579 | if (val < 0) |
580 | return -EINVAL; |
581 | |
582 | mutex_lock(&opt->lock); |
583 | |
584 | ret = opt3001_find_scale(opt, val, val2, exponent: &exponent); |
585 | if (ret < 0) { |
586 | dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2); |
587 | goto err; |
588 | } |
589 | |
590 | whole = opt->chip_info->factor_whole; |
591 | integer = opt->chip_info->factor_integer; |
592 | decimal = opt->chip_info->factor_decimal; |
593 | |
594 | mantissa = (((val * integer) + (val2 / decimal)) / whole) >> exponent; |
595 | |
596 | value = (exponent << 12) | mantissa; |
597 | |
598 | switch (dir) { |
599 | case IIO_EV_DIR_RISING: |
600 | reg = OPT3001_HIGH_LIMIT; |
601 | opt->high_thresh_mantissa = mantissa; |
602 | opt->high_thresh_exp = exponent; |
603 | break; |
604 | case IIO_EV_DIR_FALLING: |
605 | reg = OPT3001_LOW_LIMIT; |
606 | opt->low_thresh_mantissa = mantissa; |
607 | opt->low_thresh_exp = exponent; |
608 | break; |
609 | default: |
610 | ret = -EINVAL; |
611 | goto err; |
612 | } |
613 | |
614 | ret = i2c_smbus_write_word_swapped(client: opt->client, command: reg, value); |
615 | if (ret < 0) { |
616 | dev_err(opt->dev, "failed to write register %02x\n", reg); |
617 | goto err; |
618 | } |
619 | |
620 | err: |
621 | mutex_unlock(lock: &opt->lock); |
622 | |
623 | return ret; |
624 | } |
625 | |
626 | static int opt3001_read_event_config(struct iio_dev *iio, |
627 | const struct iio_chan_spec *chan, enum iio_event_type type, |
628 | enum iio_event_direction dir) |
629 | { |
630 | struct opt3001 *opt = iio_priv(indio_dev: iio); |
631 | |
632 | return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS; |
633 | } |
634 | |
635 | static int opt3001_write_event_config(struct iio_dev *iio, |
636 | const struct iio_chan_spec *chan, enum iio_event_type type, |
637 | enum iio_event_direction dir, bool state) |
638 | { |
639 | struct opt3001 *opt = iio_priv(indio_dev: iio); |
640 | int ret; |
641 | u16 mode; |
642 | u16 reg; |
643 | |
644 | if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) |
645 | return 0; |
646 | |
647 | if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN) |
648 | return 0; |
649 | |
650 | mutex_lock(&opt->lock); |
651 | |
652 | mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS |
653 | : OPT3001_CONFIGURATION_M_SHUTDOWN; |
654 | |
655 | ret = i2c_smbus_read_word_swapped(client: opt->client, OPT3001_CONFIGURATION); |
656 | if (ret < 0) { |
657 | dev_err(opt->dev, "failed to read register %02x\n", |
658 | OPT3001_CONFIGURATION); |
659 | goto err; |
660 | } |
661 | |
662 | reg = ret; |
663 | opt3001_set_mode(opt, reg: ®, mode); |
664 | |
665 | ret = i2c_smbus_write_word_swapped(client: opt->client, OPT3001_CONFIGURATION, |
666 | value: reg); |
667 | if (ret < 0) { |
668 | dev_err(opt->dev, "failed to write register %02x\n", |
669 | OPT3001_CONFIGURATION); |
670 | goto err; |
671 | } |
672 | |
673 | err: |
674 | mutex_unlock(lock: &opt->lock); |
675 | |
676 | return ret; |
677 | } |
678 | |
679 | static const struct iio_info opt3001_info = { |
680 | .attrs = &opt3001_attribute_group, |
681 | .read_raw = opt3001_read_raw, |
682 | .write_raw = opt3001_write_raw, |
683 | .read_event_value = opt3001_read_event_value, |
684 | .write_event_value = opt3001_write_event_value, |
685 | .read_event_config = opt3001_read_event_config, |
686 | .write_event_config = opt3001_write_event_config, |
687 | }; |
688 | |
689 | static int opt3001_read_id(struct opt3001 *opt) |
690 | { |
691 | char manufacturer[2]; |
692 | u16 device_id; |
693 | int ret; |
694 | |
695 | ret = i2c_smbus_read_word_swapped(client: opt->client, OPT3001_MANUFACTURER_ID); |
696 | if (ret < 0) { |
697 | dev_err(opt->dev, "failed to read register %02x\n", |
698 | OPT3001_MANUFACTURER_ID); |
699 | return ret; |
700 | } |
701 | |
702 | manufacturer[0] = ret >> 8; |
703 | manufacturer[1] = ret & 0xff; |
704 | |
705 | ret = i2c_smbus_read_word_swapped(client: opt->client, OPT3001_DEVICE_ID); |
706 | if (ret < 0) { |
707 | dev_err(opt->dev, "failed to read register %02x\n", |
708 | OPT3001_DEVICE_ID); |
709 | return ret; |
710 | } |
711 | |
712 | device_id = ret; |
713 | |
714 | dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0], |
715 | manufacturer[1], device_id); |
716 | |
717 | return 0; |
718 | } |
719 | |
720 | static int opt3001_configure(struct opt3001 *opt) |
721 | { |
722 | int ret; |
723 | u16 reg; |
724 | |
725 | ret = i2c_smbus_read_word_swapped(client: opt->client, OPT3001_CONFIGURATION); |
726 | if (ret < 0) { |
727 | dev_err(opt->dev, "failed to read register %02x\n", |
728 | OPT3001_CONFIGURATION); |
729 | return ret; |
730 | } |
731 | |
732 | reg = ret; |
733 | |
734 | /* Enable automatic full-scale setting mode */ |
735 | reg &= ~OPT3001_CONFIGURATION_RN_MASK; |
736 | reg |= OPT3001_CONFIGURATION_RN_AUTO; |
737 | |
738 | /* Reflect status of the device's integration time setting */ |
739 | if (reg & OPT3001_CONFIGURATION_CT) |
740 | opt->int_time = OPT3001_INT_TIME_LONG; |
741 | else |
742 | opt->int_time = OPT3001_INT_TIME_SHORT; |
743 | |
744 | /* Ensure device is in shutdown initially */ |
745 | opt3001_set_mode(opt, reg: ®, OPT3001_CONFIGURATION_M_SHUTDOWN); |
746 | |
747 | /* Configure for latched window-style comparison operation */ |
748 | reg |= OPT3001_CONFIGURATION_L; |
749 | reg &= ~OPT3001_CONFIGURATION_POL; |
750 | reg &= ~OPT3001_CONFIGURATION_ME; |
751 | reg &= ~OPT3001_CONFIGURATION_FC_MASK; |
752 | |
753 | ret = i2c_smbus_write_word_swapped(client: opt->client, OPT3001_CONFIGURATION, |
754 | value: reg); |
755 | if (ret < 0) { |
756 | dev_err(opt->dev, "failed to write register %02x\n", |
757 | OPT3001_CONFIGURATION); |
758 | return ret; |
759 | } |
760 | |
761 | ret = i2c_smbus_read_word_swapped(client: opt->client, OPT3001_LOW_LIMIT); |
762 | if (ret < 0) { |
763 | dev_err(opt->dev, "failed to read register %02x\n", |
764 | OPT3001_LOW_LIMIT); |
765 | return ret; |
766 | } |
767 | |
768 | opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret); |
769 | opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret); |
770 | |
771 | ret = i2c_smbus_read_word_swapped(client: opt->client, OPT3001_HIGH_LIMIT); |
772 | if (ret < 0) { |
773 | dev_err(opt->dev, "failed to read register %02x\n", |
774 | OPT3001_HIGH_LIMIT); |
775 | return ret; |
776 | } |
777 | |
778 | opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret); |
779 | opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret); |
780 | |
781 | return 0; |
782 | } |
783 | |
784 | static irqreturn_t opt3001_irq(int irq, void *_iio) |
785 | { |
786 | struct iio_dev *iio = _iio; |
787 | struct opt3001 *opt = iio_priv(indio_dev: iio); |
788 | int ret; |
789 | bool wake_result_ready_queue = false; |
790 | enum iio_chan_type chan_type = opt->chip_info->chan_type; |
791 | bool ok_to_ignore_lock = opt->ok_to_ignore_lock; |
792 | |
793 | if (!ok_to_ignore_lock) |
794 | mutex_lock(&opt->lock); |
795 | |
796 | ret = i2c_smbus_read_word_swapped(client: opt->client, OPT3001_CONFIGURATION); |
797 | if (ret < 0) { |
798 | dev_err(opt->dev, "failed to read register %02x\n", |
799 | OPT3001_CONFIGURATION); |
800 | goto out; |
801 | } |
802 | |
803 | if ((ret & OPT3001_CONFIGURATION_M_MASK) == |
804 | OPT3001_CONFIGURATION_M_CONTINUOUS) { |
805 | if (ret & OPT3001_CONFIGURATION_FH) |
806 | iio_push_event(indio_dev: iio, |
807 | IIO_UNMOD_EVENT_CODE(chan_type, 0, |
808 | IIO_EV_TYPE_THRESH, |
809 | IIO_EV_DIR_RISING), |
810 | timestamp: iio_get_time_ns(indio_dev: iio)); |
811 | if (ret & OPT3001_CONFIGURATION_FL) |
812 | iio_push_event(indio_dev: iio, |
813 | IIO_UNMOD_EVENT_CODE(chan_type, 0, |
814 | IIO_EV_TYPE_THRESH, |
815 | IIO_EV_DIR_FALLING), |
816 | timestamp: iio_get_time_ns(indio_dev: iio)); |
817 | } else if (ret & OPT3001_CONFIGURATION_CRF) { |
818 | ret = i2c_smbus_read_word_swapped(client: opt->client, OPT3001_RESULT); |
819 | if (ret < 0) { |
820 | dev_err(opt->dev, "failed to read register %02x\n", |
821 | OPT3001_RESULT); |
822 | goto out; |
823 | } |
824 | opt->result = ret; |
825 | opt->result_ready = true; |
826 | wake_result_ready_queue = true; |
827 | } |
828 | |
829 | out: |
830 | if (!ok_to_ignore_lock) |
831 | mutex_unlock(lock: &opt->lock); |
832 | |
833 | if (wake_result_ready_queue) |
834 | wake_up(&opt->result_ready_queue); |
835 | |
836 | return IRQ_HANDLED; |
837 | } |
838 | |
839 | static int opt3001_probe(struct i2c_client *client) |
840 | { |
841 | struct device *dev = &client->dev; |
842 | |
843 | struct iio_dev *iio; |
844 | struct opt3001 *opt; |
845 | int irq = client->irq; |
846 | int ret; |
847 | |
848 | iio = devm_iio_device_alloc(parent: dev, sizeof_priv: sizeof(*opt)); |
849 | if (!iio) |
850 | return -ENOMEM; |
851 | |
852 | opt = iio_priv(indio_dev: iio); |
853 | opt->client = client; |
854 | opt->dev = dev; |
855 | opt->chip_info = i2c_get_match_data(client); |
856 | |
857 | mutex_init(&opt->lock); |
858 | init_waitqueue_head(&opt->result_ready_queue); |
859 | i2c_set_clientdata(client, data: iio); |
860 | |
861 | if (opt->chip_info->has_id) { |
862 | ret = opt3001_read_id(opt); |
863 | if (ret) |
864 | return ret; |
865 | } |
866 | |
867 | ret = opt3001_configure(opt); |
868 | if (ret) |
869 | return ret; |
870 | |
871 | iio->name = client->name; |
872 | iio->channels = *opt->chip_info->channels; |
873 | iio->num_channels = opt->chip_info->num_channels; |
874 | iio->modes = INDIO_DIRECT_MODE; |
875 | iio->info = &opt3001_info; |
876 | |
877 | ret = devm_iio_device_register(dev, iio); |
878 | if (ret) { |
879 | dev_err(dev, "failed to register IIO device\n"); |
880 | return ret; |
881 | } |
882 | |
883 | /* Make use of INT pin only if valid IRQ no. is given */ |
884 | if (irq > 0) { |
885 | ret = request_threaded_irq(irq, NULL, thread_fn: opt3001_irq, |
886 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, |
887 | name: "opt3001", dev: iio); |
888 | if (ret) { |
889 | dev_err(dev, "failed to request IRQ #%d\n", irq); |
890 | return ret; |
891 | } |
892 | opt->use_irq = true; |
893 | } else { |
894 | dev_dbg(opt->dev, "enabling interrupt-less operation\n"); |
895 | } |
896 | |
897 | return 0; |
898 | } |
899 | |
900 | static void opt3001_remove(struct i2c_client *client) |
901 | { |
902 | struct iio_dev *iio = i2c_get_clientdata(client); |
903 | struct opt3001 *opt = iio_priv(indio_dev: iio); |
904 | int ret; |
905 | u16 reg; |
906 | |
907 | if (opt->use_irq) |
908 | free_irq(client->irq, iio); |
909 | |
910 | ret = i2c_smbus_read_word_swapped(client: opt->client, OPT3001_CONFIGURATION); |
911 | if (ret < 0) { |
912 | dev_err(opt->dev, "failed to read register %02x\n", |
913 | OPT3001_CONFIGURATION); |
914 | return; |
915 | } |
916 | |
917 | reg = ret; |
918 | opt3001_set_mode(opt, reg: ®, OPT3001_CONFIGURATION_M_SHUTDOWN); |
919 | |
920 | ret = i2c_smbus_write_word_swapped(client: opt->client, OPT3001_CONFIGURATION, |
921 | value: reg); |
922 | if (ret < 0) { |
923 | dev_err(opt->dev, "failed to write register %02x\n", |
924 | OPT3001_CONFIGURATION); |
925 | } |
926 | } |
927 | |
928 | static const struct opt3001_chip_info opt3001_chip_information = { |
929 | .channels = &opt3001_channels, |
930 | .chan_type = IIO_LIGHT, |
931 | .num_channels = ARRAY_SIZE(opt3001_channels), |
932 | .scales = &opt3001_scales, |
933 | .factor_whole = 10, |
934 | .factor_integer = 1000, |
935 | .factor_decimal = 1000, |
936 | .has_id = true, |
937 | }; |
938 | |
939 | static const struct opt3001_chip_info opt3002_chip_information = { |
940 | .channels = &opt3002_channels, |
941 | .chan_type = IIO_INTENSITY, |
942 | .num_channels = ARRAY_SIZE(opt3002_channels), |
943 | .scales = &opt3002_scales, |
944 | .factor_whole = 12, |
945 | .factor_integer = 10, |
946 | .factor_decimal = 100000, |
947 | .has_id = false, |
948 | }; |
949 | |
950 | static const struct i2c_device_id opt3001_id[] = { |
951 | { "opt3001", (kernel_ulong_t)&opt3001_chip_information }, |
952 | { "opt3002", (kernel_ulong_t)&opt3002_chip_information }, |
953 | { } /* Terminating Entry */ |
954 | }; |
955 | MODULE_DEVICE_TABLE(i2c, opt3001_id); |
956 | |
957 | static const struct of_device_id opt3001_of_match[] = { |
958 | { .compatible = "ti,opt3001", .data = &opt3001_chip_information }, |
959 | { .compatible = "ti,opt3002", .data = &opt3002_chip_information }, |
960 | { } |
961 | }; |
962 | MODULE_DEVICE_TABLE(of, opt3001_of_match); |
963 | |
964 | static struct i2c_driver opt3001_driver = { |
965 | .probe = opt3001_probe, |
966 | .remove = opt3001_remove, |
967 | .id_table = opt3001_id, |
968 | |
969 | .driver = { |
970 | .name = "opt3001", |
971 | .of_match_table = opt3001_of_match, |
972 | }, |
973 | }; |
974 | |
975 | module_i2c_driver(opt3001_driver); |
976 | |
977 | MODULE_LICENSE("GPL v2"); |
978 | MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>"); |
979 | MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver"); |
980 |
Definitions
- opt3001_scale
- opt3001_chip_info
- opt3001
- opt3001_scales
- opt3002_scales
- opt3001_find_scale
- opt3001_to_iio_ret
- opt3001_set_mode
- opt3001_attributes
- opt3001_attribute_group
- opt3001_event_spec
- opt3001_channels
- opt3002_channels
- opt3001_get_processed
- opt3001_get_int_time
- opt3001_set_int_time
- opt3001_read_raw
- opt3001_write_raw
- opt3001_read_event_value
- opt3001_write_event_value
- opt3001_read_event_config
- opt3001_write_event_config
- opt3001_info
- opt3001_read_id
- opt3001_configure
- opt3001_irq
- opt3001_probe
- opt3001_remove
- opt3001_chip_information
- opt3002_chip_information
- opt3001_id
- opt3001_of_match
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